mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-25 06:03:36 -04:00
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (154 commits) mtd: cfi_cmdset_0002: use AMD standard command-set with Winbond flash chips mtd: cfi_cmdset_0002: Fix MODULE_ALIAS and linkage for new 0701 commandset ID mtd: mxc_nand: Remove duplicate NAND_CMD_RESET case value mtd: update gfp/slab.h includes jffs2: Stop triggering block erases from jffs2_write_super() jffs2: Rename jffs2_erase_pending_trigger() to jffs2_dirty_trigger() jffs2: Use jffs2_garbage_collect_trigger() to trigger pending erases jffs2: Require jffs2_garbage_collect_trigger() to be called with lock held jffs2: Wake GC thread when there are blocks to be erased jffs2: Erase pending blocks in GC pass, avoid invalid -EIO return jffs2: Add 'work_done' return value from jffs2_erase_pending_blocks() mtd: mtdchar: Do not corrupt backing device of device node inode mtd/maps/pcmciamtd: Fix printk format for ssize_t in debug messages drivers/mtd: Use kmemdup mtd: cfi_cmdset_0002: Fix argument order in bootloc warning mtd: nand: add Toshiba TC58NVG0 device ID pcmciamtd: add another ID pcmciamtd: coding style cleanups pcmciamtd: fixing obvious errors mtd: chips: add SST39WF160x NOR-flashes ... Trivial conflicts due to dev_node removal in drivers/mtd/maps/pcmciamtd.c
This commit is contained in:
Linus Torvalds
commit
05ec7dd8dd
117 changed files with 10156 additions and 1647 deletions
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@ -215,8 +215,8 @@ union jffs2_node_union
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/* Data payload for device nodes. */
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union jffs2_device_node {
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jint16_t old;
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jint32_t new;
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jint16_t old_id;
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jint32_t new_id;
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};
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#endif /* __LINUX_JFFS2_H__ */
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@ -9,6 +9,8 @@
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#define __MTD_TRANS_H__
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#include <linux/mutex.h>
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#include <linux/kref.h>
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#include <linux/sysfs.h>
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struct hd_geometry;
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struct mtd_info;
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@ -24,11 +26,16 @@ struct mtd_blktrans_dev {
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int devnum;
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unsigned long size;
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int readonly;
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void *blkcore_priv; /* gendisk in 2.5, devfs_handle in 2.4 */
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int open;
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struct kref ref;
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struct gendisk *disk;
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struct attribute_group *disk_attributes;
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struct task_struct *thread;
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struct request_queue *rq;
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spinlock_t queue_lock;
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void *priv;
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};
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struct blkcore_priv; /* Differs for 2.4 and 2.5 kernels; private */
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struct mtd_blktrans_ops {
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char *name;
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int major;
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@ -60,8 +67,6 @@ struct mtd_blktrans_ops {
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struct list_head devs;
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struct list_head list;
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struct module *owner;
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struct mtd_blkcore_priv *blkcore_priv;
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};
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extern int register_mtd_blktrans(struct mtd_blktrans_ops *tr);
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@ -253,6 +253,7 @@ struct cfi_bri_query {
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#define P_ID_MITSUBISHI_STD 0x0100
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#define P_ID_MITSUBISHI_EXT 0x0101
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#define P_ID_SST_PAGE 0x0102
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#define P_ID_SST_OLD 0x0701
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#define P_ID_INTEL_PERFORMANCE 0x0200
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#define P_ID_INTEL_DATA 0x0210
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#define P_ID_RESERVED 0xffff
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@ -297,7 +298,7 @@ static inline uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs,
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* and 32bit devices on 16 bit busses
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* set the low bit of the alternating bit sequence of the address.
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*/
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if (((type * interleave) > bankwidth) && ((uint8_t)cmd_ofs == 0xaa))
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if (((type * interleave) > bankwidth) && ((cmd_ofs & 0xff) == 0xaa))
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addr |= (type >> 1)*interleave;
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return addr;
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@ -515,14 +516,25 @@ struct cfi_fixup {
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void* param;
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};
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#define CFI_MFR_ANY 0xffff
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#define CFI_ID_ANY 0xffff
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#define CFI_MFR_ANY 0xFFFF
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#define CFI_ID_ANY 0xFFFF
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#define CFI_MFR_CONTINUATION 0x007F
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#define CFI_MFR_AMD 0x0001
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#define CFI_MFR_INTEL 0x0089
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#define CFI_MFR_ATMEL 0x001F
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#define CFI_MFR_SAMSUNG 0x00EC
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#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
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#define CFI_MFR_AMD 0x0001
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#define CFI_MFR_ATMEL 0x001F
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#define CFI_MFR_EON 0x001C
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#define CFI_MFR_FUJITSU 0x0004
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#define CFI_MFR_HYUNDAI 0x00AD
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#define CFI_MFR_INTEL 0x0089
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#define CFI_MFR_MACRONIX 0x00C2
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#define CFI_MFR_NEC 0x0010
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#define CFI_MFR_PMC 0x009D
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#define CFI_MFR_SAMSUNG 0x00EC
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#define CFI_MFR_SHARP 0x00B0
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#define CFI_MFR_SST 0x00BF
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#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
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#define CFI_MFR_TOSHIBA 0x0098
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#define CFI_MFR_WINBOND 0x00DA
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void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups);
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@ -15,6 +15,7 @@
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* has asm/spinlock.h, or 2.4, which has linux/spinlock.h
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*/
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#include <linux/sched.h>
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#include <linux/mutex.h>
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typedef enum {
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FL_READY,
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@ -74,8 +75,7 @@ struct flchip {
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unsigned int erase_suspended:1;
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unsigned long in_progress_block_addr;
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spinlock_t *mutex;
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spinlock_t _spinlock; /* We do it like this because sometimes they'll be shared. */
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struct mutex mutex;
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wait_queue_head_t wq; /* Wait on here when we're waiting for the chip
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to be ready */
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int word_write_time;
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@ -7,6 +7,7 @@
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#include <linux/types.h>
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#include <linux/list.h>
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#include <linux/string.h>
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#include <linux/bug.h>
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#include <linux/mtd/compatmac.h>
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@ -386,6 +387,8 @@ static inline map_word inline_map_read(struct map_info *map, unsigned long ofs)
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#endif
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else if (map_bankwidth_is_large(map))
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memcpy_fromio(r.x, map->virt+ofs, map->bankwidth);
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else
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BUG();
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return r;
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}
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@ -20,7 +20,6 @@
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#define MTD_CHAR_MAJOR 90
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#define MTD_BLOCK_MAJOR 31
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#define MAX_MTD_DEVICES 32
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#define MTD_ERASE_PENDING 0x01
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#define MTD_ERASING 0x02
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@ -61,9 +60,7 @@ struct mtd_erase_region_info {
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* MTD_OOB_PLACE: oob data are placed at the given offset
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* MTD_OOB_AUTO: oob data are automatically placed at the free areas
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* which are defined by the ecclayout
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* MTD_OOB_RAW: mode to read raw data+oob in one chunk. The oob data
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* is inserted into the data. Thats a raw image of the
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* flash contents.
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* MTD_OOB_RAW: mode to read oob and data without doing ECC checking
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*/
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typedef enum {
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MTD_OOB_PLACE,
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@ -290,8 +287,9 @@ extern int add_mtd_device(struct mtd_info *mtd);
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extern int del_mtd_device (struct mtd_info *mtd);
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extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
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extern int __get_mtd_device(struct mtd_info *mtd);
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extern void __put_mtd_device(struct mtd_info *mtd);
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extern struct mtd_info *get_mtd_device_nm(const char *name);
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extern void put_mtd_device(struct mtd_info *mtd);
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@ -3,6 +3,6 @@
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#include <linux/mtd/mtd.h>
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int mtdram_init_device(struct mtd_info *mtd, void *mapped_address,
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unsigned long size, char *name);
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unsigned long size, char *name);
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#endif /* __MTD_MTDRAM_H__ */
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@ -25,11 +25,13 @@
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#include <linux/mtd/bbm.h>
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struct mtd_info;
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struct nand_flash_dev;
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/* Scan and identify a NAND device */
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extern int nand_scan (struct mtd_info *mtd, int max_chips);
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/* Separate phases of nand_scan(), allowing board driver to intervene
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* and override command or ECC setup according to flash type */
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extern int nand_scan_ident(struct mtd_info *mtd, int max_chips);
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extern int nand_scan_ident(struct mtd_info *mtd, int max_chips,
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struct nand_flash_dev *table);
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extern int nand_scan_tail(struct mtd_info *mtd);
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/* Free resources held by the NAND device */
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@ -38,6 +40,12 @@ extern void nand_release (struct mtd_info *mtd);
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/* Internal helper for board drivers which need to override command function */
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extern void nand_wait_ready(struct mtd_info *mtd);
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/* locks all blockes present in the device */
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extern int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
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/* unlocks specified locked blockes */
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extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
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/* The maximum number of NAND chips in an array */
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#define NAND_MAX_CHIPS 8
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@ -45,7 +53,7 @@ extern void nand_wait_ready(struct mtd_info *mtd);
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* is supported now. If you add a chip with bigger oobsize/page
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* adjust this accordingly.
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*/
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#define NAND_MAX_OOBSIZE 128
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#define NAND_MAX_OOBSIZE 256
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#define NAND_MAX_PAGESIZE 4096
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/*
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@ -82,6 +90,10 @@ extern void nand_wait_ready(struct mtd_info *mtd);
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#define NAND_CMD_ERASE2 0xd0
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#define NAND_CMD_RESET 0xff
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#define NAND_CMD_LOCK 0x2a
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#define NAND_CMD_UNLOCK1 0x23
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#define NAND_CMD_UNLOCK2 0x24
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/* Extended commands for large page devices */
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#define NAND_CMD_READSTART 0x30
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#define NAND_CMD_RNDOUTSTART 0xE0
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#define NAND_NO_READRDY 0x00000100
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/* Chip does not allow subpage writes */
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#define NAND_NO_SUBPAGE_WRITE 0x00000200
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/* Chip stores bad block marker on the last page of the eraseblock */
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#define NAND_BB_LAST_PAGE 0x00000400
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/* Device is one of 'new' xD cards that expose fake nand command set */
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#define NAND_BROKEN_XD 0x00000400
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/* Device behaves just like nand, but is readonly */
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#define NAND_ROM 0x00000800
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/* Options valid for Samsung large page devices */
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#define NAND_SAMSUNG_LP_OPTIONS \
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@ -391,6 +411,7 @@ struct nand_chip {
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int subpagesize;
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uint8_t cellinfo;
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int badblockpos;
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int badblockbits;
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flstate_t state;
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@ -125,6 +125,9 @@ struct onenand_chip {
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flstate_t state;
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unsigned char *page_buf;
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unsigned char *oob_buf;
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#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
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unsigned char *verify_buf;
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#endif
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int subpagesize;
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struct nand_ecclayout *ecclayout;
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@ -175,10 +178,14 @@ struct onenand_chip {
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#define ONENAND_HAS_CONT_LOCK (0x0001)
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#define ONENAND_HAS_UNLOCK_ALL (0x0002)
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#define ONENAND_HAS_2PLANE (0x0004)
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#define ONENAND_HAS_4KB_PAGE (0x0008)
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#define ONENAND_SKIP_UNLOCK_CHECK (0x0100)
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#define ONENAND_PAGEBUF_ALLOC (0x1000)
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#define ONENAND_OOBBUF_ALLOC (0x2000)
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#define ONENAND_IS_4KB_PAGE(this) \
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(this->options & ONENAND_HAS_4KB_PAGE)
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/*
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* OneNAND Flash Manufacturer ID Codes
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*/
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@ -205,6 +212,8 @@ struct mtd_partition;
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struct onenand_platform_data {
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void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
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int (*read_bufferram)(struct mtd_info *mtd, int area,
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unsigned char *buffer, int offset, size_t count);
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struct mtd_partition *parts;
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unsigned int nr_parts;
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};
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@ -93,8 +93,6 @@
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#define INIT_FL4ECCRESULT_VAL 0x03FF03FF
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#define LOOP_TIMEOUT_MAX 0x00010000
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#define mtd_to_flctl(mtd) container_of(mtd, struct sh_flctl, mtd)
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struct sh_flctl {
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struct mtd_info mtd;
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struct nand_chip chip;
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@ -125,4 +123,9 @@ struct sh_flctl_platform_data {
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unsigned has_hwecc:1;
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};
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static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo)
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{
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return container_of(mtdinfo, struct sh_flctl, mtd);
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}
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#endif /* __SH_FLCTL_H__ */
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