diff --git a/bindings/prng/msm-rng.txt b/bindings/prng/msm-rng.txt
new file mode 100644
index 000000000000..917c2fb58a3f
--- /dev/null
+++ b/bindings/prng/msm-rng.txt
@@ -0,0 +1,18 @@
+* RNG (Random Number Generator)
+
+Required properties:
+- compatible : Should be "qcom,msm-rng"
+- reg        : Offset and length of the register set for the device
+
+Optional property:
+- qcom,msm-rng-iface-clk : If the device uses iface-clk.
+- qcom,no-qrng-config    : Flag to decide whether the driver do the hardware configuration or not.
+
+Example:
+
+	qcom,msm-rng@f9bff000 {
+		compatible = "qcom,msm-rng";
+		reg = <0xf9bff000 0x200>;
+		qcom,msm-rng-iface-clk;
+		qcom,no-qrng-config;
+	};
diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index dafb9e830d41..f91a4c398ff5 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -2621,6 +2621,16 @@
 		clock-names = "eud_ahb2phy_clk";
 		status = "ok";
 	};
+
+	qcom_rng: qrng@10d3000 {
+		compatible = "qcom,msm-rng";
+		reg = <0x10d3000 0x1000>;
+		qcom,no-qrng-config;
+		interconnect-names = "data_path";
+		interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_HWKM>;
+		clock-names = "km_clk_src";
+		clocks = <&clock_rpmh RPMH_HWKM_CLK>;
+	};
 };
 
 #include "lahaina-regulators.dtsi"