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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (49 commits) powerpc: Fix build bug with binutils < 2.18 and GCC < 4.2 powerpc/eeh: Don't panic when EEH_MAX_FAILS is exceeded fbdev: Teaches offb about palette on radeon r5xx/r6xx powerpc/cell/edac: Log a syndrome code in case of correctable error powerpc/cell: Add DMA_ATTR_WEAK_ORDERING dma attribute and use in Cell IOMMU code powerpc: Indicate which oprofile counters to use while in compat mode powerpc/boot: Change spaces to tabs powerpc: Remove duplicate 6xx option in Kconfig powerpc: Use PPC_LONG and PPC_LONG_ALIGN in lib/string.S powerpc: Use PPC_LONG_ALIGN in uaccess.h powerpc: Add a #define for aligning to a long-sized boundary powerpc: Fix OF parsing of 64 bits PCI addresses powerpc: Use WARN_ON(1) instead of __WARN() powerpc: Fix support for latencytop powerpc/ps3: Update ps3_defconfig powerpc/ps3: Add a sub-match id to ps3_system_bus powerpc: Add a 6xx defconfig powerpc/dma: Use the struct dma_attrs in iommu code powerpc/cell: Add support for power button of future IBM cell blades powerpc/cell: Cleanup sysreset_hack for IBM cell blades ...
This commit is contained in:
commit
06b8147c5d
111 changed files with 6416 additions and 1612 deletions
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@ -22,6 +22,7 @@
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#define PPC_STL stringify_in_c(std)
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#define PPC_LCMPI stringify_in_c(cmpdi)
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#define PPC_LONG stringify_in_c(.llong)
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#define PPC_LONG_ALIGN stringify_in_c(.balign 8)
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#define PPC_TLNEI stringify_in_c(tdnei)
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#define PPC_LLARX stringify_in_c(ldarx)
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#define PPC_STLCX stringify_in_c(stdcx.)
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@ -43,6 +44,7 @@
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#define PPC_STL stringify_in_c(stw)
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#define PPC_LCMPI stringify_in_c(cmpwi)
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#define PPC_LONG stringify_in_c(.long)
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#define PPC_LONG_ALIGN stringify_in_c(.balign 4)
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#define PPC_TLNEI stringify_in_c(twnei)
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#define PPC_LLARX stringify_in_c(lwarx)
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#define PPC_STLCX stringify_in_c(stwcx.)
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@ -80,7 +80,8 @@ struct machdep_calls {
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long index,
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long npages,
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unsigned long uaddr,
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enum dma_data_direction direction);
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enum dma_data_direction direction,
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struct dma_attrs *attrs);
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void (*tce_free)(struct iommu_table *tbl,
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long index,
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long npages);
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@ -295,10 +295,10 @@ extern int icache_44x_need_flush;
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#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
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#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
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#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
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#define _PAGE_ACCESSED 0x00004 /* S: Page referenced */
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#define _PAGE_HWWRITE 0x00008 /* H: Dirty & RW, set in exception */
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#define _PAGE_RW 0x00010 /* S: Write permission */
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#define _PAGE_HWEXEC 0x00020 /* H: UX permission */
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#define _PAGE_RW 0x00004 /* S: Write permission (SW) */
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#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
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#define _PAGE_HWEXEC 0x00010 /* H: SX permission */
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#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
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#define _PAGE_ENDIAN 0x00040 /* H: E bit */
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#define _PAGE_GUARDED 0x00080 /* H: G bit */
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@ -307,21 +307,14 @@ extern int icache_44x_need_flush;
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#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
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#ifdef CONFIG_PTE_64BIT
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#define _PAGE_DIRTY 0x08000 /* S: Page dirty */
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/* ERPN in a PTE never gets cleared, ignore it */
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#define _PTE_NONE_MASK 0xffffffffffff0000ULL
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#else
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#define _PAGE_DIRTY 0x00800 /* S: Page dirty */
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#endif
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#define _PMD_PRESENT 0
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#define _PMD_PRESENT_MASK (PAGE_MASK)
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#define _PMD_BAD (~PAGE_MASK)
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/* Until my rework is finished, FSL BookE still needs atomic PTE updates */
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#define PTE_ATOMIC_UPDATES 1
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#elif defined(CONFIG_8xx)
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/* Definitions for 8xx embedded chips. */
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#define _PAGE_PRESENT 0x0001 /* Page is valid */
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@ -30,6 +30,7 @@
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#ifdef __KERNEL__
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#define PMI_TYPE_FREQ_CHANGE 0x01
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#define PMI_TYPE_POWER_BUTTON 0x02
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#define PMI_READ_TYPE 0
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#define PMI_READ_DATA0 1
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#define PMI_READ_DATA1 2
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@ -337,12 +337,18 @@ enum ps3_system_bus_device_type {
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PS3_DEVICE_TYPE_LPM,
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};
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enum ps3_match_sub_id {
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/* for PS3_MATCH_ID_GRAPHICS */
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PS3_MATCH_SUB_ID_FB = 1,
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};
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/**
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* struct ps3_system_bus_device - a device on the system bus
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*/
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struct ps3_system_bus_device {
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enum ps3_match_id match_id;
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enum ps3_match_sub_id match_sub_id;
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enum ps3_system_bus_device_type dev_type;
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u64 bus_id; /* SB */
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@ -371,6 +377,7 @@ int ps3_close_hv_device(struct ps3_system_bus_device *dev);
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struct ps3_system_bus_driver {
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enum ps3_match_id match_id;
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enum ps3_match_sub_id match_sub_id;
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struct device_driver core;
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int (*probe)(struct ps3_system_bus_device *);
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int (*remove)(struct ps3_system_bus_device *);
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@ -155,10 +155,12 @@
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#define CTRL_RUNLATCH 0x1
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#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
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#define DABR_TRANSLATION (1UL << 2)
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#define SPRN_DABR2 0x13D /* e300 */
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#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */
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#define DABRX_USER (1UL << 0)
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#define DABRX_KERNEL (1UL << 1)
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#define SPRN_DAR 0x013 /* Data Address Register */
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#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */
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#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
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#define DSISR_NOHPTE 0x40000000 /* no translation found */
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#define DSISR_PROTFAULT 0x08000000 /* protection fault */
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@ -264,6 +266,8 @@
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#define HID1_PS (1<<16) /* 750FX PLL selection */
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#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */
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#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
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#define SPRN_IABR2 0x3FA /* 83xx */
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#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */
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#define SPRN_HID4 0x3F4 /* 970 HID4 */
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#define SPRN_HID5 0x3F6 /* 970 HID5 */
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#define SPRN_HID6 0x3F9 /* BE HID 6 */
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@ -6,6 +6,7 @@
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#include <linux/sched.h>
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#include <linux/errno.h>
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#include <asm/asm-compat.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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@ -141,12 +142,11 @@ extern long __put_user_bad(void);
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" b 2b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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" .balign %5\n" \
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PPC_LONG_ALIGN "\n" \
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PPC_LONG "1b,3b\n" \
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".previous" \
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: "=r" (err) \
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: "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\
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"i"(sizeof(unsigned long)))
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: "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
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#ifdef __powerpc64__
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#define __put_user_asm2(x, ptr, retval) \
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@ -162,13 +162,12 @@ extern long __put_user_bad(void);
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" b 3b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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" .balign %5\n" \
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PPC_LONG_ALIGN "\n" \
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PPC_LONG "1b,4b\n" \
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PPC_LONG "2b,4b\n" \
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".previous" \
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: "=r" (err) \
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: "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\
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"i"(sizeof(unsigned long)))
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: "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
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#endif /* __powerpc64__ */
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#define __put_user_size(x, ptr, size, retval) \
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@ -226,12 +225,11 @@ extern long __get_user_bad(void);
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" b 2b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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" .balign %5\n" \
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PPC_LONG_ALIGN "\n" \
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PPC_LONG "1b,3b\n" \
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".previous" \
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: "=r" (err), "=r" (x) \
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: "b" (addr), "i" (-EFAULT), "0" (err), \
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"i"(sizeof(unsigned long)))
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: "b" (addr), "i" (-EFAULT), "0" (err))
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#ifdef __powerpc64__
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#define __get_user_asm2(x, addr, err) \
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@ -249,13 +247,12 @@ extern long __get_user_bad(void);
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" b 3b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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" .balign %5\n" \
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PPC_LONG_ALIGN "\n" \
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PPC_LONG "1b,4b\n" \
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PPC_LONG "2b,4b\n" \
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".previous" \
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: "=r" (err), "=&r" (x) \
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: "b" (addr), "i" (-EFAULT), "0" (err), \
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"i"(sizeof(unsigned long)))
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: "b" (addr), "i" (-EFAULT), "0" (err))
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#endif /* __powerpc64__ */
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#define __get_user_size(x, ptr, size, retval) \
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@ -156,11 +156,11 @@ struct ucc_fast_info {
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struct ucc_fast_private {
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struct ucc_fast_info *uf_info;
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struct ucc_fast *uf_regs; /* a pointer to memory map of UCC regs. */
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u32 *p_ucce; /* a pointer to the event register in memory. */
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u32 *p_uccm; /* a pointer to the mask register in memory. */
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struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */
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u32 __iomem *p_ucce; /* a pointer to the event register in memory. */
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u32 __iomem *p_uccm; /* a pointer to the mask register in memory. */
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#ifdef CONFIG_UGETH_TX_ON_DEMAND
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u16 *p_utodr; /* pointer to the transmit on demand register */
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u16 __iomem *p_utodr; /* pointer to the transmit on demand register */
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#endif
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int enabled_tx; /* Whether channel is enabled for Tx (ENT) */
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int enabled_rx; /* Whether channel is enabled for Rx (ENR) */
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@ -12,6 +12,7 @@
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*/
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enum dma_attr {
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DMA_ATTR_WRITE_BARRIER,
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DMA_ATTR_WEAK_ORDERING,
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DMA_ATTR_MAX,
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};
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@ -135,11 +135,7 @@ struct fs_platform_info {
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u32 device_flags;
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int phy_addr; /* the phy address (-1 no phy) */
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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char bus_id[16];
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#else
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const char* bus_id;
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#endif
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int phy_irq; /* the phy irq (if it exists) */
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const struct fs_mii_bus_info *bus_info;
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@ -69,6 +69,7 @@ struct gianfar_mdio_data {
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#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
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#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
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#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
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#define FSL_GIANFAR_DEV_HAS_MAGIC_PACKET 0x00000100
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/* Flags in gianfar_platform_data */
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#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
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@ -125,4 +126,10 @@ struct mpc8xx_pcmcia_ops {
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int(*voltage_set)(int slot, int vcc, int vpp);
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};
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/* Returns non-zero if the current suspend operation would
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* lead to a deep sleep (i.e. power removed from the core,
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* instead of just the clock).
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*/
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int fsl_deep_sleep(void);
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#endif /* _FSL_DEVICE_H_ */
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@ -15,7 +15,7 @@
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#define __LINUX_OF_GPIO_H
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#include <linux/errno.h>
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#include <asm/gpio.h>
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#include <linux/gpio.h>
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#ifdef CONFIG_OF_GPIO
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