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These are the bulk pinctrl changes for kernel v3.7:

Browse source 
- Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs,
   provide platform config for the Nomadik.
 - Add a driver for the i.MX35.
 - Add a driver for the BCM2835, an advanced GPIO expander.
 - Various fixes and clean-ups and minor improvements for the core,
   Nomadik, pinctr-single, sirf drivers.
 - Some platform config for the ux500.
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Merge tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl changes from Linus Walleij:
 "Some of this stuff is hitting arch/arm/* and have been ACKed by the
  ARM SoC folks, or it's device tree bindings pertaining to the specific
  driver.

  These are the bulk pinctrl changes for kernel v3.7:
   - Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs,
     provide platform config for the Nomadik.
   - Add a driver for the i.MX35.
   - Add a driver for the BCM2835, an advanced GPIO expander.
   - Various fixes and clean-ups and minor improvements for the core,
     Nomadik, pinctr-single, sirf drivers.
   - Some platform config for the ux500."

* tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (27 commits)
  pinctrl: add bcm2835 driver
  pinctrl: clarify idle vs sleep states
  pinctrl/nomadik: use irq_find_mapping()
  pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irq
  pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_range
  pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_input
  pinctrl: sirf: add missing pins to pinctrl list
  pinctrl: sirf: fix a typo in sirfsoc_gpio_probe
  pinctrl: pinctrl-single: add debugfs pin h/w state info
  ARM: ux500: 8500: update I2C sleep states pinctrl
  pinctrl: Fix potential memory leak in pinctrl_register_one_pin()
  ARM: ux500: tidy up pin sleep modes
  ARM: ux500: fix spi2 pin group
  pinctrl: imx: remove duplicated const
  pinctrl: document semantics vs GPIO
  ARM: ux500: 8500: use hsit_a_2 group for HSI
  pinctrl: use kasprintf() in pinmux_request_gpio()
  pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux
  pinctrl/nomadik : add MC1_a_2 pin MC1 function group list
  pinctrl: pinctrl-single: Make sure we do not change bits outside of mask
  ...
This commit is contained in:
Linus Torvalds 2012-10-02 16:20:20 -07:00
commit 06fe918e9f
26 changed files with 5868 additions and 516 deletions
Download patch file Download diff file Expand all files Collapse all files

21
drivers/pinctrl/Kconfig
View file

@ -26,11 +26,24 @@ config DEBUG_PINCTRL
help
Say Y here to add some extra checks and diagnostics to PINCTRL calls.
config PINCTRL_BCM2835
bool
select PINMUX
select PINCONF
config PINCTRL_IMX
bool
select PINMUX
select PINCONF
config PINCTRL_IMX35
bool "IMX35 pinctrl driver"
depends on OF
depends on SOC_IMX35
select PINCTRL_IMX
help
Say Y here to enable the imx35 pinctrl driver
config PINCTRL_IMX51
bool "IMX51 pinctrl driver"
depends on OF
@ -86,10 +99,18 @@ config PINCTRL_NOMADIK
select PINMUX
select PINCONF
config PINCTRL_STN8815
bool "STN8815 pin controller driver"
depends on PINCTRL_NOMADIK && ARCH_NOMADIK
config PINCTRL_DB8500
bool "DB8500 pin controller driver"
depends on PINCTRL_NOMADIK && ARCH_U8500
config PINCTRL_DB8540
bool "DB8540 pin controller driver"
depends on PINCTRL_NOMADIK && ARCH_U8500
config PINCTRL_PXA168
bool "PXA168 pin controller driver"
depends on ARCH_MMP

4
drivers/pinctrl/Makefile
View file

@ -9,7 +9,9 @@ ifeq ($(CONFIG_OF),y)
obj-$(CONFIG_PINCTRL) += devicetree.o
endif
obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o
obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o
obj-$(CONFIG_PINCTRL_IMX) += pinctrl-imx.o
obj-$(CONFIG_PINCTRL_IMX35) += pinctrl-imx35.o
obj-$(CONFIG_PINCTRL_IMX51) += pinctrl-imx51.o
obj-$(CONFIG_PINCTRL_IMX53) += pinctrl-imx53.o
obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6q.o
@ -19,7 +21,9 @@ obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o
obj-$(CONFIG_PINCTRL_IMX23) += pinctrl-imx23.o
obj-$(CONFIG_PINCTRL_IMX28) += pinctrl-imx28.o
obj-$(CONFIG_PINCTRL_NOMADIK) += pinctrl-nomadik.o
obj-$(CONFIG_PINCTRL_STN8815) += pinctrl-nomadik-stn8815.o
obj-$(CONFIG_PINCTRL_DB8500) += pinctrl-nomadik-db8500.o
obj-$(CONFIG_PINCTRL_DB8540) += pinctrl-nomadik-db8540.o
obj-$(CONFIG_PINCTRL_PXA168) += pinctrl-pxa168.o
obj-$(CONFIG_PINCTRL_PXA910) += pinctrl-pxa910.o
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o

4
drivers/pinctrl/core.c
View file

@ -230,8 +230,10 @@ static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
pindesc->name = name;
} else {
pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
if (pindesc->name == NULL)
if (pindesc->name == NULL) {
kfree(pindesc);
return -ENOMEM;
}
pindesc->dynamic_name = true;
}

1075
drivers/pinctrl/pinctrl-bcm2835.c Normal file
View file

File diff suppressed because it is too large Load diff

2
drivers/pinctrl/pinctrl-imx.c
View file

@ -432,7 +432,7 @@ static int __devinit imx_pinctrl_parse_groups(struct device_node *np,
{
unsigned int pin_func_id;
int ret, size;
const const __be32 *list;
const __be32 *list;
int i, j;
u32 config;

1595
drivers/pinctrl/pinctrl-imx35.c Normal file
View file

File diff suppressed because it is too large Load diff

490
drivers/pinctrl/pinctrl-imx51.c
View file

@ -23,251 +23,251 @@
#include "pinctrl-imx.h"
enum imx51_pads {
MX51_PAD_EIM_D16 = 1,
MX51_PAD_EIM_D17 = 2,
MX51_PAD_EIM_D18 = 3,
MX51_PAD_EIM_D19 = 4,
MX51_PAD_EIM_D20 = 5,
MX51_PAD_EIM_D21 = 6,
MX51_PAD_EIM_D22 = 7,
MX51_PAD_EIM_D23 = 8,
MX51_PAD_EIM_D24 = 9,
MX51_PAD_EIM_D25 = 10,
MX51_PAD_EIM_D26 = 11,
MX51_PAD_EIM_D27 = 12,
MX51_PAD_EIM_D28 = 13,
MX51_PAD_EIM_D29 = 14,
MX51_PAD_EIM_D30 = 15,
MX51_PAD_EIM_D31 = 16,
MX51_PAD_EIM_A16 = 17,
MX51_PAD_EIM_A17 = 18,
MX51_PAD_EIM_A18 = 19,
MX51_PAD_EIM_A19 = 20,
MX51_PAD_EIM_A20 = 21,
MX51_PAD_EIM_A21 = 22,
MX51_PAD_EIM_A22 = 23,
MX51_PAD_EIM_A23 = 24,
MX51_PAD_EIM_A24 = 25,
MX51_PAD_EIM_A25 = 26,
MX51_PAD_EIM_A26 = 27,
MX51_PAD_EIM_A27 = 28,
MX51_PAD_EIM_EB0 = 29,
MX51_PAD_EIM_EB1 = 30,
MX51_PAD_EIM_EB2 = 31,
MX51_PAD_EIM_EB3 = 32,
MX51_PAD_EIM_OE = 33,
MX51_PAD_EIM_CS0 = 34,
MX51_PAD_EIM_CS1 = 35,
MX51_PAD_EIM_CS2 = 36,
MX51_PAD_EIM_CS3 = 37,
MX51_PAD_EIM_CS4 = 38,
MX51_PAD_EIM_CS5 = 39,
MX51_PAD_EIM_DTACK = 40,
MX51_PAD_EIM_LBA = 41,
MX51_PAD_EIM_CRE = 42,
MX51_PAD_DRAM_CS1 = 43,
MX51_PAD_NANDF_WE_B = 44,
MX51_PAD_NANDF_RE_B = 45,
MX51_PAD_NANDF_ALE = 46,
MX51_PAD_NANDF_CLE = 47,
MX51_PAD_NANDF_WP_B = 48,
MX51_PAD_NANDF_RB0 = 49,
MX51_PAD_NANDF_RB1 = 50,
MX51_PAD_NANDF_RB2 = 51,
MX51_PAD_NANDF_RB3 = 52,
MX51_PAD_GPIO_NAND = 53,
MX51_PAD_NANDF_CS0 = 54,
MX51_PAD_NANDF_CS1 = 55,
MX51_PAD_NANDF_CS2 = 56,
MX51_PAD_NANDF_CS3 = 57,
MX51_PAD_NANDF_CS4 = 58,
MX51_PAD_NANDF_CS5 = 59,
MX51_PAD_NANDF_CS6 = 60,
MX51_PAD_NANDF_CS7 = 61,
MX51_PAD_NANDF_RDY_INT = 62,
MX51_PAD_NANDF_D15 = 63,
MX51_PAD_NANDF_D14 = 64,
MX51_PAD_NANDF_D13 = 65,
MX51_PAD_NANDF_D12 = 66,
MX51_PAD_NANDF_D11 = 67,
MX51_PAD_NANDF_D10 = 68,
MX51_PAD_NANDF_D9 = 69,
MX51_PAD_NANDF_D8 = 70,
MX51_PAD_NANDF_D7 = 71,
MX51_PAD_NANDF_D6 = 72,
MX51_PAD_NANDF_D5 = 73,
MX51_PAD_NANDF_D4 = 74,
MX51_PAD_NANDF_D3 = 75,
MX51_PAD_NANDF_D2 = 76,
MX51_PAD_NANDF_D1 = 77,
MX51_PAD_NANDF_D0 = 78,
MX51_PAD_CSI1_D8 = 79,
MX51_PAD_CSI1_D9 = 80,
MX51_PAD_CSI1_D10 = 81,
MX51_PAD_CSI1_D11 = 82,
MX51_PAD_CSI1_D12 = 83,
MX51_PAD_CSI1_D13 = 84,
MX51_PAD_CSI1_D14 = 85,
MX51_PAD_CSI1_D15 = 86,
MX51_PAD_CSI1_D16 = 87,
MX51_PAD_CSI1_D17 = 88,
MX51_PAD_CSI1_D18 = 89,
MX51_PAD_CSI1_D19 = 90,
MX51_PAD_CSI1_VSYNC = 91,
MX51_PAD_CSI1_HSYNC = 92,
MX51_PAD_CSI1_PIXCLK = 93,
MX51_PAD_CSI1_MCLK = 94,
MX51_PAD_CSI2_D12 = 95,
MX51_PAD_CSI2_D13 = 96,
MX51_PAD_CSI2_D14 = 97,
MX51_PAD_CSI2_D15 = 98,
MX51_PAD_CSI2_D16 = 99,
MX51_PAD_CSI2_D17 = 100,
MX51_PAD_CSI2_D18 = 101,
MX51_PAD_CSI2_D19 = 102,
MX51_PAD_CSI2_VSYNC = 103,
MX51_PAD_CSI2_HSYNC = 104,
MX51_PAD_CSI2_PIXCLK = 105,
MX51_PAD_I2C1_CLK = 106,
MX51_PAD_I2C1_DAT = 107,
MX51_PAD_AUD3_BB_TXD = 108,
MX51_PAD_AUD3_BB_RXD = 109,
MX51_PAD_AUD3_BB_CK = 110,
MX51_PAD_AUD3_BB_FS = 111,
MX51_PAD_CSPI1_MOSI = 112,
MX51_PAD_CSPI1_MISO = 113,
MX51_PAD_CSPI1_SS0 = 114,
MX51_PAD_CSPI1_SS1 = 115,
MX51_PAD_CSPI1_RDY = 116,
MX51_PAD_CSPI1_SCLK = 117,
MX51_PAD_UART1_RXD = 118,
MX51_PAD_UART1_TXD = 119,
MX51_PAD_UART1_RTS = 120,
MX51_PAD_UART1_CTS = 121,
MX51_PAD_UART2_RXD = 122,
MX51_PAD_UART2_TXD = 123,
MX51_PAD_UART3_RXD = 124,
MX51_PAD_UART3_TXD = 125,
MX51_PAD_OWIRE_LINE = 126,
MX51_PAD_KEY_ROW0 = 127,
MX51_PAD_KEY_ROW1 = 128,
MX51_PAD_KEY_ROW2 = 129,
MX51_PAD_KEY_ROW3 = 130,
MX51_PAD_KEY_COL0 = 131,
MX51_PAD_KEY_COL1 = 132,
MX51_PAD_KEY_COL2 = 133,
MX51_PAD_KEY_COL3 = 134,
MX51_PAD_KEY_COL4 = 135,
MX51_PAD_KEY_COL5 = 136,
MX51_PAD_USBH1_CLK = 137,
MX51_PAD_USBH1_DIR = 138,
MX51_PAD_USBH1_STP = 139,
MX51_PAD_USBH1_NXT = 140,
MX51_PAD_USBH1_DATA0 = 141,
MX51_PAD_USBH1_DATA1 = 142,
MX51_PAD_USBH1_DATA2 = 143,
MX51_PAD_USBH1_DATA3 = 144,
MX51_PAD_USBH1_DATA4 = 145,
MX51_PAD_USBH1_DATA5 = 146,
MX51_PAD_USBH1_DATA6 = 147,
MX51_PAD_USBH1_DATA7 = 148,
MX51_PAD_DI1_PIN11 = 149,
MX51_PAD_DI1_PIN12 = 150,
MX51_PAD_DI1_PIN13 = 151,
MX51_PAD_DI1_D0_CS = 152,
MX51_PAD_DI1_D1_CS = 153,
MX51_PAD_DISPB2_SER_DIN = 154,
MX51_PAD_DISPB2_SER_DIO = 155,
MX51_PAD_DISPB2_SER_CLK = 156,
MX51_PAD_DISPB2_SER_RS = 157,
MX51_PAD_DISP1_DAT0 = 158,
MX51_PAD_DISP1_DAT1 = 159,
MX51_PAD_DISP1_DAT2 = 160,
MX51_PAD_DISP1_DAT3 = 161,
MX51_PAD_DISP1_DAT4 = 162,
MX51_PAD_DISP1_DAT5 = 163,
MX51_PAD_DISP1_DAT6 = 164,
MX51_PAD_DISP1_DAT7 = 165,
MX51_PAD_DISP1_DAT8 = 166,
MX51_PAD_DISP1_DAT9 = 167,
MX51_PAD_DISP1_DAT10 = 168,
MX51_PAD_DISP1_DAT11 = 169,
MX51_PAD_DISP1_DAT12 = 170,
MX51_PAD_DISP1_DAT13 = 171,
MX51_PAD_DISP1_DAT14 = 172,
MX51_PAD_DISP1_DAT15 = 173,
MX51_PAD_DISP1_DAT16 = 174,
MX51_PAD_DISP1_DAT17 = 175,
MX51_PAD_DISP1_DAT18 = 176,
MX51_PAD_DISP1_DAT19 = 177,
MX51_PAD_DISP1_DAT20 = 178,
MX51_PAD_DISP1_DAT21 = 179,
MX51_PAD_DISP1_DAT22 = 180,
MX51_PAD_DISP1_DAT23 = 181,
MX51_PAD_DI1_PIN3 = 182,
MX51_PAD_DI1_PIN2 = 183,
MX51_PAD_DI_GP2 = 184,
MX51_PAD_DI_GP3 = 185,
MX51_PAD_DI2_PIN4 = 186,
MX51_PAD_DI2_PIN2 = 187,
MX51_PAD_DI2_PIN3 = 188,
MX51_PAD_DI2_DISP_CLK = 189,
MX51_PAD_DI_GP4 = 190,
MX51_PAD_DISP2_DAT0 = 191,
MX51_PAD_DISP2_DAT1 = 192,
MX51_PAD_DISP2_DAT2 = 193,
MX51_PAD_DISP2_DAT3 = 194,
MX51_PAD_DISP2_DAT4 = 195,
MX51_PAD_DISP2_DAT5 = 196,
MX51_PAD_DISP2_DAT6 = 197,
MX51_PAD_DISP2_DAT7 = 198,
MX51_PAD_DISP2_DAT8 = 199,
MX51_PAD_DISP2_DAT9 = 200,
MX51_PAD_DISP2_DAT10 = 201,
MX51_PAD_DISP2_DAT11 = 202,
MX51_PAD_DISP2_DAT12 = 203,
MX51_PAD_DISP2_DAT13 = 204,
MX51_PAD_DISP2_DAT14 = 205,
MX51_PAD_DISP2_DAT15 = 206,
MX51_PAD_SD1_CMD = 207,
MX51_PAD_SD1_CLK = 208,
MX51_PAD_SD1_DATA0 = 209,
MX51_PAD_EIM_DA0 = 210,
MX51_PAD_EIM_DA1 = 211,
MX51_PAD_EIM_DA2 = 212,
MX51_PAD_EIM_DA3 = 213,
MX51_PAD_SD1_DATA1 = 214,
MX51_PAD_EIM_DA4 = 215,
MX51_PAD_EIM_DA5 = 216,
MX51_PAD_EIM_DA6 = 217,
MX51_PAD_EIM_DA7 = 218,
MX51_PAD_SD1_DATA2 = 219,
MX51_PAD_EIM_DA10 = 220,
MX51_PAD_EIM_DA11 = 221,
MX51_PAD_EIM_DA8 = 222,
MX51_PAD_EIM_DA9 = 223,
MX51_PAD_SD1_DATA3 = 224,
MX51_PAD_GPIO1_0 = 225,
MX51_PAD_GPIO1_1 = 226,
MX51_PAD_EIM_DA12 = 227,
MX51_PAD_EIM_DA13 = 228,
MX51_PAD_EIM_DA14 = 229,
MX51_PAD_EIM_DA15 = 230,
MX51_PAD_SD2_CMD = 231,
MX51_PAD_SD2_CLK = 232,
MX51_PAD_SD2_DATA0 = 233,
MX51_PAD_SD2_DATA1 = 234,
MX51_PAD_SD2_DATA2 = 235,
MX51_PAD_SD2_DATA3 = 236,
MX51_PAD_GPIO1_2 = 237,
MX51_PAD_GPIO1_3 = 238,
MX51_PAD_PMIC_INT_REQ = 239,
MX51_PAD_GPIO1_4 = 240,
MX51_PAD_GPIO1_5 = 241,
MX51_PAD_GPIO1_6 = 242,
MX51_PAD_GPIO1_7 = 243,
MX51_PAD_GPIO1_8 = 244,
MX51_PAD_GPIO1_9 = 245,
MX51_PAD_EIM_D16 = 0,
MX51_PAD_EIM_D17 = 1,
MX51_PAD_EIM_D18 = 2,
MX51_PAD_EIM_D19 = 3,
MX51_PAD_EIM_D20 = 4,
MX51_PAD_EIM_D21 = 5,
MX51_PAD_EIM_D22 = 6,
MX51_PAD_EIM_D23 = 7,
MX51_PAD_EIM_D24 = 8,
MX51_PAD_EIM_D25 = 9,
MX51_PAD_EIM_D26 = 10,
MX51_PAD_EIM_D27 = 11,
MX51_PAD_EIM_D28 = 12,
MX51_PAD_EIM_D29 = 13,
MX51_PAD_EIM_D30 = 14,
MX51_PAD_EIM_D31 = 15,
MX51_PAD_EIM_A16 = 16,
MX51_PAD_EIM_A17 = 17,
MX51_PAD_EIM_A18 = 18,
MX51_PAD_EIM_A19 = 19,
MX51_PAD_EIM_A20 = 20,
MX51_PAD_EIM_A21 = 21,
MX51_PAD_EIM_A22 = 22,
MX51_PAD_EIM_A23 = 23,
MX51_PAD_EIM_A24 = 24,
MX51_PAD_EIM_A25 = 25,
MX51_PAD_EIM_A26 = 26,
MX51_PAD_EIM_A27 = 27,
MX51_PAD_EIM_EB0 = 28,
MX51_PAD_EIM_EB1 = 29,
MX51_PAD_EIM_EB2 = 30,
MX51_PAD_EIM_EB3 = 31,
MX51_PAD_EIM_OE = 32,
MX51_PAD_EIM_CS0 = 33,
MX51_PAD_EIM_CS1 = 34,
MX51_PAD_EIM_CS2 = 35,
MX51_PAD_EIM_CS3 = 36,
MX51_PAD_EIM_CS4 = 37,
MX51_PAD_EIM_CS5 = 38,
MX51_PAD_EIM_DTACK = 39,
MX51_PAD_EIM_LBA = 40,
MX51_PAD_EIM_CRE = 41,
MX51_PAD_DRAM_CS1 = 42,
MX51_PAD_NANDF_WE_B = 43,
MX51_PAD_NANDF_RE_B = 44,
MX51_PAD_NANDF_ALE = 45,
MX51_PAD_NANDF_CLE = 46,
MX51_PAD_NANDF_WP_B = 47,
MX51_PAD_NANDF_RB0 = 48,
MX51_PAD_NANDF_RB1 = 49,
MX51_PAD_NANDF_RB2 = 50,
MX51_PAD_NANDF_RB3 = 51,
MX51_PAD_GPIO_NAND = 52,
MX51_PAD_NANDF_CS0 = 53,
MX51_PAD_NANDF_CS1 = 54,
MX51_PAD_NANDF_CS2 = 55,
MX51_PAD_NANDF_CS3 = 56,
MX51_PAD_NANDF_CS4 = 57,
MX51_PAD_NANDF_CS5 = 58,
MX51_PAD_NANDF_CS6 = 59,
MX51_PAD_NANDF_CS7 = 60,
MX51_PAD_NANDF_RDY_INT = 61,
MX51_PAD_NANDF_D15 = 62,
MX51_PAD_NANDF_D14 = 63,
MX51_PAD_NANDF_D13 = 64,
MX51_PAD_NANDF_D12 = 65,
MX51_PAD_NANDF_D11 = 66,
MX51_PAD_NANDF_D10 = 67,
MX51_PAD_NANDF_D9 = 68,
MX51_PAD_NANDF_D8 = 69,
MX51_PAD_NANDF_D7 = 70,
MX51_PAD_NANDF_D6 = 71,
MX51_PAD_NANDF_D5 = 72,
MX51_PAD_NANDF_D4 = 73,
MX51_PAD_NANDF_D3 = 74,
MX51_PAD_NANDF_D2 = 75,
MX51_PAD_NANDF_D1 = 76,
MX51_PAD_NANDF_D0 = 77,
MX51_PAD_CSI1_D8 = 78,
MX51_PAD_CSI1_D9 = 79,
MX51_PAD_CSI1_D10 = 80,
MX51_PAD_CSI1_D11 = 81,
MX51_PAD_CSI1_D12 = 82,
MX51_PAD_CSI1_D13 = 83,
MX51_PAD_CSI1_D14 = 84,
MX51_PAD_CSI1_D15 = 85,
MX51_PAD_CSI1_D16 = 86,
MX51_PAD_CSI1_D17 = 87,
MX51_PAD_CSI1_D18 = 88,
MX51_PAD_CSI1_D19 = 89,
MX51_PAD_CSI1_VSYNC = 90,
MX51_PAD_CSI1_HSYNC = 91,
MX51_PAD_CSI1_PIXCLK = 92,
MX51_PAD_CSI1_MCLK = 93,
MX51_PAD_CSI2_D12 = 94,
MX51_PAD_CSI2_D13 = 95,
MX51_PAD_CSI2_D14 = 96,
MX51_PAD_CSI2_D15 = 97,
MX51_PAD_CSI2_D16 = 98,
MX51_PAD_CSI2_D17 = 99,
MX51_PAD_CSI2_D18 = 100,
MX51_PAD_CSI2_D19 = 101,
MX51_PAD_CSI2_VSYNC = 102,
MX51_PAD_CSI2_HSYNC = 103,
MX51_PAD_CSI2_PIXCLK = 104,
MX51_PAD_I2C1_CLK = 105,
MX51_PAD_I2C1_DAT = 106,
MX51_PAD_AUD3_BB_TXD = 107,
MX51_PAD_AUD3_BB_RXD = 108,
MX51_PAD_AUD3_BB_CK = 109,
MX51_PAD_AUD3_BB_FS = 110,
MX51_PAD_CSPI1_MOSI = 111,
MX51_PAD_CSPI1_MISO = 112,
MX51_PAD_CSPI1_SS0 = 113,
MX51_PAD_CSPI1_SS1 = 114,
MX51_PAD_CSPI1_RDY = 115,
MX51_PAD_CSPI1_SCLK = 116,
MX51_PAD_UART1_RXD = 117,
MX51_PAD_UART1_TXD = 118,
MX51_PAD_UART1_RTS = 119,
MX51_PAD_UART1_CTS = 120,
MX51_PAD_UART2_RXD = 121,
MX51_PAD_UART2_TXD = 122,
MX51_PAD_UART3_RXD = 123,
MX51_PAD_UART3_TXD = 124,
MX51_PAD_OWIRE_LINE = 125,
MX51_PAD_KEY_ROW0 = 126,
MX51_PAD_KEY_ROW1 = 127,
MX51_PAD_KEY_ROW2 = 128,
MX51_PAD_KEY_ROW3 = 129,
MX51_PAD_KEY_COL0 = 130,
MX51_PAD_KEY_COL1 = 131,
MX51_PAD_KEY_COL2 = 132,
MX51_PAD_KEY_COL3 = 133,
MX51_PAD_KEY_COL4 = 134,
MX51_PAD_KEY_COL5 = 135,
MX51_PAD_USBH1_CLK = 136,
MX51_PAD_USBH1_DIR = 137,
MX51_PAD_USBH1_STP = 138,
MX51_PAD_USBH1_NXT = 139,
MX51_PAD_USBH1_DATA0 = 140,
MX51_PAD_USBH1_DATA1 = 141,
MX51_PAD_USBH1_DATA2 = 142,
MX51_PAD_USBH1_DATA3 = 143,
MX51_PAD_USBH1_DATA4 = 144,
MX51_PAD_USBH1_DATA5 = 145,
MX51_PAD_USBH1_DATA6 = 146,
MX51_PAD_USBH1_DATA7 = 147,
MX51_PAD_DI1_PIN11 = 148,
MX51_PAD_DI1_PIN12 = 149,
MX51_PAD_DI1_PIN13 = 150,
MX51_PAD_DI1_D0_CS = 151,
MX51_PAD_DI1_D1_CS = 152,
MX51_PAD_DISPB2_SER_DIN = 153,
MX51_PAD_DISPB2_SER_DIO = 154,
MX51_PAD_DISPB2_SER_CLK = 155,
MX51_PAD_DISPB2_SER_RS = 156,
MX51_PAD_DISP1_DAT0 = 157,
MX51_PAD_DISP1_DAT1 = 158,
MX51_PAD_DISP1_DAT2 = 159,
MX51_PAD_DISP1_DAT3 = 160,
MX51_PAD_DISP1_DAT4 = 161,
MX51_PAD_DISP1_DAT5 = 162,
MX51_PAD_DISP1_DAT6 = 163,
MX51_PAD_DISP1_DAT7 = 164,
MX51_PAD_DISP1_DAT8 = 165,
MX51_PAD_DISP1_DAT9 = 166,
MX51_PAD_DISP1_DAT10 = 167,
MX51_PAD_DISP1_DAT11 = 168,
MX51_PAD_DISP1_DAT12 = 169,
MX51_PAD_DISP1_DAT13 = 170,
MX51_PAD_DISP1_DAT14 = 171,
MX51_PAD_DISP1_DAT15 = 172,
MX51_PAD_DISP1_DAT16 = 173,
MX51_PAD_DISP1_DAT17 = 174,
MX51_PAD_DISP1_DAT18 = 175,
MX51_PAD_DISP1_DAT19 = 176,
MX51_PAD_DISP1_DAT20 = 177,
MX51_PAD_DISP1_DAT21 = 178,
MX51_PAD_DISP1_DAT22 = 179,
MX51_PAD_DISP1_DAT23 = 180,
MX51_PAD_DI1_PIN3 = 181,
MX51_PAD_DI1_PIN2 = 182,
MX51_PAD_DI_GP2 = 183,
MX51_PAD_DI_GP3 = 184,
MX51_PAD_DI2_PIN4 = 185,
MX51_PAD_DI2_PIN2 = 186,
MX51_PAD_DI2_PIN3 = 187,
MX51_PAD_DI2_DISP_CLK = 188,
MX51_PAD_DI_GP4 = 189,
MX51_PAD_DISP2_DAT0 = 190,
MX51_PAD_DISP2_DAT1 = 191,
MX51_PAD_DISP2_DAT2 = 192,
MX51_PAD_DISP2_DAT3 = 193,
MX51_PAD_DISP2_DAT4 = 194,
MX51_PAD_DISP2_DAT5 = 195,
MX51_PAD_DISP2_DAT6 = 196,
MX51_PAD_DISP2_DAT7 = 197,
MX51_PAD_DISP2_DAT8 = 198,
MX51_PAD_DISP2_DAT9 = 199,
MX51_PAD_DISP2_DAT10 = 200,
MX51_PAD_DISP2_DAT11 = 201,
MX51_PAD_DISP2_DAT12 = 202,
MX51_PAD_DISP2_DAT13 = 203,
MX51_PAD_DISP2_DAT14 = 204,
MX51_PAD_DISP2_DAT15 = 205,
MX51_PAD_SD1_CMD = 206,
MX51_PAD_SD1_CLK = 207,
MX51_PAD_SD1_DATA0 = 208,
MX51_PAD_EIM_DA0 = 209,
MX51_PAD_EIM_DA1 = 210,
MX51_PAD_EIM_DA2 = 211,
MX51_PAD_EIM_DA3 = 212,
MX51_PAD_SD1_DATA1 = 213,
MX51_PAD_EIM_DA4 = 214,
MX51_PAD_EIM_DA5 = 215,
MX51_PAD_EIM_DA6 = 216,
MX51_PAD_EIM_DA7 = 217,
MX51_PAD_SD1_DATA2 = 218,
MX51_PAD_EIM_DA10 = 219,
MX51_PAD_EIM_DA11 = 220,
MX51_PAD_EIM_DA8 = 221,
MX51_PAD_EIM_DA9 = 222,
MX51_PAD_SD1_DATA3 = 223,
MX51_PAD_GPIO1_0 = 224,
MX51_PAD_GPIO1_1 = 225,
MX51_PAD_EIM_DA12 = 226,
MX51_PAD_EIM_DA13 = 227,
MX51_PAD_EIM_DA14 = 228,
MX51_PAD_EIM_DA15 = 229,
MX51_PAD_SD2_CMD = 230,
MX51_PAD_SD2_CLK = 231,
MX51_PAD_SD2_DATA0 = 232,
MX51_PAD_SD2_DATA1 = 233,
MX51_PAD_SD2_DATA2 = 234,
MX51_PAD_SD2_DATA3 = 235,
MX51_PAD_GPIO1_2 = 236,
MX51_PAD_GPIO1_3 = 237,
MX51_PAD_PMIC_INT_REQ = 238,
MX51_PAD_GPIO1_4 = 239,
MX51_PAD_GPIO1_5 = 240,
MX51_PAD_GPIO1_6 = 241,
MX51_PAD_GPIO1_7 = 242,
MX51_PAD_GPIO1_8 = 243,
MX51_PAD_GPIO1_9 = 244,
};
/* imx51 register maps */

402
drivers/pinctrl/pinctrl-imx53.c
View file

@ -23,207 +23,207 @@
#include "pinctrl-imx.h"
enum imx53_pads {
MX53_PAD_GPIO_19 = 1,
MX53_PAD_KEY_COL0 = 2,
MX53_PAD_KEY_ROW0 = 3,
MX53_PAD_KEY_COL1 = 4,
MX53_PAD_KEY_ROW1 = 5,
MX53_PAD_KEY_COL2 = 6,
MX53_PAD_KEY_ROW2 = 7,
MX53_PAD_KEY_COL3 = 8,
MX53_PAD_KEY_ROW3 = 9,
MX53_PAD_KEY_COL4 = 10,
MX53_PAD_KEY_ROW4 = 11,
MX53_PAD_DI0_DISP_CLK = 12,
MX53_PAD_DI0_PIN15 = 13,
MX53_PAD_DI0_PIN2 = 14,
MX53_PAD_DI0_PIN3 = 15,
MX53_PAD_DI0_PIN4 = 16,
MX53_PAD_DISP0_DAT0 = 17,
MX53_PAD_DISP0_DAT1 = 18,
MX53_PAD_DISP0_DAT2 = 19,
MX53_PAD_DISP0_DAT3 = 20,
MX53_PAD_DISP0_DAT4 = 21,
MX53_PAD_DISP0_DAT5 = 22,
MX53_PAD_DISP0_DAT6 = 23,
MX53_PAD_DISP0_DAT7 = 24,
MX53_PAD_DISP0_DAT8 = 25,
MX53_PAD_DISP0_DAT9 = 26,
MX53_PAD_DISP0_DAT10 = 27,
MX53_PAD_DISP0_DAT11 = 28,
MX53_PAD_DISP0_DAT12 = 29,
MX53_PAD_DISP0_DAT13 = 30,
MX53_PAD_DISP0_DAT14 = 31,
MX53_PAD_DISP0_DAT15 = 32,
MX53_PAD_DISP0_DAT16 = 33,
MX53_PAD_DISP0_DAT17 = 34,
MX53_PAD_DISP0_DAT18 = 35,
MX53_PAD_DISP0_DAT19 = 36,
MX53_PAD_DISP0_DAT20 = 37,
MX53_PAD_DISP0_DAT21 = 38,
MX53_PAD_DISP0_DAT22 = 39,
MX53_PAD_DISP0_DAT23 = 40,
MX53_PAD_CSI0_PIXCLK = 41,
MX53_PAD_CSI0_MCLK = 42,
MX53_PAD_CSI0_DATA_EN = 43,
MX53_PAD_CSI0_VSYNC = 44,
MX53_PAD_CSI0_DAT4 = 45,
MX53_PAD_CSI0_DAT5 = 46,
MX53_PAD_CSI0_DAT6 = 47,
MX53_PAD_CSI0_DAT7 = 48,
MX53_PAD_CSI0_DAT8 = 49,
MX53_PAD_CSI0_DAT9 = 50,
MX53_PAD_CSI0_DAT10 = 51,
MX53_PAD_CSI0_DAT11 = 52,
MX53_PAD_CSI0_DAT12 = 53,
MX53_PAD_CSI0_DAT13 = 54,
MX53_PAD_CSI0_DAT14 = 55,
MX53_PAD_CSI0_DAT15 = 56,
MX53_PAD_CSI0_DAT16 = 57,
MX53_PAD_CSI0_DAT17 = 58,
MX53_PAD_CSI0_DAT18 = 59,
MX53_PAD_CSI0_DAT19 = 60,
MX53_PAD_EIM_A25 = 61,
MX53_PAD_EIM_EB2 = 62,
MX53_PAD_EIM_D16 = 63,
MX53_PAD_EIM_D17 = 64,
MX53_PAD_EIM_D18 = 65,
MX53_PAD_EIM_D19 = 66,
MX53_PAD_EIM_D20 = 67,
MX53_PAD_EIM_D21 = 68,
MX53_PAD_EIM_D22 = 69,
MX53_PAD_EIM_D23 = 70,
MX53_PAD_EIM_EB3 = 71,
MX53_PAD_EIM_D24 = 72,
MX53_PAD_EIM_D25 = 73,
MX53_PAD_EIM_D26 = 74,
MX53_PAD_EIM_D27 = 75,
MX53_PAD_EIM_D28 = 76,
MX53_PAD_EIM_D29 = 77,
MX53_PAD_EIM_D30 = 78,
MX53_PAD_EIM_D31 = 79,
MX53_PAD_EIM_A24 = 80,
MX53_PAD_EIM_A23 = 81,
MX53_PAD_EIM_A22 = 82,
MX53_PAD_EIM_A21 = 83,
MX53_PAD_EIM_A20 = 84,
MX53_PAD_EIM_A19 = 85,
MX53_PAD_EIM_A18 = 86,
MX53_PAD_EIM_A17 = 87,
MX53_PAD_EIM_A16 = 88,
MX53_PAD_EIM_CS0 = 89,
MX53_PAD_EIM_CS1 = 90,
MX53_PAD_EIM_OE = 91,
MX53_PAD_EIM_RW = 92,
MX53_PAD_EIM_LBA = 93,
MX53_PAD_EIM_EB0 = 94,
MX53_PAD_EIM_EB1 = 95,
MX53_PAD_EIM_DA0 = 96,
MX53_PAD_EIM_DA1 = 97,
MX53_PAD_EIM_DA2 = 98,
MX53_PAD_EIM_DA3 = 99,
MX53_PAD_EIM_DA4 = 100,
MX53_PAD_EIM_DA5 = 101,
MX53_PAD_EIM_DA6 = 102,
MX53_PAD_EIM_DA7 = 103,
MX53_PAD_EIM_DA8 = 104,
MX53_PAD_EIM_DA9 = 105,
MX53_PAD_EIM_DA10 = 106,
MX53_PAD_EIM_DA11 = 107,
MX53_PAD_EIM_DA12 = 108,
MX53_PAD_EIM_DA13 = 109,
MX53_PAD_EIM_DA14 = 110,
MX53_PAD_EIM_DA15 = 111,
MX53_PAD_NANDF_WE_B = 112,
MX53_PAD_NANDF_RE_B = 113,
MX53_PAD_EIM_WAIT = 114,
MX53_PAD_LVDS1_TX3_P = 115,
MX53_PAD_LVDS1_TX2_P = 116,
MX53_PAD_LVDS1_CLK_P = 117,
MX53_PAD_LVDS1_TX1_P = 118,
MX53_PAD_LVDS1_TX0_P = 119,
MX53_PAD_LVDS0_TX3_P = 120,
MX53_PAD_LVDS0_CLK_P = 121,
MX53_PAD_LVDS0_TX2_P = 122,
MX53_PAD_LVDS0_TX1_P = 123,
MX53_PAD_LVDS0_TX0_P = 124,
MX53_PAD_GPIO_10 = 125,
MX53_PAD_GPIO_11 = 126,
MX53_PAD_GPIO_12 = 127,
MX53_PAD_GPIO_13 = 128,
MX53_PAD_GPIO_14 = 129,
MX53_PAD_NANDF_CLE = 130,
MX53_PAD_NANDF_ALE = 131,
MX53_PAD_NANDF_WP_B = 132,
MX53_PAD_NANDF_RB0 = 133,
MX53_PAD_NANDF_CS0 = 134,
MX53_PAD_NANDF_CS1 = 135,
MX53_PAD_NANDF_CS2 = 136,
MX53_PAD_NANDF_CS3 = 137,
MX53_PAD_FEC_MDIO = 138,
MX53_PAD_FEC_REF_CLK = 139,
MX53_PAD_FEC_RX_ER = 140,
MX53_PAD_FEC_CRS_DV = 141,
MX53_PAD_FEC_RXD1 = 142,
MX53_PAD_FEC_RXD0 = 143,
MX53_PAD_FEC_TX_EN = 144,
MX53_PAD_FEC_TXD1 = 145,
MX53_PAD_FEC_TXD0 = 146,
MX53_PAD_FEC_MDC = 147,
MX53_PAD_PATA_DIOW = 148,
MX53_PAD_PATA_DMACK = 149,
MX53_PAD_PATA_DMARQ = 150,
MX53_PAD_PATA_BUFFER_EN = 151,
MX53_PAD_PATA_INTRQ = 152,
MX53_PAD_PATA_DIOR = 153,
MX53_PAD_PATA_RESET_B = 154,
MX53_PAD_PATA_IORDY = 155,
MX53_PAD_PATA_DA_0 = 156,
MX53_PAD_PATA_DA_1 = 157,
MX53_PAD_PATA_DA_2 = 158,
MX53_PAD_PATA_CS_0 = 159,
MX53_PAD_PATA_CS_1 = 160,
MX53_PAD_PATA_DATA0 = 161,
MX53_PAD_PATA_DATA1 = 162,
MX53_PAD_PATA_DATA2 = 163,
MX53_PAD_PATA_DATA3 = 164,
MX53_PAD_PATA_DATA4 = 165,
MX53_PAD_PATA_DATA5 = 166,
MX53_PAD_PATA_DATA6 = 167,
MX53_PAD_PATA_DATA7 = 168,
MX53_PAD_PATA_DATA8 = 169,
MX53_PAD_PATA_DATA9 = 170,
MX53_PAD_PATA_DATA10 = 171,
MX53_PAD_PATA_DATA11 = 172,
MX53_PAD_PATA_DATA12 = 173,
MX53_PAD_PATA_DATA13 = 174,
MX53_PAD_PATA_DATA14 = 175,
MX53_PAD_PATA_DATA15 = 176,
MX53_PAD_SD1_DATA0 = 177,
MX53_PAD_SD1_DATA1 = 178,
MX53_PAD_SD1_CMD = 179,
MX53_PAD_SD1_DATA2 = 180,
MX53_PAD_SD1_CLK = 181,
MX53_PAD_SD1_DATA3 = 182,
MX53_PAD_SD2_CLK = 183,
MX53_PAD_SD2_CMD = 184,
MX53_PAD_SD2_DATA3 = 185,
MX53_PAD_SD2_DATA2 = 186,
MX53_PAD_SD2_DATA1 = 187,
MX53_PAD_SD2_DATA0 = 188,
MX53_PAD_GPIO_0 = 189,
MX53_PAD_GPIO_1 = 190,
MX53_PAD_GPIO_9 = 191,
MX53_PAD_GPIO_3 = 192,
MX53_PAD_GPIO_6 = 193,
MX53_PAD_GPIO_2 = 194,
MX53_PAD_GPIO_4 = 195,
MX53_PAD_GPIO_5 = 196,
MX53_PAD_GPIO_7 = 197,
MX53_PAD_GPIO_8 = 198,
MX53_PAD_GPIO_16 = 199,
MX53_PAD_GPIO_17 = 200,
MX53_PAD_GPIO_18 = 201,
MX53_PAD_GPIO_19 = 0,
MX53_PAD_KEY_COL0 = 1,
MX53_PAD_KEY_ROW0 = 2,
MX53_PAD_KEY_COL1 = 3,
MX53_PAD_KEY_ROW1 = 4,
MX53_PAD_KEY_COL2 = 5,
MX53_PAD_KEY_ROW2 = 6,
MX53_PAD_KEY_COL3 = 7,
MX53_PAD_KEY_ROW3 = 8,
MX53_PAD_KEY_COL4 = 9,
MX53_PAD_KEY_ROW4 = 10,
MX53_PAD_DI0_DISP_CLK = 11,
MX53_PAD_DI0_PIN15 = 12,
MX53_PAD_DI0_PIN2 = 13,
MX53_PAD_DI0_PIN3 = 14,
MX53_PAD_DI0_PIN4 = 15,
MX53_PAD_DISP0_DAT0 = 16,
MX53_PAD_DISP0_DAT1 = 17,
MX53_PAD_DISP0_DAT2 = 18,
MX53_PAD_DISP0_DAT3 = 19,
MX53_PAD_DISP0_DAT4 = 20,
MX53_PAD_DISP0_DAT5 = 21,
MX53_PAD_DISP0_DAT6 = 22,
MX53_PAD_DISP0_DAT7 = 23,
MX53_PAD_DISP0_DAT8 = 24,
MX53_PAD_DISP0_DAT9 = 25,
MX53_PAD_DISP0_DAT10 = 26,
MX53_PAD_DISP0_DAT11 = 27,
MX53_PAD_DISP0_DAT12 = 28,
MX53_PAD_DISP0_DAT13 = 29,
MX53_PAD_DISP0_DAT14 = 30,
MX53_PAD_DISP0_DAT15 = 31,
MX53_PAD_DISP0_DAT16 = 32,
MX53_PAD_DISP0_DAT17 = 33,
MX53_PAD_DISP0_DAT18 = 34,
MX53_PAD_DISP0_DAT19 = 35,
MX53_PAD_DISP0_DAT20 = 36,
MX53_PAD_DISP0_DAT21 = 37,
MX53_PAD_DISP0_DAT22 = 38,
MX53_PAD_DISP0_DAT23 = 39,
MX53_PAD_CSI0_PIXCLK = 40,
MX53_PAD_CSI0_MCLK = 41,
MX53_PAD_CSI0_DATA_EN = 42,
MX53_PAD_CSI0_VSYNC = 43,
MX53_PAD_CSI0_DAT4 = 44,
MX53_PAD_CSI0_DAT5 = 45,
MX53_PAD_CSI0_DAT6 = 46,
MX53_PAD_CSI0_DAT7 = 47,
MX53_PAD_CSI0_DAT8 = 48,
MX53_PAD_CSI0_DAT9 = 49,
MX53_PAD_CSI0_DAT10 = 50,
MX53_PAD_CSI0_DAT11 = 51,
MX53_PAD_CSI0_DAT12 = 52,
MX53_PAD_CSI0_DAT13 = 53,
MX53_PAD_CSI0_DAT14 = 54,
MX53_PAD_CSI0_DAT15 = 55,
MX53_PAD_CSI0_DAT16 = 56,
MX53_PAD_CSI0_DAT17 = 57,
MX53_PAD_CSI0_DAT18 = 58,
MX53_PAD_CSI0_DAT19 = 59,
MX53_PAD_EIM_A25 = 60,
MX53_PAD_EIM_EB2 = 61,
MX53_PAD_EIM_D16 = 62,
MX53_PAD_EIM_D17 = 63,
MX53_PAD_EIM_D18 = 64,
MX53_PAD_EIM_D19 = 65,
MX53_PAD_EIM_D20 = 66,
MX53_PAD_EIM_D21 = 67,
MX53_PAD_EIM_D22 = 68,
MX53_PAD_EIM_D23 = 69,
MX53_PAD_EIM_EB3 = 70,
MX53_PAD_EIM_D24 = 71,
MX53_PAD_EIM_D25 = 72,
MX53_PAD_EIM_D26 = 73,
MX53_PAD_EIM_D27 = 74,
MX53_PAD_EIM_D28 = 75,
MX53_PAD_EIM_D29 = 76,
MX53_PAD_EIM_D30 = 77,
MX53_PAD_EIM_D31 = 78,
MX53_PAD_EIM_A24 = 79,
MX53_PAD_EIM_A23 = 80,
MX53_PAD_EIM_A22 = 81,
MX53_PAD_EIM_A21 = 82,
MX53_PAD_EIM_A20 = 83,
MX53_PAD_EIM_A19 = 84,
MX53_PAD_EIM_A18 = 85,
MX53_PAD_EIM_A17 = 86,
MX53_PAD_EIM_A16 = 87,
MX53_PAD_EIM_CS0 = 88,
MX53_PAD_EIM_CS1 = 89,
MX53_PAD_EIM_OE = 90,
MX53_PAD_EIM_RW = 91,
MX53_PAD_EIM_LBA = 92,
MX53_PAD_EIM_EB0 = 93,
MX53_PAD_EIM_EB1 = 94,
MX53_PAD_EIM_DA0 = 95,
MX53_PAD_EIM_DA1 = 96,
MX53_PAD_EIM_DA2 = 97,
MX53_PAD_EIM_DA3 = 98,
MX53_PAD_EIM_DA4 = 99,
MX53_PAD_EIM_DA5 = 100,
MX53_PAD_EIM_DA6 = 101,
MX53_PAD_EIM_DA7 = 102,
MX53_PAD_EIM_DA8 = 103,
MX53_PAD_EIM_DA9 = 104,
MX53_PAD_EIM_DA10 = 105,
MX53_PAD_EIM_DA11 = 106,
MX53_PAD_EIM_DA12 = 107,
MX53_PAD_EIM_DA13 = 108,
MX53_PAD_EIM_DA14 = 109,
MX53_PAD_EIM_DA15 = 110,
MX53_PAD_NANDF_WE_B = 111,
MX53_PAD_NANDF_RE_B = 112,
MX53_PAD_EIM_WAIT = 113,
MX53_PAD_LVDS1_TX3_P = 114,
MX53_PAD_LVDS1_TX2_P = 115,
MX53_PAD_LVDS1_CLK_P = 116,
MX53_PAD_LVDS1_TX1_P = 117,
MX53_PAD_LVDS1_TX0_P = 118,
MX53_PAD_LVDS0_TX3_P = 119,
MX53_PAD_LVDS0_CLK_P = 120,
MX53_PAD_LVDS0_TX2_P = 121,
MX53_PAD_LVDS0_TX1_P = 122,
MX53_PAD_LVDS0_TX0_P = 123,
MX53_PAD_GPIO_10 = 124,
MX53_PAD_GPIO_11 = 125,
MX53_PAD_GPIO_12 = 126,
MX53_PAD_GPIO_13 = 127,
MX53_PAD_GPIO_14 = 128,
MX53_PAD_NANDF_CLE = 129,
MX53_PAD_NANDF_ALE = 130,
MX53_PAD_NANDF_WP_B = 131,
MX53_PAD_NANDF_RB0 = 132,
MX53_PAD_NANDF_CS0 = 133,
MX53_PAD_NANDF_CS1 = 134,
MX53_PAD_NANDF_CS2 = 135,
MX53_PAD_NANDF_CS3 = 136,
MX53_PAD_FEC_MDIO = 137,
MX53_PAD_FEC_REF_CLK = 138,
MX53_PAD_FEC_RX_ER = 139,
MX53_PAD_FEC_CRS_DV = 140,
MX53_PAD_FEC_RXD1 = 141,
MX53_PAD_FEC_RXD0 = 142,
MX53_PAD_FEC_TX_EN = 143,
MX53_PAD_FEC_TXD1 = 144,
MX53_PAD_FEC_TXD0 = 145,
MX53_PAD_FEC_MDC = 146,
MX53_PAD_PATA_DIOW = 147,
MX53_PAD_PATA_DMACK = 148,
MX53_PAD_PATA_DMARQ = 149,
MX53_PAD_PATA_BUFFER_EN = 150,
MX53_PAD_PATA_INTRQ = 151,
MX53_PAD_PATA_DIOR = 152,
MX53_PAD_PATA_RESET_B = 153,
MX53_PAD_PATA_IORDY = 154,
MX53_PAD_PATA_DA_0 = 155,
MX53_PAD_PATA_DA_1 = 156,
MX53_PAD_PATA_DA_2 = 157,
MX53_PAD_PATA_CS_0 = 158,
MX53_PAD_PATA_CS_1 = 159,
MX53_PAD_PATA_DATA0 = 160,
MX53_PAD_PATA_DATA1 = 161,
MX53_PAD_PATA_DATA2 = 162,
MX53_PAD_PATA_DATA3 = 163,
MX53_PAD_PATA_DATA4 = 164,
MX53_PAD_PATA_DATA5 = 165,
MX53_PAD_PATA_DATA6 = 166,
MX53_PAD_PATA_DATA7 = 167,
MX53_PAD_PATA_DATA8 = 168,
MX53_PAD_PATA_DATA9 = 169,
MX53_PAD_PATA_DATA10 = 170,
MX53_PAD_PATA_DATA11 = 171,
MX53_PAD_PATA_DATA12 = 172,
MX53_PAD_PATA_DATA13 = 173,
MX53_PAD_PATA_DATA14 = 174,
MX53_PAD_PATA_DATA15 = 175,
MX53_PAD_SD1_DATA0 = 176,
MX53_PAD_SD1_DATA1 = 177,
MX53_PAD_SD1_CMD = 178,
MX53_PAD_SD1_DATA2 = 179,
MX53_PAD_SD1_CLK = 180,
MX53_PAD_SD1_DATA3 = 181,
MX53_PAD_SD2_CLK = 182,
MX53_PAD_SD2_CMD = 183,
MX53_PAD_SD2_DATA3 = 184,
MX53_PAD_SD2_DATA2 = 185,
MX53_PAD_SD2_DATA1 = 186,
MX53_PAD_SD2_DATA0 = 187,
MX53_PAD_GPIO_0 = 188,
MX53_PAD_GPIO_1 = 189,
MX53_PAD_GPIO_9 = 190,
MX53_PAD_GPIO_3 = 191,
MX53_PAD_GPIO_6 = 192,
MX53_PAD_GPIO_2 = 193,
MX53_PAD_GPIO_4 = 194,
MX53_PAD_GPIO_5 = 195,
MX53_PAD_GPIO_7 = 196,
MX53_PAD_GPIO_8 = 197,
MX53_PAD_GPIO_16 = 198,
MX53_PAD_GPIO_17 = 199,
MX53_PAD_GPIO_18 = 200,
};
/* imx53 register maps */

5
drivers/pinctrl/pinctrl-nomadik-db8500.c
View file

@ -465,6 +465,8 @@ static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
DB8500_PIN_AH15 };
static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,DB8500_PIN_AH15 };
static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
DB8500_PIN_AH12, DB8500_PIN_AH11 };
static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
@ -641,6 +643,7 @@ static const struct nmk_pingroup nmk_db8500_groups[] = {
DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
@ -768,7 +771,7 @@ DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
/* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1dir_a_1");
DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
DB8500_FUNC_GROUPS(clkout, "clkout_a_1", "clkout_a_2", "clkout_c_1");
DB8500_FUNC_GROUPS(usb, "usb_a_1");

999
drivers/pinctrl/pinctrl-nomadik-db8540.c Normal file
View file

@ -0,0 +1,999 @@
#include <linux/kernel.h>
#include <linux/pinctrl/pinctrl.h>
#include "pinctrl-nomadik.h"
/* All the pins that can be used for GPIO and some other functions */
#define _GPIO(offset) (offset)
#define DB8540_PIN_AH6 _GPIO(0)
#define DB8540_PIN_AG7 _GPIO(1)
#define DB8540_PIN_AF2 _GPIO(2)
#define DB8540_PIN_AD3 _GPIO(3)
#define DB8540_PIN_AF6 _GPIO(4)
#define DB8540_PIN_AG6 _GPIO(5)
#define DB8540_PIN_AD5 _GPIO(6)
#define DB8540_PIN_AF7 _GPIO(7)
#define DB8540_PIN_AG5 _GPIO(8)
#define DB8540_PIN_AH5 _GPIO(9)
#define DB8540_PIN_AE4 _GPIO(10)
#define DB8540_PIN_AD1 _GPIO(11)
#define DB8540_PIN_AD2 _GPIO(12)
#define DB8540_PIN_AC2 _GPIO(13)
#define DB8540_PIN_AC4 _GPIO(14)
#define DB8540_PIN_AC3 _GPIO(15)
#define DB8540_PIN_AH7 _GPIO(16)
#define DB8540_PIN_AE7 _GPIO(17)
/* Hole */
#define DB8540_PIN_AF8 _GPIO(22)
#define DB8540_PIN_AH11 _GPIO(23)
#define DB8540_PIN_AG11 _GPIO(24)
#define DB8540_PIN_AF11 _GPIO(25)
#define DB8540_PIN_AH10 _GPIO(26)
#define DB8540_PIN_AG10 _GPIO(27)
#define DB8540_PIN_AF10 _GPIO(28)
/* Hole */
#define DB8540_PIN_AD4 _GPIO(33)
#define DB8540_PIN_AF3 _GPIO(34)
#define DB8540_PIN_AF5 _GPIO(35)
#define DB8540_PIN_AG4 _GPIO(36)
#define DB8540_PIN_AF9 _GPIO(37)
#define DB8540_PIN_AE8 _GPIO(38)
/* Hole */
#define DB8540_PIN_M26 _GPIO(64)
#define DB8540_PIN_M25 _GPIO(65)
#define DB8540_PIN_M27 _GPIO(66)
#define DB8540_PIN_N25 _GPIO(67)
/* Hole */
#define DB8540_PIN_M28 _GPIO(70)
#define DB8540_PIN_N26 _GPIO(71)
#define DB8540_PIN_M22 _GPIO(72)
#define DB8540_PIN_N22 _GPIO(73)
#define DB8540_PIN_N27 _GPIO(74)
#define DB8540_PIN_N28 _GPIO(75)
#define DB8540_PIN_P22 _GPIO(76)
#define DB8540_PIN_P28 _GPIO(77)
#define DB8540_PIN_P26 _GPIO(78)
#define DB8540_PIN_T22 _GPIO(79)
#define DB8540_PIN_R27 _GPIO(80)
#define DB8540_PIN_P27 _GPIO(81)
#define DB8540_PIN_R26 _GPIO(82)
#define DB8540_PIN_R25 _GPIO(83)
#define DB8540_PIN_U22 _GPIO(84)
#define DB8540_PIN_T27 _GPIO(85)
#define DB8540_PIN_T25 _GPIO(86)
#define DB8540_PIN_T26 _GPIO(87)
/* Hole */
#define DB8540_PIN_AF20 _GPIO(116)
#define DB8540_PIN_AG21 _GPIO(117)
#define DB8540_PIN_AH19 _GPIO(118)
#define DB8540_PIN_AE19 _GPIO(119)
#define DB8540_PIN_AG18 _GPIO(120)
#define DB8540_PIN_AH17 _GPIO(121)
#define DB8540_PIN_AF19 _GPIO(122)
#define DB8540_PIN_AF18 _GPIO(123)
#define DB8540_PIN_AE18 _GPIO(124)
#define DB8540_PIN_AG17 _GPIO(125)
#define DB8540_PIN_AF17 _GPIO(126)
#define DB8540_PIN_AE17 _GPIO(127)
#define DB8540_PIN_AC27 _GPIO(128)
#define DB8540_PIN_AD27 _GPIO(129)
#define DB8540_PIN_AE28 _GPIO(130)
#define DB8540_PIN_AG26 _GPIO(131)
#define DB8540_PIN_AF25 _GPIO(132)
#define DB8540_PIN_AE27 _GPIO(133)
#define DB8540_PIN_AF27 _GPIO(134)
#define DB8540_PIN_AG28 _GPIO(135)
#define DB8540_PIN_AF28 _GPIO(136)
#define DB8540_PIN_AG25 _GPIO(137)
#define DB8540_PIN_AG24 _GPIO(138)
#define DB8540_PIN_AD25 _GPIO(139)
#define DB8540_PIN_AH25 _GPIO(140)
#define DB8540_PIN_AF26 _GPIO(141)
#define DB8540_PIN_AF23 _GPIO(142)
#define DB8540_PIN_AG23 _GPIO(143)
#define DB8540_PIN_AE25 _GPIO(144)
#define DB8540_PIN_AH24 _GPIO(145)
#define DB8540_PIN_AJ25 _GPIO(146)
#define DB8540_PIN_AG27 _GPIO(147)
#define DB8540_PIN_AH23 _GPIO(148)
#define DB8540_PIN_AE26 _GPIO(149)
#define DB8540_PIN_AE24 _GPIO(150)
#define DB8540_PIN_AJ24 _GPIO(151)
#define DB8540_PIN_AE21 _GPIO(152)
#define DB8540_PIN_AG22 _GPIO(153)
#define DB8540_PIN_AF21 _GPIO(154)
#define DB8540_PIN_AF24 _GPIO(155)
#define DB8540_PIN_AH22 _GPIO(156)
#define DB8540_PIN_AJ23 _GPIO(157)
#define DB8540_PIN_AH21 _GPIO(158)
#define DB8540_PIN_AG20 _GPIO(159)
#define DB8540_PIN_AE23 _GPIO(160)
#define DB8540_PIN_AH20 _GPIO(161)
#define DB8540_PIN_AG19 _GPIO(162)
#define DB8540_PIN_AF22 _GPIO(163)
#define DB8540_PIN_AJ21 _GPIO(164)
#define DB8540_PIN_AD26 _GPIO(165)
#define DB8540_PIN_AD28 _GPIO(166)
#define DB8540_PIN_AC28 _GPIO(167)
#define DB8540_PIN_AC26 _GPIO(168)
/* Hole */
#define DB8540_PIN_J3 _GPIO(192)
#define DB8540_PIN_H1 _GPIO(193)
#define DB8540_PIN_J2 _GPIO(194)
#define DB8540_PIN_H2 _GPIO(195)
#define DB8540_PIN_H3 _GPIO(196)
#define DB8540_PIN_H4 _GPIO(197)
#define DB8540_PIN_G2 _GPIO(198)
#define DB8540_PIN_G3 _GPIO(199)
#define DB8540_PIN_G4 _GPIO(200)
#define DB8540_PIN_F2 _GPIO(201)
#define DB8540_PIN_C6 _GPIO(202)
#define DB8540_PIN_B6 _GPIO(203)
#define DB8540_PIN_B7 _GPIO(204)
#define DB8540_PIN_A7 _GPIO(205)
#define DB8540_PIN_D7 _GPIO(206)
#define DB8540_PIN_D8 _GPIO(207)
#define DB8540_PIN_F3 _GPIO(208)
#define DB8540_PIN_E2 _GPIO(209)
#define DB8540_PIN_C7 _GPIO(210)
#define DB8540_PIN_B8 _GPIO(211)
#define DB8540_PIN_C10 _GPIO(212)
#define DB8540_PIN_C8 _GPIO(213)
#define DB8540_PIN_C9 _GPIO(214)
/* Hole */
#define DB8540_PIN_B9 _GPIO(219)
#define DB8540_PIN_A10 _GPIO(220)
#define DB8540_PIN_D9 _GPIO(221)
#define DB8540_PIN_B11 _GPIO(222)
#define DB8540_PIN_B10 _GPIO(223)
#define DB8540_PIN_E10 _GPIO(224)
#define DB8540_PIN_B12 _GPIO(225)
#define DB8540_PIN_D10 _GPIO(226)
#define DB8540_PIN_D11 _GPIO(227)
#define DB8540_PIN_AJ6 _GPIO(228)
#define DB8540_PIN_B13 _GPIO(229)
#define DB8540_PIN_C12 _GPIO(230)
#define DB8540_PIN_B14 _GPIO(231)
#define DB8540_PIN_E11 _GPIO(232)
/* Hole */
#define DB8540_PIN_D12 _GPIO(256)
#define DB8540_PIN_D15 _GPIO(257)
#define DB8540_PIN_C13 _GPIO(258)
#define DB8540_PIN_C14 _GPIO(259)
#define DB8540_PIN_C18 _GPIO(260)
#define DB8540_PIN_C16 _GPIO(261)
#define DB8540_PIN_B16 _GPIO(262)
#define DB8540_PIN_D18 _GPIO(263)
#define DB8540_PIN_C15 _GPIO(264)
#define DB8540_PIN_C17 _GPIO(265)
#define DB8540_PIN_B17 _GPIO(266)
#define DB8540_PIN_D17 _GPIO(267)
/*
* The names of the pins are denoted by GPIO number and ball name, even
* though they can be used for other things than GPIO, this is the first
* column in the table of the data sheet and often used on schematics and
* such.
*/
static const struct pinctrl_pin_desc nmk_db8540_pins[] = {
PINCTRL_PIN(DB8540_PIN_AH6, "GPIO0_AH6"),
PINCTRL_PIN(DB8540_PIN_AG7, "GPIO1_AG7"),
PINCTRL_PIN(DB8540_PIN_AF2, "GPIO2_AF2"),
PINCTRL_PIN(DB8540_PIN_AD3, "GPIO3_AD3"),
PINCTRL_PIN(DB8540_PIN_AF6, "GPIO4_AF6"),
PINCTRL_PIN(DB8540_PIN_AG6, "GPIO5_AG6"),
PINCTRL_PIN(DB8540_PIN_AD5, "GPIO6_AD5"),
PINCTRL_PIN(DB8540_PIN_AF7, "GPIO7_AF7"),
PINCTRL_PIN(DB8540_PIN_AG5, "GPIO8_AG5"),
PINCTRL_PIN(DB8540_PIN_AH5, "GPIO9_AH5"),
PINCTRL_PIN(DB8540_PIN_AE4, "GPIO10_AE4"),
PINCTRL_PIN(DB8540_PIN_AD1, "GPIO11_AD1"),
PINCTRL_PIN(DB8540_PIN_AD2, "GPIO12_AD2"),
PINCTRL_PIN(DB8540_PIN_AC2, "GPIO13_AC2"),
PINCTRL_PIN(DB8540_PIN_AC4, "GPIO14_AC4"),
PINCTRL_PIN(DB8540_PIN_AC3, "GPIO15_AC3"),
PINCTRL_PIN(DB8540_PIN_AH7, "GPIO16_AH7"),
PINCTRL_PIN(DB8540_PIN_AE7, "GPIO17_AE7"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_AF8, "GPIO22_AF8"),
PINCTRL_PIN(DB8540_PIN_AH11, "GPIO23_AH11"),
PINCTRL_PIN(DB8540_PIN_AG11, "GPIO24_AG11"),
PINCTRL_PIN(DB8540_PIN_AF11, "GPIO25_AF11"),
PINCTRL_PIN(DB8540_PIN_AH10, "GPIO26_AH10"),
PINCTRL_PIN(DB8540_PIN_AG10, "GPIO27_AG10"),
PINCTRL_PIN(DB8540_PIN_AF10, "GPIO28_AF10"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_AD4, "GPIO33_AD4"),
PINCTRL_PIN(DB8540_PIN_AF3, "GPIO34_AF3"),
PINCTRL_PIN(DB8540_PIN_AF5, "GPIO35_AF5"),
PINCTRL_PIN(DB8540_PIN_AG4, "GPIO36_AG4"),
PINCTRL_PIN(DB8540_PIN_AF9, "GPIO37_AF9"),
PINCTRL_PIN(DB8540_PIN_AE8, "GPIO38_AE8"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_M26, "GPIO64_M26"),
PINCTRL_PIN(DB8540_PIN_M25, "GPIO65_M25"),
PINCTRL_PIN(DB8540_PIN_M27, "GPIO66_M27"),
PINCTRL_PIN(DB8540_PIN_N25, "GPIO67_N25"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_M28, "GPIO70_M28"),
PINCTRL_PIN(DB8540_PIN_N26, "GPIO71_N26"),
PINCTRL_PIN(DB8540_PIN_M22, "GPIO72_M22"),
PINCTRL_PIN(DB8540_PIN_N22, "GPIO73_N22"),
PINCTRL_PIN(DB8540_PIN_N27, "GPIO74_N27"),
PINCTRL_PIN(DB8540_PIN_N28, "GPIO75_N28"),
PINCTRL_PIN(DB8540_PIN_P22, "GPIO76_P22"),
PINCTRL_PIN(DB8540_PIN_P28, "GPIO77_P28"),
PINCTRL_PIN(DB8540_PIN_P26, "GPIO78_P26"),
PINCTRL_PIN(DB8540_PIN_T22, "GPIO79_T22"),
PINCTRL_PIN(DB8540_PIN_R27, "GPIO80_R27"),
PINCTRL_PIN(DB8540_PIN_P27, "GPIO81_P27"),
PINCTRL_PIN(DB8540_PIN_R26, "GPIO82_R26"),
PINCTRL_PIN(DB8540_PIN_R25, "GPIO83_R25"),
PINCTRL_PIN(DB8540_PIN_U22, "GPIO84_U22"),
PINCTRL_PIN(DB8540_PIN_T27, "GPIO85_T27"),
PINCTRL_PIN(DB8540_PIN_T25, "GPIO86_T25"),
PINCTRL_PIN(DB8540_PIN_T26, "GPIO87_T26"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_AF20, "GPIO116_AF20"),
PINCTRL_PIN(DB8540_PIN_AG21, "GPIO117_AG21"),
PINCTRL_PIN(DB8540_PIN_AH19, "GPIO118_AH19"),
PINCTRL_PIN(DB8540_PIN_AE19, "GPIO119_AE19"),
PINCTRL_PIN(DB8540_PIN_AG18, "GPIO120_AG18"),
PINCTRL_PIN(DB8540_PIN_AH17, "GPIO121_AH17"),
PINCTRL_PIN(DB8540_PIN_AF19, "GPIO122_AF19"),
PINCTRL_PIN(DB8540_PIN_AF18, "GPIO123_AF18"),
PINCTRL_PIN(DB8540_PIN_AE18, "GPIO124_AE18"),
PINCTRL_PIN(DB8540_PIN_AG17, "GPIO125_AG17"),
PINCTRL_PIN(DB8540_PIN_AF17, "GPIO126_AF17"),
PINCTRL_PIN(DB8540_PIN_AE17, "GPIO127_AE17"),
PINCTRL_PIN(DB8540_PIN_AC27, "GPIO128_AC27"),
PINCTRL_PIN(DB8540_PIN_AD27, "GPIO129_AD27"),
PINCTRL_PIN(DB8540_PIN_AE28, "GPIO130_AE28"),
PINCTRL_PIN(DB8540_PIN_AG26, "GPIO131_AG26"),
PINCTRL_PIN(DB8540_PIN_AF25, "GPIO132_AF25"),
PINCTRL_PIN(DB8540_PIN_AE27, "GPIO133_AE27"),
PINCTRL_PIN(DB8540_PIN_AF27, "GPIO134_AF27"),
PINCTRL_PIN(DB8540_PIN_AG28, "GPIO135_AG28"),
PINCTRL_PIN(DB8540_PIN_AF28, "GPIO136_AF28"),
PINCTRL_PIN(DB8540_PIN_AG25, "GPIO137_AG25"),
PINCTRL_PIN(DB8540_PIN_AG24, "GPIO138_AG24"),
PINCTRL_PIN(DB8540_PIN_AD25, "GPIO139_AD25"),
PINCTRL_PIN(DB8540_PIN_AH25, "GPIO140_AH25"),
PINCTRL_PIN(DB8540_PIN_AF26, "GPIO141_AF26"),
PINCTRL_PIN(DB8540_PIN_AF23, "GPIO142_AF23"),
PINCTRL_PIN(DB8540_PIN_AG23, "GPIO143_AG23"),
PINCTRL_PIN(DB8540_PIN_AE25, "GPIO144_AE25"),
PINCTRL_PIN(DB8540_PIN_AH24, "GPIO145_AH24"),
PINCTRL_PIN(DB8540_PIN_AJ25, "GPIO146_AJ25"),
PINCTRL_PIN(DB8540_PIN_AG27, "GPIO147_AG27"),
PINCTRL_PIN(DB8540_PIN_AH23, "GPIO148_AH23"),
PINCTRL_PIN(DB8540_PIN_AE26, "GPIO149_AE26"),
PINCTRL_PIN(DB8540_PIN_AE24, "GPIO150_AE24"),
PINCTRL_PIN(DB8540_PIN_AJ24, "GPIO151_AJ24"),
PINCTRL_PIN(DB8540_PIN_AE21, "GPIO152_AE21"),
PINCTRL_PIN(DB8540_PIN_AG22, "GPIO153_AG22"),
PINCTRL_PIN(DB8540_PIN_AF21, "GPIO154_AF21"),
PINCTRL_PIN(DB8540_PIN_AF24, "GPIO155_AF24"),
PINCTRL_PIN(DB8540_PIN_AH22, "GPIO156_AH22"),
PINCTRL_PIN(DB8540_PIN_AJ23, "GPIO157_AJ23"),
PINCTRL_PIN(DB8540_PIN_AH21, "GPIO158_AH21"),
PINCTRL_PIN(DB8540_PIN_AG20, "GPIO159_AG20"),
PINCTRL_PIN(DB8540_PIN_AE23, "GPIO160_AE23"),
PINCTRL_PIN(DB8540_PIN_AH20, "GPIO161_AH20"),
PINCTRL_PIN(DB8540_PIN_AG19, "GPIO162_AG19"),
PINCTRL_PIN(DB8540_PIN_AF22, "GPIO163_AF22"),
PINCTRL_PIN(DB8540_PIN_AJ21, "GPIO164_AJ21"),
PINCTRL_PIN(DB8540_PIN_AD26, "GPIO165_AD26"),
PINCTRL_PIN(DB8540_PIN_AD28, "GPIO166_AD28"),
PINCTRL_PIN(DB8540_PIN_AC28, "GPIO167_AC28"),
PINCTRL_PIN(DB8540_PIN_AC26, "GPIO168_AC26"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_J3, "GPIO192_J3"),
PINCTRL_PIN(DB8540_PIN_H1, "GPIO193_H1"),
PINCTRL_PIN(DB8540_PIN_J2, "GPIO194_J2"),
PINCTRL_PIN(DB8540_PIN_H2, "GPIO195_H2"),
PINCTRL_PIN(DB8540_PIN_H3, "GPIO196_H3"),
PINCTRL_PIN(DB8540_PIN_H4, "GPIO197_H4"),
PINCTRL_PIN(DB8540_PIN_G2, "GPIO198_G2"),
PINCTRL_PIN(DB8540_PIN_G3, "GPIO199_G3"),
PINCTRL_PIN(DB8540_PIN_G4, "GPIO200_G4"),
PINCTRL_PIN(DB8540_PIN_F2, "GPIO201_F2"),
PINCTRL_PIN(DB8540_PIN_C6, "GPIO202_C6"),
PINCTRL_PIN(DB8540_PIN_B6, "GPIO203_B6"),
PINCTRL_PIN(DB8540_PIN_B7, "GPIO204_B7"),
PINCTRL_PIN(DB8540_PIN_A7, "GPIO205_A7"),
PINCTRL_PIN(DB8540_PIN_D7, "GPIO206_D7"),
PINCTRL_PIN(DB8540_PIN_D8, "GPIO207_D8"),
PINCTRL_PIN(DB8540_PIN_F3, "GPIO208_F3"),
PINCTRL_PIN(DB8540_PIN_E2, "GPIO209_E2"),
PINCTRL_PIN(DB8540_PIN_C7, "GPIO210_C7"),
PINCTRL_PIN(DB8540_PIN_B8, "GPIO211_B8"),
PINCTRL_PIN(DB8540_PIN_C10, "GPIO212_C10"),
PINCTRL_PIN(DB8540_PIN_C8, "GPIO213_C8"),
PINCTRL_PIN(DB8540_PIN_C9, "GPIO214_C9"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_B9, "GPIO219_B9"),
PINCTRL_PIN(DB8540_PIN_A10, "GPIO220_A10"),
PINCTRL_PIN(DB8540_PIN_D9, "GPIO221_D9"),
PINCTRL_PIN(DB8540_PIN_B11, "GPIO222_B11"),
PINCTRL_PIN(DB8540_PIN_B10, "GPIO223_B10"),
PINCTRL_PIN(DB8540_PIN_E10, "GPIO224_E10"),
PINCTRL_PIN(DB8540_PIN_B12, "GPIO225_B12"),
PINCTRL_PIN(DB8540_PIN_D10, "GPIO226_D10"),
PINCTRL_PIN(DB8540_PIN_D11, "GPIO227_D11"),
PINCTRL_PIN(DB8540_PIN_AJ6, "GPIO228_AJ6"),
PINCTRL_PIN(DB8540_PIN_B13, "GPIO229_B13"),
PINCTRL_PIN(DB8540_PIN_C12, "GPIO230_C12"),
PINCTRL_PIN(DB8540_PIN_B14, "GPIO231_B14"),
PINCTRL_PIN(DB8540_PIN_E11, "GPIO232_E11"),
/* Hole */
PINCTRL_PIN(DB8540_PIN_D12, "GPIO256_D12"),
PINCTRL_PIN(DB8540_PIN_D15, "GPIO257_D15"),
PINCTRL_PIN(DB8540_PIN_C13, "GPIO258_C13"),
PINCTRL_PIN(DB8540_PIN_C14, "GPIO259_C14"),
PINCTRL_PIN(DB8540_PIN_C18, "GPIO260_C18"),
PINCTRL_PIN(DB8540_PIN_C16, "GPIO261_C16"),
PINCTRL_PIN(DB8540_PIN_B16, "GPIO262_B16"),
PINCTRL_PIN(DB8540_PIN_D18, "GPIO263_D18"),
PINCTRL_PIN(DB8540_PIN_C15, "GPIO264_C15"),
PINCTRL_PIN(DB8540_PIN_C17, "GPIO265_C17"),
PINCTRL_PIN(DB8540_PIN_B17, "GPIO266_B17"),
PINCTRL_PIN(DB8540_PIN_D17, "GPIO267_D17"),
};
#define DB8540_GPIO_RANGE(a, b, c) { .name = "db8540", .id = a, .base = b, \
.pin_base = b, .npins = c }
/*
* This matches the 32-pin gpio chips registered by the GPIO portion. This
* cannot be const since we assign the struct gpio_chip * pointer at runtime.
*/
static struct pinctrl_gpio_range nmk_db8540_ranges[] = {
DB8540_GPIO_RANGE(0, 0, 18),
DB8540_GPIO_RANGE(0, 22, 7),
DB8540_GPIO_RANGE(1, 33, 6),
DB8540_GPIO_RANGE(2, 64, 4),
DB8540_GPIO_RANGE(2, 70, 18),
DB8540_GPIO_RANGE(3, 116, 12),
DB8540_GPIO_RANGE(4, 128, 32),
DB8540_GPIO_RANGE(5, 160, 9),
DB8540_GPIO_RANGE(6, 192, 23),
DB8540_GPIO_RANGE(6, 219, 5),
DB8540_GPIO_RANGE(7, 224, 9),
DB8540_GPIO_RANGE(8, 256, 12),
};
/*
* Read the pin group names like this:
* u0_a_1 = first groups of pins for uart0 on alt function a
* i2c2_b_2 = second group of pins for i2c2 on alt function b
*
* The groups are arranged as sets per altfunction column, so we can
* mux in one group at a time by selecting the same altfunction for them
* all. When functions require pins on different altfunctions, you need
* to combine several groups.
*/
/* Altfunction A column */
static const unsigned u0_a_1_pins[] = { DB8540_PIN_AH6, DB8540_PIN_AG7,
DB8540_PIN_AF2, DB8540_PIN_AD3 };
static const unsigned u1rxtx_a_1_pins[] = { DB8540_PIN_AF6, DB8540_PIN_AG6 };
static const unsigned u1ctsrts_a_1_pins[] = { DB8540_PIN_AD5, DB8540_PIN_AF7 };
/* Image processor I2C line, this is driven by image processor firmware */
static const unsigned ipi2c_a_1_pins[] = { DB8540_PIN_AG5, DB8540_PIN_AH5 };
static const unsigned ipi2c_a_2_pins[] = { DB8540_PIN_AE4, DB8540_PIN_AD1 };
/* MSP0 can only be on these pins, but TXD and RXD can be flipped */
static const unsigned msp0txrx_a_1_pins[] = { DB8540_PIN_AD2, DB8540_PIN_AC3 };
static const unsigned msp0tfstck_a_1_pins[] = { DB8540_PIN_AC2,
DB8540_PIN_AC4 };
static const unsigned msp0rfsrck_a_1_pins[] = { DB8540_PIN_AH7,
DB8540_PIN_AE7 };
/* Basic pins of the MMC/SD card 0 interface */
static const unsigned mc0_a_1_pins[] = { DB8540_PIN_AH11, DB8540_PIN_AG11,
DB8540_PIN_AF11, DB8540_PIN_AH10, DB8540_PIN_AG10, DB8540_PIN_AF10};
/* MSP1 can only be on these pins, but TXD and RXD can be flipped */
static const unsigned msp1txrx_a_1_pins[] = { DB8540_PIN_AD4, DB8540_PIN_AG4 };
static const unsigned msp1_a_1_pins[] = { DB8540_PIN_AF3, DB8540_PIN_AF5 };
static const unsigned modobsclk_a_1_pins[] = { DB8540_PIN_AF9 };
static const unsigned clkoutreq_a_1_pins[] = { DB8540_PIN_AE8 };
/* LCD interface */
static const unsigned lcdb_a_1_pins[] = { DB8540_PIN_M26, DB8540_PIN_M25,
DB8540_PIN_M27, DB8540_PIN_N25 };
static const unsigned lcdvsi0_a_1_pins[] = { DB8540_PIN_AJ24 };
static const unsigned lcdvsi1_a_1_pins[] = { DB8540_PIN_AE21 };
static const unsigned lcd_d0_d7_a_1_pins[] = { DB8540_PIN_M28, DB8540_PIN_N26,
DB8540_PIN_M22, DB8540_PIN_N22, DB8540_PIN_N27, DB8540_PIN_N28,
DB8540_PIN_P22, DB8540_PIN_P28 };
/* D8 thru D11 often used as TVOUT lines */
static const unsigned lcd_d8_d11_a_1_pins[] = { DB8540_PIN_P26, DB8540_PIN_T22,
DB8540_PIN_R27, DB8540_PIN_P27 };
static const unsigned lcd_d12_d23_a_1_pins[] = { DB8540_PIN_R26, DB8540_PIN_R25,
DB8540_PIN_U22, DB8540_PIN_T27, DB8540_PIN_AG22, DB8540_PIN_AF21,
DB8540_PIN_AF24, DB8540_PIN_AH22, DB8540_PIN_AJ23, DB8540_PIN_AH21,
DB8540_PIN_AG20, DB8540_PIN_AE23 };
static const unsigned kp_a_1_pins[] = { DB8540_PIN_AH20, DB8540_PIN_AG19,
DB8540_PIN_AF22, DB8540_PIN_AJ21, DB8540_PIN_T25, DB8540_PIN_T26 };
/* MC2 has 8 data lines and no direction control, so only for (e)MMC */
static const unsigned mc2_a_1_pins[] = { DB8540_PIN_AC27, DB8540_PIN_AD27,
DB8540_PIN_AE28, DB8540_PIN_AG26, DB8540_PIN_AF25, DB8540_PIN_AE27,
DB8540_PIN_AF27, DB8540_PIN_AG28, DB8540_PIN_AF28, DB8540_PIN_AG25,
DB8540_PIN_AG24 };
static const unsigned ssp1_a_1_pins[] = { DB8540_PIN_AD25, DB8540_PIN_AH25,
DB8540_PIN_AF26, DB8540_PIN_AF23 };
static const unsigned ssp0_a_1_pins[] = { DB8540_PIN_AG23, DB8540_PIN_AE25,
DB8540_PIN_AH24, DB8540_PIN_AJ25 };
static const unsigned i2c0_a_1_pins[] = { DB8540_PIN_AG27, DB8540_PIN_AH23 };
/*
* Image processor GPIO pins are named "ipgpio" and have their own
* numberspace
*/
static const unsigned ipgpio0_a_1_pins[] = { DB8540_PIN_AE26 };
static const unsigned ipgpio1_a_1_pins[] = { DB8540_PIN_AE24 };
/* modem i2s interface */
static const unsigned modi2s_a_1_pins[] = { DB8540_PIN_AD26, DB8540_PIN_AD28,
DB8540_PIN_AC28, DB8540_PIN_AC26 };
static const unsigned spi2_a_1_pins[] = { DB8540_PIN_AF20, DB8540_PIN_AG21,
DB8540_PIN_AH19, DB8540_PIN_AE19 };
static const unsigned u2txrx_a_1_pins[] = { DB8540_PIN_AG18, DB8540_PIN_AH17 };
static const unsigned u2ctsrts_a_1_pins[] = { DB8540_PIN_AF19,
DB8540_PIN_AF18 };
static const unsigned modsmb_a_1_pins[] = { DB8540_PIN_AF17, DB8540_PIN_AE17 };
static const unsigned msp2sck_a_1_pins[] = { DB8540_PIN_J3 };
static const unsigned msp2txdtcktfs_a_1_pins[] = { DB8540_PIN_H1, DB8540_PIN_J2,
DB8540_PIN_H2 };
static const unsigned msp2rxd_a_1_pins[] = { DB8540_PIN_H3 };
static const unsigned mc4_a_1_pins[] = { DB8540_PIN_H4, DB8540_PIN_G2,
DB8540_PIN_G3, DB8540_PIN_G4, DB8540_PIN_F2, DB8540_PIN_C6,
DB8540_PIN_B6, DB8540_PIN_B7, DB8540_PIN_A7, DB8540_PIN_D7,
DB8540_PIN_D8 };
static const unsigned mc1_a_1_pins[] = { DB8540_PIN_F3, DB8540_PIN_E2,
DB8540_PIN_C7, DB8540_PIN_B8, DB8540_PIN_C10, DB8540_PIN_C8,
DB8540_PIN_C9 };
/* mc1_a_2_pins exclude MC1_FBCLK */
static const unsigned mc1_a_2_pins[] = { DB8540_PIN_F3, DB8540_PIN_C7,
DB8540_PIN_B8, DB8540_PIN_C10, DB8540_PIN_C8,
DB8540_PIN_C9 };
static const unsigned hsir_a_1_pins[] = { DB8540_PIN_B9, DB8540_PIN_A10,
DB8540_PIN_D9 };
static const unsigned hsit_a_1_pins[] = { DB8540_PIN_B11, DB8540_PIN_B10,
DB8540_PIN_E10, DB8540_PIN_B12, DB8540_PIN_D10 };
static const unsigned hsit_a_2_pins[] = { DB8540_PIN_B11, DB8540_PIN_B10,
DB8540_PIN_E10, DB8540_PIN_B12 };
static const unsigned clkout_a_1_pins[] = { DB8540_PIN_D11, DB8540_PIN_AJ6 };
static const unsigned clkout_a_2_pins[] = { DB8540_PIN_B13, DB8540_PIN_C12 };
static const unsigned msp4_a_1_pins[] = { DB8540_PIN_B14, DB8540_PIN_E11 };
static const unsigned usb_a_1_pins[] = { DB8540_PIN_D12, DB8540_PIN_D15,
DB8540_PIN_C13, DB8540_PIN_C14, DB8540_PIN_C18, DB8540_PIN_C16,
DB8540_PIN_B16, DB8540_PIN_D18, DB8540_PIN_C15, DB8540_PIN_C17,
DB8540_PIN_B17, DB8540_PIN_D17 };
/* Altfunction B colum */
static const unsigned apetrig_b_1_pins[] = { DB8540_PIN_AH6, DB8540_PIN_AG7 };
static const unsigned modtrig_b_1_pins[] = { DB8540_PIN_AF2, DB8540_PIN_AD3 };
static const unsigned i2c4_b_1_pins[] = { DB8540_PIN_AF6, DB8540_PIN_AG6 };
static const unsigned i2c1_b_1_pins[] = { DB8540_PIN_AD5, DB8540_PIN_AF7 };
static const unsigned i2c2_b_1_pins[] = { DB8540_PIN_AG5, DB8540_PIN_AH5 };
static const unsigned i2c2_b_2_pins[] = { DB8540_PIN_AE4, DB8540_PIN_AD1 };
static const unsigned msp0txrx_b_1_pins[] = { DB8540_PIN_AD2, DB8540_PIN_AC3 };
static const unsigned i2c1_b_2_pins[] = { DB8540_PIN_AH7, DB8540_PIN_AE7 };
static const unsigned stmmod_b_1_pins[] = { DB8540_PIN_AH11, DB8540_PIN_AF11,
DB8540_PIN_AH10, DB8540_PIN_AG10, DB8540_PIN_AF10 };
static const unsigned moduartstmmux_b_1_pins[] = { DB8540_PIN_AG11 };
static const unsigned msp1txrx_b_1_pins[] = { DB8540_PIN_AD4, DB8540_PIN_AG4 };
static const unsigned kp_b_1_pins[] = { DB8540_PIN_AJ24, DB8540_PIN_AE21,
DB8540_PIN_M26, DB8540_PIN_M25, DB8540_PIN_M27, DB8540_PIN_N25,
DB8540_PIN_M28, DB8540_PIN_N26, DB8540_PIN_M22, DB8540_PIN_N22,
DB8540_PIN_N27, DB8540_PIN_N28, DB8540_PIN_P22, DB8540_PIN_P28,
DB8540_PIN_P26, DB8540_PIN_T22, DB8540_PIN_R27, DB8540_PIN_P27,
DB8540_PIN_R26, DB8540_PIN_R25 };
static const unsigned u2txrx_b_1_pins[] = { DB8540_PIN_U22, DB8540_PIN_T27 };
static const unsigned sm_b_1_pins[] = { DB8540_PIN_AG22, DB8540_PIN_AF21,
DB8540_PIN_AF24, DB8540_PIN_AH22, DB8540_PIN_AJ23, DB8540_PIN_AH21,
DB8540_PIN_AG20, DB8540_PIN_AE23, DB8540_PIN_AH20, DB8540_PIN_AF22,
DB8540_PIN_AJ21, DB8540_PIN_AC27, DB8540_PIN_AD27, DB8540_PIN_AE28,
DB8540_PIN_AG26, DB8540_PIN_AF25, DB8540_PIN_AE27, DB8540_PIN_AF27,
DB8540_PIN_AG28, DB8540_PIN_AF28, DB8540_PIN_AG25, DB8540_PIN_AG24,
DB8540_PIN_AD25 };
static const unsigned smcs0_b_1_pins[] = { DB8540_PIN_AG19 };
static const unsigned smcs1_b_1_pins[] = { DB8540_PIN_AE26 };
static const unsigned ipgpio7_b_1_pins[] = { DB8540_PIN_AH25 };
static const unsigned ipgpio2_b_1_pins[] = { DB8540_PIN_AF26 };
static const unsigned ipgpio3_b_1_pins[] = { DB8540_PIN_AF23 };
static const unsigned i2c6_b_1_pins[] = { DB8540_PIN_AG23, DB8540_PIN_AE25 };
static const unsigned i2c5_b_1_pins[] = { DB8540_PIN_AH24, DB8540_PIN_AJ25 };
static const unsigned u3txrx_b_1_pins[] = { DB8540_PIN_AF20, DB8540_PIN_AG21 };
static const unsigned u3ctsrts_b_1_pins[] = { DB8540_PIN_AH19,
DB8540_PIN_AE19 };
static const unsigned i2c5_b_2_pins[] = { DB8540_PIN_AG18, DB8540_PIN_AH17 };
static const unsigned i2c4_b_2_pins[] = { DB8540_PIN_AF19, DB8540_PIN_AF18 };
static const unsigned u4txrx_b_1_pins[] = { DB8540_PIN_AE18, DB8540_PIN_AG17 };
static const unsigned u4ctsrts_b_1_pins[] = { DB8540_PIN_AF17,
DB8540_PIN_AE17 };
static const unsigned ddrtrig_b_1_pins[] = { DB8540_PIN_J3 };
static const unsigned msp4_b_1_pins[] = { DB8540_PIN_H3 };
static const unsigned pwl_b_1_pins[] = { DB8540_PIN_C6 };
static const unsigned spi1_b_1_pins[] = { DB8540_PIN_E2, DB8540_PIN_C10,
DB8540_PIN_C8, DB8540_PIN_C9 };
static const unsigned mc3_b_1_pins[] = { DB8540_PIN_B9, DB8540_PIN_A10,
DB8540_PIN_D9, DB8540_PIN_B11, DB8540_PIN_B10, DB8540_PIN_E10,
DB8540_PIN_B12 };
static const unsigned pwl_b_2_pins[] = { DB8540_PIN_D10 };
static const unsigned pwl_b_3_pins[] = { DB8540_PIN_B13 };
static const unsigned pwl_b_4_pins[] = { DB8540_PIN_C12 };
static const unsigned u2txrx_b_2_pins[] = { DB8540_PIN_B17, DB8540_PIN_D17 };
/* Altfunction C column */
static const unsigned ipgpio6_c_1_pins[] = { DB8540_PIN_AG6 };
static const unsigned ipgpio0_c_1_pins[] = { DB8540_PIN_AD5 };
static const unsigned ipgpio1_c_1_pins[] = { DB8540_PIN_AF7 };
static const unsigned ipgpio3_c_1_pins[] = { DB8540_PIN_AE4 };
static const unsigned ipgpio2_c_1_pins[] = { DB8540_PIN_AD1 };
static const unsigned u0_c_1_pins[] = { DB8540_PIN_AD4, DB8540_PIN_AF3,
DB8540_PIN_AF5, DB8540_PIN_AG4 };
static const unsigned smcleale_c_1_pins[] = { DB8540_PIN_AJ24,
DB8540_PIN_AE21 };
static const unsigned ipgpio4_c_1_pins[] = { DB8540_PIN_M26 };
static const unsigned ipgpio5_c_1_pins[] = { DB8540_PIN_M25 };
static const unsigned ipgpio6_c_2_pins[] = { DB8540_PIN_M27 };
static const unsigned ipgpio7_c_1_pins[] = { DB8540_PIN_N25 };
static const unsigned stmape_c_1_pins[] = { DB8540_PIN_M28, DB8540_PIN_N26,
DB8540_PIN_M22, DB8540_PIN_N22, DB8540_PIN_N27 };
static const unsigned u2rxtx_c_1_pins[] = { DB8540_PIN_N28, DB8540_PIN_P22 };
static const unsigned modobsresout_c_1_pins[] = { DB8540_PIN_P28 };
static const unsigned ipgpio2_c_2_pins[] = { DB8540_PIN_P26 };
static const unsigned ipgpio3_c_2_pins[] = { DB8540_PIN_T22 };
static const unsigned ipgpio4_c_2_pins[] = { DB8540_PIN_R27 };
static const unsigned ipgpio5_c_2_pins[] = { DB8540_PIN_P27 };
static const unsigned modaccgpo_c_1_pins[] = { DB8540_PIN_R26, DB8540_PIN_R25,
DB8540_PIN_U22 };
static const unsigned modobspwrrst_c_1_pins[] = { DB8540_PIN_T27 };
static const unsigned mc5_c_1_pins[] = { DB8540_PIN_AG22, DB8540_PIN_AF21,
DB8540_PIN_AF24, DB8540_PIN_AH22, DB8540_PIN_AJ23, DB8540_PIN_AH21,
DB8540_PIN_AG20, DB8540_PIN_AE23, DB8540_PIN_AH20, DB8540_PIN_AF22,
DB8540_PIN_AJ21};
static const unsigned smps0_c_1_pins[] = { DB8540_PIN_AG19 };
static const unsigned moduart1_c_1_pins[] = { DB8540_PIN_T25, DB8540_PIN_T26 };
static const unsigned mc2rstn_c_1_pins[] = { DB8540_PIN_AE28 };
static const unsigned i2c5_c_1_pins[] = { DB8540_PIN_AG28, DB8540_PIN_AF28 };
static const unsigned ipgpio0_c_2_pins[] = { DB8540_PIN_AG25 };
static const unsigned ipgpio1_c_2_pins[] = { DB8540_PIN_AG24 };
static const unsigned kp_c_1_pins[] = { DB8540_PIN_AD25, DB8540_PIN_AH25,
DB8540_PIN_AF26, DB8540_PIN_AF23 };
static const unsigned modrf_c_1_pins[] = { DB8540_PIN_AG23, DB8540_PIN_AE25,
DB8540_PIN_AH24 };
static const unsigned smps1_c_1_pins[] = { DB8540_PIN_AE26 };
static const unsigned i2c5_c_2_pins[] = { DB8540_PIN_AH19, DB8540_PIN_AE19 };
static const unsigned u4ctsrts_c_1_pins[] = { DB8540_PIN_AG18,
DB8540_PIN_AH17 };
static const unsigned u3rxtx_c_1_pins[] = { DB8540_PIN_AF19, DB8540_PIN_AF18 };
static const unsigned msp4_c_1_pins[] = { DB8540_PIN_J3 };
static const unsigned mc4rstn_c_1_pins[] = { DB8540_PIN_C6 };
static const unsigned spi0_c_1_pins[] = { DB8540_PIN_A10, DB8540_PIN_B10,
DB8540_PIN_E10, DB8540_PIN_B12 };
static const unsigned i2c3_c_1_pins[] = { DB8540_PIN_B13, DB8540_PIN_C12 };
/* Other alt C1 column */
static const unsigned spi3_oc1_1_pins[] = { DB8540_PIN_AG5, DB8540_PIN_AH5,
DB8540_PIN_AE4, DB8540_PIN_AD1 };
static const unsigned stmape_oc1_1_pins[] = { DB8540_PIN_AH11, DB8540_PIN_AF11,
DB8540_PIN_AH10, DB8540_PIN_AG10, DB8540_PIN_AF10 };
static const unsigned u2_oc1_1_pins[] = { DB8540_PIN_AG11 };
static const unsigned remap0_oc1_1_pins[] = { DB8540_PIN_AJ24 };
static const unsigned remap1_oc1_1_pins[] = { DB8540_PIN_AE21 };
static const unsigned modobsrefclk_oc1_1_pins[] = { DB8540_PIN_M26 };
static const unsigned modobspwrctrl_oc1_1_pins[] = { DB8540_PIN_M25 };
static const unsigned modobsclkout_oc1_1_pins[] = { DB8540_PIN_M27 };
static const unsigned moduart1_oc1_1_pins[] = { DB8540_PIN_N25 };
static const unsigned modprcmudbg_oc1_1_pins[] = { DB8540_PIN_M28,
DB8540_PIN_N26, DB8540_PIN_M22, DB8540_PIN_N22, DB8540_PIN_N27,
DB8540_PIN_P22, DB8540_PIN_P28, DB8540_PIN_P26, DB8540_PIN_T22,
DB8540_PIN_R26, DB8540_PIN_R25, DB8540_PIN_U22, DB8540_PIN_T27,
DB8540_PIN_AH20, DB8540_PIN_AG19, DB8540_PIN_AF22, DB8540_PIN_AJ21,
DB8540_PIN_T25};
static const unsigned modobsresout_oc1_1_pins[] = { DB8540_PIN_N28 };
static const unsigned modaccgpo_oc1_1_pins[] = { DB8540_PIN_R27, DB8540_PIN_P27,
DB8540_PIN_T26 };
static const unsigned kp_oc1_1_pins[] = { DB8540_PIN_AG22, DB8540_PIN_AF21,
DB8540_PIN_AF24, DB8540_PIN_AH22, DB8540_PIN_AJ23, DB8540_PIN_AH21,
DB8540_PIN_AG20, DB8540_PIN_AE23 };
static const unsigned modxmip_oc1_1_pins[] = { DB8540_PIN_AD25, DB8540_PIN_AH25,
DB8540_PIN_AG23, DB8540_PIN_AE25 };
static const unsigned i2c6_oc1_1_pins[] = { DB8540_PIN_AE26, DB8540_PIN_AE24 };
static const unsigned u2txrx_oc1_1_pins[] = { DB8540_PIN_B7, DB8540_PIN_A7 };
static const unsigned u2ctsrts_oc1_1_pins[] = { DB8540_PIN_D7, DB8540_PIN_D8 };
/* Other alt C2 column */
static const unsigned sbag_oc2_1_pins[] = { DB8540_PIN_AH11, DB8540_PIN_AG11,
DB8540_PIN_AF11, DB8540_PIN_AH10, DB8540_PIN_AG10, DB8540_PIN_AF10 };
static const unsigned hxclk_oc2_1_pins[] = { DB8540_PIN_M25 };
static const unsigned modaccuart_oc2_1_pins[] = { DB8540_PIN_N25 };
static const unsigned stmmod_oc2_1_pins[] = { DB8540_PIN_M28, DB8540_PIN_N26,
DB8540_PIN_M22, DB8540_PIN_N22, DB8540_PIN_N27 };
static const unsigned moduartstmmux_oc2_1_pins[] = { DB8540_PIN_N28 };
static const unsigned hxgpio_oc2_1_pins[] = { DB8540_PIN_P22, DB8540_PIN_P28,
DB8540_PIN_P26, DB8540_PIN_T22, DB8540_PIN_R27, DB8540_PIN_P27,
DB8540_PIN_R26, DB8540_PIN_R25 };
static const unsigned sbag_oc2_2_pins[] = { DB8540_PIN_U22, DB8540_PIN_T27,
DB8540_PIN_AG22, DB8540_PIN_AF21, DB8540_PIN_AF24, DB8540_PIN_AH22 };
static const unsigned modobsservice_oc2_1_pins[] = { DB8540_PIN_AJ23 };
static const unsigned moduart0_oc2_1_pins[] = { DB8540_PIN_AG20,
DB8540_PIN_AE23 };
static const unsigned stmape_oc2_1_pins[] = { DB8540_PIN_AH20, DB8540_PIN_AG19,
DB8540_PIN_AF22, DB8540_PIN_AJ21, DB8540_PIN_T25 };
static const unsigned u2_oc2_1_pins[] = { DB8540_PIN_T26, DB8540_PIN_AH21 };
static const unsigned modxmip_oc2_1_pins[] = { DB8540_PIN_AE26,
DB8540_PIN_AE24 };
/* Other alt C3 column */
static const unsigned modaccgpo_oc3_1_pins[] = { DB8540_PIN_AG11 };
static const unsigned tpui_oc3_1_pins[] = { DB8540_PIN_M26, DB8540_PIN_M25,
DB8540_PIN_M27, DB8540_PIN_N25, DB8540_PIN_M28, DB8540_PIN_N26,
DB8540_PIN_M22, DB8540_PIN_N22, DB8540_PIN_N27, DB8540_PIN_N28,
DB8540_PIN_P22, DB8540_PIN_P28, DB8540_PIN_P26, DB8540_PIN_T22,
DB8540_PIN_R27, DB8540_PIN_P27, DB8540_PIN_R26, DB8540_PIN_R25,
DB8540_PIN_U22, DB8540_PIN_T27, DB8540_PIN_AG22, DB8540_PIN_AF21,
DB8540_PIN_AF24, DB8540_PIN_AH22, DB8540_PIN_AJ23, DB8540_PIN_AH21,
DB8540_PIN_AG20, DB8540_PIN_AE23, DB8540_PIN_AH20, DB8540_PIN_AG19,
DB8540_PIN_AF22, DB8540_PIN_AJ21, DB8540_PIN_T25, DB8540_PIN_T26 };
/* Other alt C4 column */
static const unsigned hwobs_oc4_1_pins[] = { DB8540_PIN_M26, DB8540_PIN_M25,
DB8540_PIN_M27, DB8540_PIN_N25, DB8540_PIN_M28, DB8540_PIN_N26,
DB8540_PIN_M22, DB8540_PIN_N22, DB8540_PIN_N27, DB8540_PIN_N28,
DB8540_PIN_P22, DB8540_PIN_P28, DB8540_PIN_P26, DB8540_PIN_T22,
DB8540_PIN_R27, DB8540_PIN_P27, DB8540_PIN_R26, DB8540_PIN_R25 };
static const unsigned moduart1txrx_oc4_1_pins[] = { DB8540_PIN_U22,
DB8540_PIN_T27 };
static const unsigned moduart1rtscts_oc4_1_pins[] = { DB8540_PIN_AG22,
DB8540_PIN_AF21 };
static const unsigned modaccuarttxrx_oc4_1_pins[] = { DB8540_PIN_AF24,
DB8540_PIN_AH22 };
static const unsigned modaccuartrtscts_oc4_1_pins[] = { DB8540_PIN_AJ23,
DB8540_PIN_AH21 };
static const unsigned stmmod_oc4_1_pins[] = { DB8540_PIN_AH20, DB8540_PIN_AG19,
DB8540_PIN_AF22, DB8540_PIN_AJ21, DB8540_PIN_T25 };
static const unsigned moduartstmmux_oc4_1_pins[] = { DB8540_PIN_T26 };
#define DB8540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
static const struct nmk_pingroup nmk_db8540_groups[] = {
/* Altfunction A column */
DB8540_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(modobsclk_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(clkoutreq_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(modi2s_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(spi2_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(u2txrx_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(u2ctsrts_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(modsmb_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp2txdtcktfs_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp2rxd_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(clkout_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(clkout_a_2, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(msp4_a_1, NMK_GPIO_ALT_A),
DB8540_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
/* Altfunction B column */
DB8540_PIN_GROUP(apetrig_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(modtrig_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(moduartstmmux_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(u2txrx_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c6_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c5_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(u3txrx_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(u3ctsrts_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c5_b_2, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(i2c4_b_2, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(u4txrx_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(u4ctsrts_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(msp4_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
DB8540_PIN_GROUP(u2txrx_b_2, NMK_GPIO_ALT_B),
/* Altfunction C column */
DB8540_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio6_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modobsresout_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modaccgpo_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modobspwrrst_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(moduart1_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(i2c5_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio0_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(ipgpio1_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modrf_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(i2c5_c_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u4ctsrts_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u3rxtx_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(msp4_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
/* Other alt C1 column, these are still configured as alt C */
DB8540_PIN_GROUP(spi3_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u2_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modobsrefclk_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modobspwrctrl_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modobsclkout_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(moduart1_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modprcmudbg_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modobsresout_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modaccgpo_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modxmip_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(i2c6_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u2txrx_oc1_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u2ctsrts_oc1_1, NMK_GPIO_ALT_C),
/* Other alt C2 column, these are still configured as alt C */
DB8540_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(hxclk_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modaccuart_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(stmmod_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(moduartstmmux_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(hxgpio_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(sbag_oc2_2, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modobsservice_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(moduart0_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(stmape_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(u2_oc2_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modxmip_oc2_1, NMK_GPIO_ALT_C),
/* Other alt C3 column, these are still configured as alt C */
DB8540_PIN_GROUP(modaccgpo_oc3_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(tpui_oc3_1, NMK_GPIO_ALT_C),
/* Other alt C4 column, these are still configured as alt C */
DB8540_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(moduart1txrx_oc4_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(moduart1rtscts_oc4_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modaccuarttxrx_oc4_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(modaccuartrtscts_oc4_1, NMK_GPIO_ALT_C),
DB8540_PIN_GROUP(stmmod_oc4_1, NMK_GPIO_ALT_C),
};
/* We use this macro to define the groups applicable to a function */
#define DB8540_FUNC_GROUPS(a, b...) \
static const char * const a##_groups[] = { b };
DB8540_FUNC_GROUPS(apetrig, "apetrig_b_1");
DB8540_FUNC_GROUPS(clkout, "clkoutreq_a_1", "clkout_a_1", "clkout_a_2");
DB8540_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
DB8540_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
DB8540_FUNC_GROUPS(hwobs, "hwobs_oc4_1");
DB8540_FUNC_GROUPS(hx, "hxclk_oc2_1", "hxgpio_oc2_1");
DB8540_FUNC_GROUPS(i2c0, "i2c0_a_1");
DB8540_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
DB8540_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
DB8540_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c4_b_1");
DB8540_FUNC_GROUPS(i2c4, "i2c4_b_2");
DB8540_FUNC_GROUPS(i2c5, "i2c5_b_1", "i2c5_b_2", "i2c5_c_1", "i2c5_c_2");
DB8540_FUNC_GROUPS(i2c6, "i2c6_b_1", "i2c6_oc1_1");
/* The image processor has 8 GPIO pins that can be muxed out */
DB8540_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio0_c_1", "ipgpio0_c_2",
"ipgpio1_a_1", "ipgpio1_c_1", "ipgpio1_c_2",
"ipgpio2_b_1", "ipgpio2_c_1", "ipgpio2_c_2",
"ipgpio3_b_1", "ipgpio3_c_1", "ipgpio3_c_2",
"ipgpio4_c_1", "ipgpio4_c_2",
"ipgpio5_c_1", "ipgpio5_c_2",
"ipgpio6_c_1", "ipgpio6_c_2",
"ipgpio7_b_1", "ipgpio7_c_1");
DB8540_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
DB8540_FUNC_GROUPS(kp, "kp_a_1", "kp_b_1", "kp_c_1", "kp_oc1_1");
DB8540_FUNC_GROUPS(lcd, "lcd_d0_d7_a_1", "lcd_d12_d23_a_1", "lcd_d8_d11_a_1",
"lcdvsi0_a_1", "lcdvsi1_a_1");
DB8540_FUNC_GROUPS(lcdb, "lcdb_a_1");
DB8540_FUNC_GROUPS(mc0, "mc0_a_1");
DB8540_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2");
DB8540_FUNC_GROUPS(mc2, "mc2_a_1", "mc2rstn_c_1");
DB8540_FUNC_GROUPS(mc3, "mc3_b_1");
DB8540_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
DB8540_FUNC_GROUPS(mc5, "mc5_c_1");
DB8540_FUNC_GROUPS(modaccgpo, "modaccgpo_c_1", "modaccgpo_oc1_1",
"modaccgpo_oc3_1");
DB8540_FUNC_GROUPS(modaccuart, "modaccuart_oc2_1", "modaccuarttxrx_oc4_1",
"modaccuartrtccts_oc4_1");
DB8540_FUNC_GROUPS(modi2s, "modi2s_a_1");
DB8540_FUNC_GROUPS(modobs, "modobsclk_a_1", "modobsclkout_oc1_1",
"modobspwrctrl_oc1_1", "modobspwrrst_c_1",
"modobsrefclk_oc1_1", "modobsresout_c_1",
"modobsresout_oc1_1", "modobsservice_oc2_1");
DB8540_FUNC_GROUPS(modprcmudbg, "modprcmudbg_oc1_1");
DB8540_FUNC_GROUPS(modrf, "modrf_c_1");
DB8540_FUNC_GROUPS(modsmb, "modsmb_a_1");
DB8540_FUNC_GROUPS(modtrig, "modtrig_b_1");
DB8540_FUNC_GROUPS(moduart, "moduart1_c_1", "moduart1_oc1_1",
"moduart1txrx_oc4_1", "moduart1rtscts_oc4_1", "moduart0_oc2_1");
DB8540_FUNC_GROUPS(moduartstmmux, "moduartstmmux_b_1", "moduartstmmux_oc2_1",
"moduartstmmux_oc4_1");
DB8540_FUNC_GROUPS(modxmip, "modxmip_oc1_1", "modxmip_oc2_1");
/*
* MSP0 can only be on a certain set of pins, but the TX/RX pins can be
* switched around by selecting the altfunction A or B.
*/
DB8540_FUNC_GROUPS(msp0, "msp0rfsrck_a_1", "msp0tfstck_a_1", "msp0txrx_a_1",
"msp0txrx_b_1");
DB8540_FUNC_GROUPS(msp1, "msp1_a_1", "msp1txrx_a_1", "msp1txrx_b_1");
DB8540_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2txdtcktfs_a_1", "msp2rxd_a_1");
DB8540_FUNC_GROUPS(msp4, "msp4_a_1", "msp4_b_1", "msp4_c_1");
DB8540_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
DB8540_FUNC_GROUPS(remap, "remap0_oc1_1", "remap1_oc1_1");
DB8540_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc2_2");
/* Select between CS0 on alt B or PS1 on alt C */
DB8540_FUNC_GROUPS(sm, "sm_b_1", "smcleale_c_1", "smcs0_b_1", "smcs1_b_1",
"smps0_c_1", "smps1_c_1");
DB8540_FUNC_GROUPS(spi0, "spi0_c_1");
DB8540_FUNC_GROUPS(spi1, "spi1_b_1");
DB8540_FUNC_GROUPS(spi2, "spi2_a_1");
DB8540_FUNC_GROUPS(spi3, "spi3_oc1_1");
DB8540_FUNC_GROUPS(ssp0, "ssp0_a_1");
DB8540_FUNC_GROUPS(ssp1, "ssp1_a_1");
DB8540_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_oc1_1", "stmape_oc2_1");
DB8540_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_oc2_1", "stmmod_oc4_1");
DB8540_FUNC_GROUPS(tpui, "tpui_oc3_1");
DB8540_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
DB8540_FUNC_GROUPS(u1, "u1ctsrts_a_1", "u1rxtx_a_1");
DB8540_FUNC_GROUPS(u2, "u2_oc1_1", "u2_oc2_1", "u2ctsrts_a_1", "u2ctsrts_oc1_1",
"u2rxtx_c_1", "u2txrx_a_1", "u2txrx_b_1", "u2txrx_b_2",
"u2txrx_oc1_1");
DB8540_FUNC_GROUPS(u3, "u3ctsrts_b_1", "u3rxtx_c_1", "u3txrxa_b_1");
DB8540_FUNC_GROUPS(u4, "u4ctsrts_b_1", "u4ctsrts_c_1", "u4txrx_b_1");
DB8540_FUNC_GROUPS(usb, "usb_a_1");
#define FUNCTION(fname) \
{ \
.name = #fname, \
.groups = fname##_groups, \
.ngroups = ARRAY_SIZE(fname##_groups), \
}
static const struct nmk_function nmk_db8540_functions[] = {
FUNCTION(apetrig),
FUNCTION(clkout),
FUNCTION(ddrtrig),
FUNCTION(hsi),
FUNCTION(hwobs),
FUNCTION(hx),
FUNCTION(i2c0),
FUNCTION(i2c1),
FUNCTION(i2c2),
FUNCTION(i2c3),
FUNCTION(i2c4),
FUNCTION(i2c5),
FUNCTION(i2c6),
FUNCTION(ipgpio),
FUNCTION(ipi2c),
FUNCTION(kp),
FUNCTION(lcd),
FUNCTION(lcdb),
FUNCTION(mc0),
FUNCTION(mc1),
FUNCTION(mc2),
FUNCTION(mc3),
FUNCTION(mc4),
FUNCTION(mc5),
FUNCTION(modaccgpo),
FUNCTION(modaccuart),
FUNCTION(modi2s),
FUNCTION(modobs),
FUNCTION(modprcmudbg),
FUNCTION(modrf),
FUNCTION(modsmb),
FUNCTION(modtrig),
FUNCTION(moduart),
FUNCTION(modxmip),
FUNCTION(msp0),
FUNCTION(msp1),
FUNCTION(msp2),
FUNCTION(msp4),
FUNCTION(pwl),
FUNCTION(remap),
FUNCTION(sbag),
FUNCTION(sm),
FUNCTION(spi0),
FUNCTION(spi1),
FUNCTION(spi2),
FUNCTION(spi3),
FUNCTION(ssp0),
FUNCTION(ssp1),
FUNCTION(stmape),
FUNCTION(stmmod),
FUNCTION(tpui),
FUNCTION(u0),
FUNCTION(u1),
FUNCTION(u2),
FUNCTION(u3),
FUNCTION(u4),
FUNCTION(usb)
};
static const struct nmk_pinctrl_soc_data nmk_db8540_soc = {
.gpio_ranges = nmk_db8540_ranges,
.gpio_num_ranges = ARRAY_SIZE(nmk_db8540_ranges),
.pins = nmk_db8540_pins,
.npins = ARRAY_SIZE(nmk_db8540_pins),
.functions = nmk_db8540_functions,
.nfunctions = ARRAY_SIZE(nmk_db8540_functions),
.groups = nmk_db8540_groups,
.ngroups = ARRAY_SIZE(nmk_db8540_groups),
};
void __devinit
nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc)
{
*soc = &nmk_db8540_soc;
}

357
drivers/pinctrl/pinctrl-nomadik-stn8815.c Normal file
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#include <linux/kernel.h>
#include <linux/pinctrl/pinctrl.h>
#include "pinctrl-nomadik.h"
/* All the pins that can be used for GPIO and some other functions */
#define _GPIO(offset) (offset)
#define STN8815_PIN_B4 _GPIO(0)
#define STN8815_PIN_D5 _GPIO(1)
#define STN8815_PIN_C5 _GPIO(2)
#define STN8815_PIN_A4 _GPIO(3)
#define STN8815_PIN_B5 _GPIO(4)
#define STN8815_PIN_D6 _GPIO(5)
#define STN8815_PIN_C6 _GPIO(6)
#define STN8815_PIN_B6 _GPIO(7)
#define STN8815_PIN_B10 _GPIO(8)
#define STN8815_PIN_A10 _GPIO(9)
#define STN8815_PIN_C11 _GPIO(10)
#define STN8815_PIN_B11 _GPIO(11)
#define STN8815_PIN_A11 _GPIO(12)
#define STN8815_PIN_C12 _GPIO(13)
#define STN8815_PIN_B12 _GPIO(14)
#define STN8815_PIN_A12 _GPIO(15)
#define STN8815_PIN_C13 _GPIO(16)
#define STN8815_PIN_B13 _GPIO(17)
#define STN8815_PIN_A13 _GPIO(18)
#define STN8815_PIN_D13 _GPIO(19)
#define STN8815_PIN_C14 _GPIO(20)
#define STN8815_PIN_B14 _GPIO(21)
#define STN8815_PIN_A14 _GPIO(22)
#define STN8815_PIN_D15 _GPIO(23)
#define STN8815_PIN_C15 _GPIO(24)
#define STN8815_PIN_B15 _GPIO(25)
#define STN8815_PIN_A15 _GPIO(26)
#define STN8815_PIN_C16 _GPIO(27)
#define STN8815_PIN_B16 _GPIO(28)
#define STN8815_PIN_A16 _GPIO(29)
#define STN8815_PIN_D17 _GPIO(30)
#define STN8815_PIN_C17 _GPIO(31)
#define STN8815_PIN_AB6 _GPIO(32)
#define STN8815_PIN_AA6 _GPIO(33)
#define STN8815_PIN_Y6 _GPIO(34)
#define STN8815_PIN_Y5 _GPIO(35)
#define STN8815_PIN_AA5 _GPIO(36)
#define STN8815_PIN_AB5 _GPIO(37)
#define STN8815_PIN_AB4 _GPIO(38)
#define STN8815_PIN_Y4 _GPIO(39)
#define STN8815_PIN_R1 _GPIO(40)
#define STN8815_PIN_R2 _GPIO(41)
#define STN8815_PIN_R3 _GPIO(42)
#define STN8815_PIN_P1 _GPIO(43)
#define STN8815_PIN_P2 _GPIO(44)
#define STN8815_PIN_P3 _GPIO(45)
#define STN8815_PIN_N1 _GPIO(46)
#define STN8815_PIN_N2 _GPIO(47)
#define STN8815_PIN_N3 _GPIO(48)
#define STN8815_PIN_M1 _GPIO(49)
#define STN8815_PIN_M3 _GPIO(50)
#define STN8815_PIN_M2 _GPIO(51)
#define STN8815_PIN_L1 _GPIO(52)
#define STN8815_PIN_L4 _GPIO(53)
#define STN8815_PIN_L3 _GPIO(54)
#define STN8815_PIN_L2 _GPIO(55)
#define STN8815_PIN_F3 _GPIO(56)
#define STN8815_PIN_F2 _GPIO(57)
#define STN8815_PIN_E1 _GPIO(58)
#define STN8815_PIN_E3 _GPIO(59)
#define STN8815_PIN_E2 _GPIO(60)
#define STN8815_PIN_E4 _GPIO(61)
#define STN8815_PIN_D3 _GPIO(62)
#define STN8815_PIN_D2 _GPIO(63)
#define STN8815_PIN_F21 _GPIO(64)
#define STN8815_PIN_F20 _GPIO(65)
#define STN8815_PIN_E22 _GPIO(66)
#define STN8815_PIN_D22 _GPIO(67)
#define STN8815_PIN_E21 _GPIO(68)
#define STN8815_PIN_E20 _GPIO(69)
#define STN8815_PIN_C22 _GPIO(70)
#define STN8815_PIN_D21 _GPIO(71)
#define STN8815_PIN_D20 _GPIO(72)
#define STN8815_PIN_C21 _GPIO(73)
#define STN8815_PIN_C20 _GPIO(74)
#define STN8815_PIN_C19 _GPIO(75)
#define STN8815_PIN_B20 _GPIO(76)
#define STN8815_PIN_B8 _GPIO(77)
#define STN8815_PIN_A8 _GPIO(78)
#define STN8815_PIN_C9 _GPIO(79)
#define STN8815_PIN_B9 _GPIO(80)
#define STN8815_PIN_A9 _GPIO(81)
#define STN8815_PIN_C10 _GPIO(82)
#define STN8815_PIN_K1 _GPIO(83)
#define STN8815_PIN_K3 _GPIO(84)
#define STN8815_PIN_K2 _GPIO(85)
#define STN8815_PIN_J1 _GPIO(86)
#define STN8815_PIN_J3 _GPIO(87)
#define STN8815_PIN_J2 _GPIO(88)
#define STN8815_PIN_H1 _GPIO(89)
#define STN8815_PIN_H3 _GPIO(90)
#define STN8815_PIN_H2 _GPIO(91)
#define STN8815_PIN_G1 _GPIO(92)
#define STN8815_PIN_G3 _GPIO(93)
#define STN8815_PIN_G2 _GPIO(94)
#define STN8815_PIN_F1 _GPIO(95)
#define STN8815_PIN_T20 _GPIO(96)
#define STN8815_PIN_R21 _GPIO(97)
#define STN8815_PIN_R20 _GPIO(98)
#define STN8815_PIN_U22 _GPIO(99)
#define STN8815_PIN_N21 _GPIO(100)
#define STN8815_PIN_N20 _GPIO(101)
#define STN8815_PIN_P22 _GPIO(102)
#define STN8815_PIN_N22 _GPIO(103)
#define STN8815_PIN_V22 _GPIO(104)
#define STN8815_PIN_V21 _GPIO(105)
#define STN8815_PIN_K22 _GPIO(106)
#define STN8815_PIN_K21 _GPIO(107)
#define STN8815_PIN_H20 _GPIO(108)
#define STN8815_PIN_G20 _GPIO(109)
#define STN8815_PIN_L21 _GPIO(110)
#define STN8815_PIN_H21 _GPIO(111)
#define STN8815_PIN_J21 _GPIO(112)
#define STN8815_PIN_H22 _GPIO(113)
#define STN8815_PIN_K20 _GPIO(114)
#define STN8815_PIN_L22 _GPIO(115)
#define STN8815_PIN_G21 _GPIO(116)
#define STN8815_PIN_J20 _GPIO(117)
#define STN8815_PIN_G22 _GPIO(118)
#define STN8815_PIN_U19 _GPIO(119)
#define STN8815_PIN_G19 _GPIO(120)
#define STN8815_PIN_M22 _GPIO(121)
#define STN8815_PIN_M19 _GPIO(122)
#define STN8815_PIN_J22 _GPIO(123)
/* GPIOs 124-127 not routed to pins */
/*
* The names of the pins are denoted by GPIO number and ball name, even
* though they can be used for other things than GPIO, this is the first
* column in the table of the data sheet and often used on schematics and
* such.
*/
static const struct pinctrl_pin_desc nmk_stn8815_pins[] = {
PINCTRL_PIN(STN8815_PIN_B4, "GPIO0_B4"),
PINCTRL_PIN(STN8815_PIN_D5, "GPIO1_D5"),
PINCTRL_PIN(STN8815_PIN_C5, "GPIO2_C5"),
PINCTRL_PIN(STN8815_PIN_A4, "GPIO3_A4"),
PINCTRL_PIN(STN8815_PIN_B5, "GPIO4_B5"),
PINCTRL_PIN(STN8815_PIN_D6, "GPIO5_D6"),
PINCTRL_PIN(STN8815_PIN_C6, "GPIO6_C6"),
PINCTRL_PIN(STN8815_PIN_B6, "GPIO7_B6"),
PINCTRL_PIN(STN8815_PIN_B10, "GPIO8_B10"),
PINCTRL_PIN(STN8815_PIN_A10, "GPIO9_A10"),
PINCTRL_PIN(STN8815_PIN_C11, "GPIO10_C11"),
PINCTRL_PIN(STN8815_PIN_B11, "GPIO11_B11"),
PINCTRL_PIN(STN8815_PIN_A11, "GPIO12_A11"),
PINCTRL_PIN(STN8815_PIN_C12, "GPIO13_C12"),
PINCTRL_PIN(STN8815_PIN_B12, "GPIO14_B12"),
PINCTRL_PIN(STN8815_PIN_A12, "GPIO15_A12"),
PINCTRL_PIN(STN8815_PIN_C13, "GPIO16_C13"),
PINCTRL_PIN(STN8815_PIN_B13, "GPIO17_B13"),
PINCTRL_PIN(STN8815_PIN_A13, "GPIO18_A13"),
PINCTRL_PIN(STN8815_PIN_D13, "GPIO19_D13"),
PINCTRL_PIN(STN8815_PIN_C14, "GPIO20_C14"),
PINCTRL_PIN(STN8815_PIN_B14, "GPIO21_B14"),
PINCTRL_PIN(STN8815_PIN_A14, "GPIO22_A14"),
PINCTRL_PIN(STN8815_PIN_D15, "GPIO23_D15"),
PINCTRL_PIN(STN8815_PIN_C15, "GPIO24_C15"),
PINCTRL_PIN(STN8815_PIN_B15, "GPIO25_B15"),
PINCTRL_PIN(STN8815_PIN_A15, "GPIO26_A15"),
PINCTRL_PIN(STN8815_PIN_C16, "GPIO27_C16"),
PINCTRL_PIN(STN8815_PIN_B16, "GPIO28_B16"),
PINCTRL_PIN(STN8815_PIN_A16, "GPIO29_A16"),
PINCTRL_PIN(STN8815_PIN_D17, "GPIO30_D17"),
PINCTRL_PIN(STN8815_PIN_C17, "GPIO31_C17"),
PINCTRL_PIN(STN8815_PIN_AB6, "GPIO32_AB6"),
PINCTRL_PIN(STN8815_PIN_AA6, "GPIO33_AA6"),
PINCTRL_PIN(STN8815_PIN_Y6, "GPIO34_Y6"),
PINCTRL_PIN(STN8815_PIN_Y5, "GPIO35_Y5"),
PINCTRL_PIN(STN8815_PIN_AA5, "GPIO36_AA5"),
PINCTRL_PIN(STN8815_PIN_AB5, "GPIO37_AB5"),
PINCTRL_PIN(STN8815_PIN_AB4, "GPIO38_AB4"),
PINCTRL_PIN(STN8815_PIN_Y4, "GPIO39_Y4"),
PINCTRL_PIN(STN8815_PIN_R1, "GPIO40_R1"),
PINCTRL_PIN(STN8815_PIN_R2, "GPIO41_R2"),
PINCTRL_PIN(STN8815_PIN_R3, "GPIO42_R3"),
PINCTRL_PIN(STN8815_PIN_P1, "GPIO43_P1"),
PINCTRL_PIN(STN8815_PIN_P2, "GPIO44_P2"),
PINCTRL_PIN(STN8815_PIN_P3, "GPIO45_P3"),
PINCTRL_PIN(STN8815_PIN_N1, "GPIO46_N1"),
PINCTRL_PIN(STN8815_PIN_N2, "GPIO47_N2"),
PINCTRL_PIN(STN8815_PIN_N3, "GPIO48_N3"),
PINCTRL_PIN(STN8815_PIN_M1, "GPIO49_M1"),
PINCTRL_PIN(STN8815_PIN_M3, "GPIO50_M3"),
PINCTRL_PIN(STN8815_PIN_M2, "GPIO51_M2"),
PINCTRL_PIN(STN8815_PIN_L1, "GPIO52_L1"),
PINCTRL_PIN(STN8815_PIN_L4, "GPIO53_L4"),
PINCTRL_PIN(STN8815_PIN_L3, "GPIO54_L3"),
PINCTRL_PIN(STN8815_PIN_L2, "GPIO55_L2"),
PINCTRL_PIN(STN8815_PIN_F3, "GPIO56_F3"),
PINCTRL_PIN(STN8815_PIN_F2, "GPIO57_F2"),
PINCTRL_PIN(STN8815_PIN_E1, "GPIO58_E1"),
PINCTRL_PIN(STN8815_PIN_E3, "GPIO59_E3"),
PINCTRL_PIN(STN8815_PIN_E2, "GPIO60_E2"),
PINCTRL_PIN(STN8815_PIN_E4, "GPIO61_E4"),
PINCTRL_PIN(STN8815_PIN_D3, "GPIO62_D3"),
PINCTRL_PIN(STN8815_PIN_D2, "GPIO63_D2"),
PINCTRL_PIN(STN8815_PIN_F21, "GPIO64_F21"),
PINCTRL_PIN(STN8815_PIN_F20, "GPIO65_F20"),
PINCTRL_PIN(STN8815_PIN_E22, "GPIO66_E22"),
PINCTRL_PIN(STN8815_PIN_D22, "GPIO67_D22"),
PINCTRL_PIN(STN8815_PIN_E21, "GPIO68_E21"),
PINCTRL_PIN(STN8815_PIN_E20, "GPIO69_E20"),
PINCTRL_PIN(STN8815_PIN_C22, "GPIO70_C22"),
PINCTRL_PIN(STN8815_PIN_D21, "GPIO71_D21"),
PINCTRL_PIN(STN8815_PIN_D20, "GPIO72_D20"),
PINCTRL_PIN(STN8815_PIN_C21, "GPIO73_C21"),
PINCTRL_PIN(STN8815_PIN_C20, "GPIO74_C20"),
PINCTRL_PIN(STN8815_PIN_C19, "GPIO75_C19"),
PINCTRL_PIN(STN8815_PIN_B20, "GPIO76_B20"),
PINCTRL_PIN(STN8815_PIN_B8, "GPIO77_B8"),
PINCTRL_PIN(STN8815_PIN_A8, "GPIO78_A8"),
PINCTRL_PIN(STN8815_PIN_C9, "GPIO79_C9"),
PINCTRL_PIN(STN8815_PIN_B9, "GPIO80_B9"),
PINCTRL_PIN(STN8815_PIN_A9, "GPIO81_A9"),
PINCTRL_PIN(STN8815_PIN_C10, "GPIO82_C10"),
PINCTRL_PIN(STN8815_PIN_K1, "GPIO83_K1"),
PINCTRL_PIN(STN8815_PIN_K3, "GPIO84_K3"),
PINCTRL_PIN(STN8815_PIN_K2, "GPIO85_K2"),
PINCTRL_PIN(STN8815_PIN_J1, "GPIO86_J1"),
PINCTRL_PIN(STN8815_PIN_J3, "GPIO87_J3"),
PINCTRL_PIN(STN8815_PIN_J2, "GPIO88_J2"),
PINCTRL_PIN(STN8815_PIN_H1, "GPIO89_H1"),
PINCTRL_PIN(STN8815_PIN_H3, "GPIO90_H3"),
PINCTRL_PIN(STN8815_PIN_H2, "GPIO91_H2"),
PINCTRL_PIN(STN8815_PIN_G1, "GPIO92_G1"),
PINCTRL_PIN(STN8815_PIN_G3, "GPIO93_G3"),
PINCTRL_PIN(STN8815_PIN_G2, "GPIO94_G2"),
PINCTRL_PIN(STN8815_PIN_F1, "GPIO95_F1"),
PINCTRL_PIN(STN8815_PIN_T20, "GPIO96_T20"),
PINCTRL_PIN(STN8815_PIN_R21, "GPIO97_R21"),
PINCTRL_PIN(STN8815_PIN_R20, "GPIO98_R20"),
PINCTRL_PIN(STN8815_PIN_U22, "GPIO99_U22"),
PINCTRL_PIN(STN8815_PIN_N21, "GPIO100_N21"),
PINCTRL_PIN(STN8815_PIN_N20, "GPIO101_N20"),
PINCTRL_PIN(STN8815_PIN_P22, "GPIO102_P22"),
PINCTRL_PIN(STN8815_PIN_N22, "GPIO103_N22"),
PINCTRL_PIN(STN8815_PIN_V22, "GPIO104_V22"),
PINCTRL_PIN(STN8815_PIN_V21, "GPIO105_V21"),
PINCTRL_PIN(STN8815_PIN_K22, "GPIO106_K22"),
PINCTRL_PIN(STN8815_PIN_K21, "GPIO107_K21"),
PINCTRL_PIN(STN8815_PIN_H20, "GPIO108_H20"),
PINCTRL_PIN(STN8815_PIN_G20, "GPIO109_G20"),
PINCTRL_PIN(STN8815_PIN_L21, "GPIO110_L21"),
PINCTRL_PIN(STN8815_PIN_H21, "GPIO111_H21"),
PINCTRL_PIN(STN8815_PIN_J21, "GPIO112_J21"),
PINCTRL_PIN(STN8815_PIN_H22, "GPIO113_H22"),
PINCTRL_PIN(STN8815_PIN_K20, "GPIO114_K20"),
PINCTRL_PIN(STN8815_PIN_L22, "GPIO115_L22"),
PINCTRL_PIN(STN8815_PIN_G21, "GPIO116_G21"),
PINCTRL_PIN(STN8815_PIN_J20, "GPIO117_J20"),
PINCTRL_PIN(STN8815_PIN_G22, "GPIO118_G22"),
PINCTRL_PIN(STN8815_PIN_U19, "GPIO119_U19"),
PINCTRL_PIN(STN8815_PIN_G19, "GPIO120_G19"),
PINCTRL_PIN(STN8815_PIN_M22, "GPIO121_M22"),
PINCTRL_PIN(STN8815_PIN_M19, "GPIO122_M19"),
PINCTRL_PIN(STN8815_PIN_J22, "GPIO123_J22"),
};
#define STN8815_GPIO_RANGE(a, b, c) { .name = "STN8815", .id = a, .base = b, \
.pin_base = b, .npins = c }
/*
* This matches the 32-pin gpio chips registered by the GPIO portion. This
* cannot be const since we assign the struct gpio_chip * pointer at runtime.
*/
static struct pinctrl_gpio_range nmk_stn8815_ranges[] = {
STN8815_GPIO_RANGE(0, 0, 32),
STN8815_GPIO_RANGE(1, 32, 32),
STN8815_GPIO_RANGE(2, 64, 32),
STN8815_GPIO_RANGE(3, 96, 28),
};
/*
* Read the pin group names like this:
* u0_a_1 = first groups of pins for uart0 on alt function a
* i2c2_b_2 = second group of pins for i2c2 on alt function b
*/
/* Altfunction A */
static const unsigned u0_a_1_pins[] = { STN8815_PIN_B4, STN8815_PIN_D5,
STN8815_PIN_C5, STN8815_PIN_A4, STN8815_PIN_B5, STN8815_PIN_D6,
STN8815_PIN_C6, STN8815_PIN_B6 };
static const unsigned mmcsd_a_1_pins[] = { STN8815_PIN_B10, STN8815_PIN_A10,
STN8815_PIN_C11, STN8815_PIN_B11, STN8815_PIN_A11, STN8815_PIN_C12,
STN8815_PIN_B12, STN8815_PIN_A12, STN8815_PIN_C13, STN8815_PIN_C15 };
static const unsigned u1_a_1_pins[] = { STN8815_PIN_M2, STN8815_PIN_L1,
STN8815_PIN_F3, STN8815_PIN_F2 };
static const unsigned i2c1_a_1_pins[] = { STN8815_PIN_L4, STN8815_PIN_L3 };
static const unsigned i2c0_a_1_pins[] = { STN8815_PIN_D3, STN8815_PIN_D2 };
/* Altfunction B */
static const unsigned u1_b_1_pins[] = { STN8815_PIN_B16, STN8815_PIN_A16 };
static const unsigned i2cusb_b_1_pins[] = { STN8815_PIN_C21, STN8815_PIN_C20 };
#define STN8815_PIN_GROUP(a,b) { .name = #a, .pins = a##_pins, \
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
static const struct nmk_pingroup nmk_stn8815_groups[] = {
STN8815_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
STN8815_PIN_GROUP(mmcsd_a_1, NMK_GPIO_ALT_A),
STN8815_PIN_GROUP(u1_a_1, NMK_GPIO_ALT_A),
STN8815_PIN_GROUP(i2c1_a_1, NMK_GPIO_ALT_A),
STN8815_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
STN8815_PIN_GROUP(u1_b_1, NMK_GPIO_ALT_B),
STN8815_PIN_GROUP(i2cusb_b_1, NMK_GPIO_ALT_B),
};
/* We use this macro to define the groups applicable to a function */
#define STN8815_FUNC_GROUPS(a, b...) \
static const char * const a##_groups[] = { b };
STN8815_FUNC_GROUPS(u0, "u0_a_1");
STN8815_FUNC_GROUPS(mmcsd, "mmcsd_a_1");
STN8815_FUNC_GROUPS(u1, "u1_a_1", "u1_b_1");
STN8815_FUNC_GROUPS(i2c1, "i2c1_a_1");
STN8815_FUNC_GROUPS(i2c0, "i2c0_a_1");
STN8815_FUNC_GROUPS(i2cusb, "i2cusb_b_1");
#define FUNCTION(fname) \
{ \
.name = #fname, \
.groups = fname##_groups, \
.ngroups = ARRAY_SIZE(fname##_groups), \
}
static const struct nmk_function nmk_stn8815_functions[] = {
FUNCTION(u0),
FUNCTION(mmcsd),
FUNCTION(u1),
FUNCTION(i2c1),
FUNCTION(i2c0),
FUNCTION(i2cusb),
};
static const struct nmk_pinctrl_soc_data nmk_stn8815_soc = {
.gpio_ranges = nmk_stn8815_ranges,
.gpio_num_ranges = ARRAY_SIZE(nmk_stn8815_ranges),
.pins = nmk_stn8815_pins,
.npins = ARRAY_SIZE(nmk_stn8815_pins),
.functions = nmk_stn8815_functions,
.nfunctions = ARRAY_SIZE(nmk_stn8815_functions),
.groups = nmk_stn8815_groups,
.ngroups = ARRAY_SIZE(nmk_stn8815_groups),
};
void __devinit
nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
{
*soc = &nmk_stn8815_soc;
}

10
drivers/pinctrl/pinctrl-nomadik.c
View file

@ -819,6 +819,7 @@ static struct irq_chip nmk_gpio_irq_chip = {
.irq_set_wake = nmk_gpio_irq_set_wake,
.irq_startup = nmk_gpio_irq_startup,
.irq_shutdown = nmk_gpio_irq_shutdown,
.flags = IRQCHIP_MASK_ON_SUSPEND,
};
static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
@ -826,16 +827,14 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
{
struct nmk_gpio_chip *nmk_chip;
struct irq_chip *host_chip = irq_get_chip(irq);
unsigned int first_irq;
chained_irq_enter(host_chip, desc);
nmk_chip = irq_get_handler_data(irq);
first_irq = nmk_chip->domain->revmap_data.legacy.first_irq;
while (status) {
int bit = __ffs(status);
generic_handle_irq(first_irq + bit);
generic_handle_irq(irq_find_mapping(nmk_chip->domain, bit));
status &= ~BIT(bit);
}
@ -1720,8 +1719,12 @@ static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
of_match_device(nmk_pinctrl_match, &pdev->dev)->data;
/* Poke in other ASIC variants here */
if (version == PINCTRL_NMK_STN8815)
nmk_pinctrl_stn8815_init(&npct->soc);
if (version == PINCTRL_NMK_DB8500)
nmk_pinctrl_db8500_init(&npct->soc);
if (version == PINCTRL_NMK_DB8540)
nmk_pinctrl_db8540_init(&npct->soc);
/*
* We need all the GPIO drivers to probe FIRST, or we will not be able
@ -1772,6 +1775,7 @@ static struct platform_driver nmk_gpio_driver = {
static const struct platform_device_id nmk_pinctrl_id[] = {
{ "pinctrl-stn8815", PINCTRL_NMK_STN8815 },
{ "pinctrl-db8500", PINCTRL_NMK_DB8500 },
{ "pinctrl-db8540", PINCTRL_NMK_DB8540 },
};
static struct platform_driver nmk_pinctrl_driver = {

27
drivers/pinctrl/pinctrl-nomadik.h
View file

@ -6,6 +6,7 @@
/* Package definitions */
#define PINCTRL_NMK_STN8815 0
#define PINCTRL_NMK_DB8500 1
#define PINCTRL_NMK_DB8540 2
/**
* struct nmk_function - Nomadik pinctrl mux function
@ -61,6 +62,19 @@ struct nmk_pinctrl_soc_data {
unsigned ngroups;
};
#ifdef CONFIG_PINCTRL_STN8815
void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc);
#else
static inline void
nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
{
}
#endif
#ifdef CONFIG_PINCTRL_DB8500
void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);
@ -74,4 +88,17 @@ nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
#endif
#ifdef CONFIG_PINCTRL_DB8540
void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc);
#else
static inline void
nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc)
{
}
#endif
#endif /* PINCTRL_PINCTRL_NOMADIK_H */

56
drivers/pinctrl/pinctrl-single.c
View file

@ -26,7 +26,8 @@
#include "core.h"
#define DRIVER_NAME "pinctrl-single"
#define PCS_MUX_NAME "pinctrl-single,pins"
#define PCS_MUX_PINS_NAME "pinctrl-single,pins"
#define PCS_MUX_BITS_NAME "pinctrl-single,bits"
#define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1)
#define PCS_OFF_DISABLED ~0U
@ -54,6 +55,7 @@ struct pcs_pingroup {
struct pcs_func_vals {
void __iomem *reg;
unsigned val;
unsigned mask;
};
/**
@ -139,6 +141,7 @@ struct pcs_device {
unsigned fshift;
unsigned foff;
unsigned fmax;
bool bits_per_mux;
struct pcs_name *names;
struct pcs_data pins;
struct radix_tree_root pgtree;
@ -243,7 +246,15 @@ static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
struct seq_file *s,
unsigned offset)
{
seq_printf(s, " " DRIVER_NAME);
struct pcs_device *pcs;
unsigned val;
pcs = pinctrl_dev_get_drvdata(pctldev);
val = pcs->read(pcs->base + offset);
val &= pcs->fmask;
seq_printf(s, "%08x %s " , val, DRIVER_NAME);
}
static void pcs_dt_free_map(struct pinctrl_dev *pctldev,
@ -332,12 +343,17 @@ static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
for (i = 0; i < func->nvals; i++) {
struct pcs_func_vals *vals;
unsigned val;
unsigned val, mask;
vals = &func->vals[i];
val = pcs->read(vals->reg);
val &= ~pcs->fmask;
val |= vals->val;
if (!vals->mask)
mask = pcs->fmask;
else
mask = pcs->fmask & vals->mask;
val &= ~mask;
val |= (vals->val & mask);
pcs->write(val, vals->reg);
}
@ -657,18 +673,29 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
{
struct pcs_func_vals *vals;
const __be32 *mux;
int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
int size, params, rows, *pins, index = 0, found = 0, res = -ENOMEM;
struct pcs_function *function;
mux = of_get_property(np, PCS_MUX_NAME, &size);
if ((!mux) || (size < sizeof(*mux) * 2)) {
dev_err(pcs->dev, "bad data for mux %s\n",
np->name);
if (pcs->bits_per_mux) {
params = 3;
mux = of_get_property(np, PCS_MUX_BITS_NAME, &size);
} else {
params = 2;
mux = of_get_property(np, PCS_MUX_PINS_NAME, &size);
}
if (!mux) {
dev_err(pcs->dev, "no valid property for %s\n", np->name);
return -EINVAL;
}
if (size < (sizeof(*mux) * params)) {
dev_err(pcs->dev, "bad data for %s\n", np->name);
return -EINVAL;
}
size /= sizeof(*mux); /* Number of elements in array */
rows = size / 2; /* Each row is a key value pair */
rows = size / params;
vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
if (!vals)
@ -686,6 +713,10 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
val = be32_to_cpup(mux + index++);
vals[found].reg = pcs->base + offset;
vals[found].val = val;
if (params == 3) {
val = be32_to_cpup(mux + index++);
vals[found].mask = val;
}
pin = pcs_get_pin_by_offset(pcs, offset);
if (pin < 0) {
@ -883,6 +914,9 @@ static int __devinit pcs_probe(struct platform_device *pdev)
if (ret)
pcs->foff = PCS_OFF_DISABLED;
pcs->bits_per_mux = of_property_read_bool(np,
"pinctrl-single,bit-per-mux");
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(pcs->dev, "could not get resource\n");

23
drivers/pinctrl/pinctrl-sirf.c
View file

@ -25,6 +25,7 @@
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/of_gpio.h>
#include <asm/mach/irq.h>
#define DRIVER_NAME "pinmux-sirf"
@ -69,6 +70,10 @@ static DEFINE_SPINLOCK(sgpio_lock);
* refer to CS-131858-DC-6A.xls
*/
static const struct pinctrl_pin_desc sirfsoc_pads[] = {
PINCTRL_PIN(0, "gpio0-0"),
PINCTRL_PIN(1, "gpio0-1"),
PINCTRL_PIN(2, "gpio0-2"),
PINCTRL_PIN(3, "gpio0-3"),
PINCTRL_PIN(4, "pwm0"),
PINCTRL_PIN(5, "pwm1"),
PINCTRL_PIN(6, "pwm2"),
@ -77,7 +82,9 @@ static const struct pinctrl_pin_desc sirfsoc_pads[] = {
PINCTRL_PIN(9, "odo_0"),
PINCTRL_PIN(10, "odo_1"),
PINCTRL_PIN(11, "dr_dir"),
PINCTRL_PIN(12, "viprom_fa"),
PINCTRL_PIN(13, "scl_1"),
PINCTRL_PIN(14, "ntrst"),
PINCTRL_PIN(15, "sda_1"),
PINCTRL_PIN(16, "x_ldd[16]"),
PINCTRL_PIN(17, "x_ldd[17]"),
@ -1260,8 +1267,10 @@ static int __devinit sirfsoc_pinmux_probe(struct platform_device *pdev)
goto out_no_pmx;
}
for (i = 0; i < ARRAY_SIZE(sirfsoc_gpio_ranges); i++)
for (i = 0; i < ARRAY_SIZE(sirfsoc_gpio_ranges); i++) {
sirfsoc_gpio_ranges[i].gc = &sgpio_bank[i].chip.gc;
pinctrl_add_gpio_range(spmx->pmx, &sirfsoc_gpio_ranges[i]);
}
dev_info(&pdev->dev, "initialized SIRFSOC pinmux driver\n");
@ -1475,6 +1484,9 @@ static void sirfsoc_gpio_handle_irq(unsigned int irq, struct irq_desc *desc)
u32 status, ctrl;
int idx = 0;
unsigned int first_irq;
struct irq_chip *chip = irq_get_chip(irq);
chained_irq_enter(chip, desc);
status = readl(bank->chip.regs + SIRFSOC_GPIO_INT_STATUS(bank->id));
if (!status) {
@ -1503,20 +1515,17 @@ static void sirfsoc_gpio_handle_irq(unsigned int irq, struct irq_desc *desc)
idx++;
status = status >> 1;
}
chained_irq_exit(chip, desc);
}
static inline void sirfsoc_gpio_set_input(struct sirfsoc_gpio_bank *bank, unsigned ctrl_offset)
{
u32 val;
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
val = readl(bank->chip.regs + ctrl_offset);
val &= ~SIRFSOC_GPIO_CTL_OUT_EN_MASK;
writel(val, bank->chip.regs + ctrl_offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset)
@ -1726,6 +1735,8 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np)
irq_set_handler_data(bank->parent_irq, bank);
}
return 0;
out:
iounmap(regs);
return err;

5
drivers/pinctrl/pinmux.c
View file

@ -232,14 +232,11 @@ int pinmux_request_gpio(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
unsigned pin, unsigned gpio)
{
char gpiostr[16];
const char *owner;
int ret;
/* Conjure some name stating what chip and pin this is taken by */
snprintf(gpiostr, 15, "%s:%d", range->name, gpio);
owner = kstrdup(gpiostr, GFP_KERNEL);
owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio);
if (!owner)
return -EINVAL;