diff --git a/qcom/holi.dtsi b/qcom/holi.dtsi index 8341ad465c55..61b576e64edb 100644 --- a/qcom/holi.dtsi +++ b/qcom/holi.dtsi @@ -2799,6 +2799,10 @@ non-removable; supports-cqe; + no-sd; + no-sdio; + max-frequency = <192000000>; + qcom,devfreq,freq-table = <50000000 200000000>; qcom,scaling-lower-bus-speed-mode = "DDR52"; @@ -2863,6 +2867,10 @@ iommus = <&apps_smmu 0x40 0x0>; qcom,iommu-dma = "bypass"; + no-mmc; + no-sdio; + max-frequency = <202000000>; + qcom,devfreq,freq-table = <50000000 202000000>; status = "disabled"; diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index 25926f595614..edb825bdb16e 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -3238,6 +3238,10 @@ <&clock_gcc GCC_SDCC2_APPS_CLK>; clock-names = "iface", "core"; + no-mmc; + no-sdio; + max-frequency = <202000000>; + /* DLL HSR settings. Refer go/hsr - DLL settings */ qcom,dll-hsr-list = <0x0007642C 0xA800 0x10 0x2C010800 0x80040868>; diff --git a/qcom/sdxlemur-cdp.dtsi b/qcom/sdxlemur-cdp.dtsi index 4f802df82626..92c6a574449f 100644 --- a/qcom/sdxlemur-cdp.dtsi +++ b/qcom/sdxlemur-cdp.dtsi @@ -25,6 +25,10 @@ pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; + no-mmc; + no-sdio; + max-frequency = <200000000>; + cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; }; diff --git a/qcom/sdxlemur-mtp-mbb-emmc.dtsi b/qcom/sdxlemur-mtp-mbb-emmc.dtsi index 7d4753791231..edaae4eaeac5 100644 --- a/qcom/sdxlemur-mtp-mbb-emmc.dtsi +++ b/qcom/sdxlemur-mtp-mbb-emmc.dtsi @@ -14,6 +14,10 @@ bus-width = <8>; non-removable; + no-sd; + no-sdio; + max-frequency = <192000000>; + vdd-supply = <&vreg_sd_vdd>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <0 570000>; diff --git a/qcom/sdxlemur-mtp.dtsi b/qcom/sdxlemur-mtp.dtsi index 586d9c3fe0dd..ef9a62296e68 100644 --- a/qcom/sdxlemur-mtp.dtsi +++ b/qcom/sdxlemur-mtp.dtsi @@ -24,6 +24,10 @@ pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; + no-mmc; + no-sdio; + max-frequency = <200000000>; + cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; }; diff --git a/qcom/sdxlemur-rcm-pcie-ep.dtsi b/qcom/sdxlemur-rcm-pcie-ep.dtsi index e61e86ac8459..1ac4e8231be4 100644 --- a/qcom/sdxlemur-rcm-pcie-ep.dtsi +++ b/qcom/sdxlemur-rcm-pcie-ep.dtsi @@ -23,5 +23,9 @@ pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; + no-mmc; + no-sdio; + max-frequency = <200000000>; + cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; }; diff --git a/qcom/sdxlemur-rcm-rc.dtsi b/qcom/sdxlemur-rcm-rc.dtsi index aab84f4ef1c2..ba8bed5220c2 100644 --- a/qcom/sdxlemur-rcm-rc.dtsi +++ b/qcom/sdxlemur-rcm-rc.dtsi @@ -51,6 +51,10 @@ pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; + no-mmc; + no-sdio; + max-frequency = <200000000>; + cd-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>; }; diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi index 5ddd3ae5c358..223fb2320b8c 100644 --- a/qcom/shima.dtsi +++ b/qcom/shima.dtsi @@ -1821,6 +1821,10 @@ non-removable; supports-cqe; + no-sd; + no-sdio; + max-frequency = <192000000>; + qcom,devfreq,freq-table = <50000000 200000000>; qcom,scaling-lower-bus-speed-mode = "DDR52"; @@ -1886,6 +1890,10 @@ /* DLL HSR settings. Refer go/hsr - DLL settings */ qcom,dll-hsr-list = <0x0007642c 0x0 0x10 0x2C010800 0x80040868>; + no-mmc; + no-sdio; + max-frequency = <202000000>; + qcom,devfreq,freq-table = <50000000 202000000>; status = "disabled"; diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi index df4341dc8f48..e78d8ec554c2 100644 --- a/qcom/yupik.dtsi +++ b/qcom/yupik.dtsi @@ -2728,6 +2728,10 @@ non-removable; supports-cqe; + no-sd; + no-sdio; + max-frequency = <192000000>; + qcom,devfreq,freq-table = <50000000 200000000>; qcom,scaling-lower-bus-speed-mode = "DDR52"; @@ -2795,6 +2799,10 @@ qcom,devfreq,freq-table = <50000000 202000000>; + no-mmc; + no-sdio; + max-frequency = <202000000>; + status = "disabled"; qos0 {