mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for MIPS for 4.7. Here's the summary of
the changes:
- ATH79: Support for DTB passuing using the UHI boot protocol
- ATH79: Remove support for builtin DTB.
- ATH79: Add zboot debug serial support.
- ATH79: Add initial support for Dragino MS14 (Dragine 2), Onion Omega
and DPT-Module.
- ATH79: Update devicetree clock support for AR9132 and AR9331.
- ATH79: Cleanup the DT code.
- ATH79: Support newer SOCs in ath79_ddr_ctrl_init.
- ATH79: Fix regression in PCI window initialization.
- BCM47xx: Move SPROM driver to drivers/firmware/
- BCM63xx: Enable partition parser in defconfig.
- BMIPS: BMIPS5000 has I cache filing from D cache
- BMIPS: BMIPS: Add cpu-feature-overrides.h
- BMIPS: Add Whirlwind support
- BMIPS: Adjust mips-hpt-frequency for BCM7435
- BMIPS: Remove maxcpus from BCM97435SVMB DTS
- BMIPS: Add missing 7038 L1 register cells to BCM7435
- BMIPS: Various tweaks to initialization code.
- BMIPS: Enable partition parser in defconfig.
- BMIPS: Cache tweaks.
- BMIPS: Add UART, I2C and SATA devices to DT.
- BMIPS: Add BCM6358 and BCM63268support
- BMIPS: Add device tree example for BCM6358.
- BMIPS: Improve Improve BCM6328 and BCM6368 device trees
- Lantiq: Add support for device tree file from boot loader
- Lantiq: Allow build with no built-in DT.
- Loongson 3: Reserve 32MB for RS780E integrated GPU.
- Loongson 3: Fix build error after ld-version.sh modification
- Loongson 3: Move chipset ACPI code from drivers to arch.
- Loongson 3: Speedup irq processing.
- Loongson 3: Add basic Loongson 3A support.
- Loongson 3: Set cache flush handlers to nop.
- Loongson 3: Invalidate special TLBs when needed.
- Loongson 3: Fast TLB refill handler.
- MT7620: Fallback strategy for invalid syscfg0.
- Netlogic: Fix CP0_EBASE redefinition warnings
- Octeon: Initialization fixes
- Octeon: Add DTS files for the D-Link DSR-1000N and EdgeRouter Lite
- Octeon: Enable add Octeon-drivers in cavium_octeon_defconfig
- Octeon: Correctly handle endian-swapped initramfs images.
- Octeon: Support CN73xx, CN75xx and CN78xx.
- Octeon: Remove dead code from cvmx-sysinfo.
- Octeon: Extend number of supported CPUs past 32.
- Octeon: Remove some code limiting NR_IRQS to 255.
- Octeon: Simplify octeon_irq_ciu_gpio_set_type.
- Octeon: Mark some functions __init in smp.c
- Octeon: Octeon: Add Octeon III CN7xxx interface detection
- PIC32: Add serial driver and bindings for it.
- PIC32: Add PIC32 deadman timer driver and bindings.
- PIC32: Add PIC32 clock timer driver and bindings.
- Pistachio: Determine SoC revision during boot
- Sibyte: Fix Kconfig dependencies of SIBYTE_BUS_WATCHER.
- Sibyte: Strip redundant comments from bcm1480_regs.h.
- Panic immediately if panic_on_oops is set.
- module: fix incorrect IS_ERR_VALUE macro usage.
- module: Make consistent use of pr_*
- Remove no longer needed work_on_cpu() call.
- Remove CONFIG_IPV6_PRIVACY from defconfigs.
- Fix registers of non-crashing CPUs in dumps.
- Handle MIPSisms in new vmcore_elf32_check_arch.
- Select CONFIG_HANDLE_DOMAIN_IRQ and make it work.
- Allow RIXI to be used on non-R2 or R6 cores.
- Reserve nosave data for hibernation
- Fix siginfo.h to use strict POSIX types.
- Don't unwind user mode with EVA.
- Fix watchpoint restoration
- Ptrace watchpoints for R6.
- Sync icache when it fills from dcache
- I6400 I-cache fills from dcache.
- Various MSA fixes.
- Cleanup MIPS_CPU_* definitions.
- Signal: Move generic copy_siginfo to signal.h
- Signal: Fix uapi include in exported asm/siginfo.h
- Timer fixes for sake of KVM.
- XPA TLB refill fixes.
- Treat perf counter feature
- Update John Crispin's email address
- Add PIC32 watchdog and bindings.
- Handle R10000 LL/SC bug in set_pte()
- cpufreq: Various fixes for Longson1.
- R6: Fix R2 emulation.
- mathemu: Cosmetic fix to ADDIUPC emulation, plenty of other small fixes
- ELF: ABI and FP fixes.
- Allow for relocatable kernel and use that to support KASLR.
- Fix CPC_BASE_ADDR mask
- Plenty fo smp-cps, CM, R6 and M6250 fixes.
- Make reset_control_ops const.
- Fix kernel command line handling of leading whitespace.
- Cleanups to cache handling.
- Add brcm, bcm6345-l1-intc device tree bindings.
- Use generic clkdev.h header
- Remove CLK_IS_ROOT usage.
- Misc small cleanups.
- CM: Fix compilation error when !MIPS_CM
- oprofile: Fix a preemption issue
- Detect DSP ASE v3 support:1"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (275 commits)
MIPS: pic32mzda: fix getting timer clock rate.
MIPS: ath79: fix regression in PCI window initialization
MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer SoCs
MIPS: Fix VZ probe gas errors with binutils <2.24
MIPS: perf: Fix I6400 event numbers
MIPS: DEC: Export `ioasic_ssr_lock' to modules
MIPS: MSA: Fix a link error on `_init_msa_upper' with older GCC
MIPS: CM: Fix compilation error when !MIPS_CM
MIPS: Fix genvdso error on rebuild
USB: ohci-jz4740: Remove obsolete driver
MIPS: JZ4740: Probe OHCI platform device via DT
MIPS: JZ4740: Qi LB60: Remove support for AVT2 variant
MIPS: pistachio: Determine SoC revision during boot
MIPS: BMIPS: Adjust mips-hpt-frequency for BCM7435
mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type
MIPS: Prevent "restoration" of MSA context in non-MSA kernels
MIPS: cevt-r4k: Dynamically calculate min_delta_ns
MIPS: malta-time: Take seconds into account
MIPS: malta-time: Start GIC count before syncing to RTC
MIPS: Force CPUs to lose FP context during mode switches
...
This commit is contained in:
commit
07b75260eb
358 changed files with 14005 additions and 3399 deletions
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@ -30,6 +30,10 @@
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#include <asm/signal.h>
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#endif
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#ifdef CONFIG_MIPS
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#include <asm/traps.h>
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#endif
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#define ARB_ERR_CAP_CLEAR (1 << 0)
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#define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12)
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#define ARB_ERR_CAP_STATUS_TEA (1 << 11)
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@ -238,6 +242,29 @@ static int brcmstb_bus_error_handler(unsigned long addr, unsigned int fsr,
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}
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#endif
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#ifdef CONFIG_MIPS
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static int brcmstb_bus_error_handler(struct pt_regs *regs, int is_fixup)
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{
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int ret = 0;
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struct brcmstb_gisb_arb_device *gdev;
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u32 cap_status;
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list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) {
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cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS);
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/* Invalid captured address, bail out */
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if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) {
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is_fixup = 1;
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goto out;
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}
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ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error");
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}
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out:
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return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
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}
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#endif
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static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id)
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{
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brcmstb_gisb_arb_decode_addr(dev_id, "timeout");
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@ -355,6 +382,9 @@ static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev)
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hook_fault_code(22, brcmstb_bus_error_handler, SIGBUS, 0,
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"imprecise external abort");
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#endif
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#ifdef CONFIG_MIPS
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board_be_handler = brcmstb_bus_error_handler;
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#endif
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dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n",
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gdev->base, timeout_irq, tea_irq);
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@ -599,8 +599,8 @@ BUILD_PERDEV_HELPER(cpu_up) /* int mips_cdmm_cpu_up_helper(...) */
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* mips_cdmm_bus_down() - Tear down the CDMM bus.
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* @data: Pointer to unsigned int CPU number.
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*
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* This work_on_cpu callback function is executed on a given CPU to call the
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* CDMM driver cpu_down callback for all devices on that CPU.
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* This function is executed on the hotplugged CPU and calls the CDMM
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* driver cpu_down callback for all devices on that CPU.
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*/
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static long mips_cdmm_bus_down(void *data)
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{
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@ -630,7 +630,9 @@ static long mips_cdmm_bus_down(void *data)
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* CDMM devices on that CPU, or to call the CDMM driver cpu_up callback for all
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* devices already discovered on that CPU.
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*
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* It is used during initialisation and when CPUs are brought online.
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* It is used as work_on_cpu callback function during
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* initialisation. When CPUs are brought online the function is
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* invoked directly on the hotplugged CPU.
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*/
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static long mips_cdmm_bus_up(void *data)
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{
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@ -677,10 +679,10 @@ static int mips_cdmm_cpu_notify(struct notifier_block *nb,
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switch (action & ~CPU_TASKS_FROZEN) {
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case CPU_ONLINE:
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case CPU_DOWN_FAILED:
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work_on_cpu(cpu, mips_cdmm_bus_up, &cpu);
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mips_cdmm_bus_up(&cpu);
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break;
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case CPU_DOWN_PREPARE:
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work_on_cpu(cpu, mips_cdmm_bus_down, &cpu);
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mips_cdmm_bus_down(&cpu);
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break;
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default:
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return NOTIFY_DONE;
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