From 7823a9b79a3429f5029f88568642aa218a65bed6 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Wed, 24 Jun 2020 14:16:41 +0530 Subject: [PATCH] cpufreq: qcom: cpufreq-hw: Remove enable of GT_IRQ for EPSS CPUFREQ SW does not require to enable the IRQ for EPSS, thus remove the enable. Change-Id: Ib1c10d755355c6f4df46a62568d2895e291e846a Signed-off-by: Taniya Das --- drivers/cpufreq/qcom-cpufreq-hw.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index eee9ab549d6d..2585e0bc3c93 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -316,8 +316,12 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) return ret; } + ret = irq_set_affinity_hint(c->dcvsh_irq, &c->related_cpus); + if (ret) + dev_err(cpu_dev, "Failed to set affinity for irq %d\n", + c->dcvsh_irq); + c->is_irq_requested = true; - writel_relaxed(GT_IRQ_STATUS, c->base + offsets[REG_INTR_EN]); writel_relaxed(0x0, c->base + offsets[REG_INTR_CLR]); c->is_irq_enabled = true; c->freq_limit_attr.attr.name = "dcvsh_freq_limit";