From 080a6e25a36bd975a17fa51d39e73d9942d80fe5 Mon Sep 17 00:00:00 2001 From: Ajay Agarwal Date: Wed, 5 Jan 2022 12:38:49 +0530 Subject: [PATCH] usb: dwc3: Disable USB2 internal retry for USB3.1 cores v1.70a and above STAR 9001346572 affects dwc_usb3.1 versions 1.70a and above. Disable USB2 internal retry for the same. Change-Id: Id476220130518c0fd740d9be5d6db1e712529112 Signed-off-by: Ajay Agarwal Signed-off-by: Udipto Goswami --- drivers/usb/dwc3/core.c | 18 +++++++++++++++++- drivers/usb/dwc3/core.h | 1 + 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 3e4738bbe488..1d063c35b5fe 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1157,11 +1157,27 @@ int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC31_LCSR_TX_DEEMPH_3(0), dwc->gen2_tx_de_emph3 & DWC31_TX_DEEMPH_MASK); - /* set inter-packet gap 199.794ns to improve EL_23 margin */ + /* + * Set inter-packet gap 199.794ns to improve EL_23 margin. + * + * STAR 9001346572: Host: When a Single USB 2.0 Endpoint Receives NAKs Continuously, Host + * Stops Transfers to Other Endpoints. When an active endpoint that is not currently cached + * in the host controller is chosen to be cached to the same cache index as the endpoint + * that receives NAK, The endpoint that receives the NAK responses would be in continuous + * retry mode that would prevent it from getting evicted out of the host controller cache. + * This would prevent the new endpoint to get into the endpoint cache and therefore service + * to this endpoint is not done. + * The workaround is to disable lower layer LSP retrying the USB2.0 NAKed transfer. Forcing + * this to LSP upper layer allows next EP to evict the stuck EP from cache. + */ if (dwc->revision >= DWC3_USB31_REVISION_170A) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); reg |= DWC3_GUCTL1_IP_GAP_ADD_ON(1); dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); + + reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); + reg |= DWC3_GUCTL3_USB20_RETRY_DISABLE; + dwc3_writel(dwc->regs, DWC3_GUCTL3, reg); } return 0; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 3bd15568f1ab..a796ed1bbe91 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -413,6 +413,7 @@ #define DWC3_GUCTL2_RST_ACTBITLATER BIT(14) /* Global User Control Register 3 */ +#define DWC3_GUCTL3_USB20_RETRY_DISABLE BIT(16) #define DWC3_GUCTL3_SPLITDISABLE BIT(14) /* Device Configuration Register */