From 8b7b774dcc78143ababd93fe76b3dd29c815057e Mon Sep 17 00:00:00 2001 From: Ashish Bhimanpalliwar Date: Mon, 21 Feb 2022 12:05:02 +0530 Subject: [PATCH 01/18] ARM: dts: qcom: Add apq variant device tree support to Blair Add APQ variant device trees support for Blair. Change-Id: I10f716f061970b66570fbff6071632c8787954fb --- bindings/arm/msm/msm.txt | 7 ++++ qcom/Makefile | 25 +++++++++++++-- qcom/blairp-atp-overlay.dts | 44 +++++++++++++++++++++++++ qcom/blairp-atp.dts | 10 ++++++ qcom/blairp-atp.dtsi | 1 + qcom/blairp-cdp-overlay.dts | 16 ++++++++++ qcom/blairp-cdp.dts | 10 ++++++ qcom/blairp-cdp.dtsi | 1 + qcom/blairp-mtp-nopmi-overlay.dts | 14 ++++++++ qcom/blairp-mtp-nopmi.dts | 13 ++++++++ qcom/blairp-mtp-nopmi.dtsi | 2 ++ qcom/blairp-mtp-overlay.dts | 18 +++++++++++ qcom/blairp-mtp-usbc-overlay.dts | 53 +++++++++++++++++++++++++++++++ qcom/blairp-mtp-usbc.dts | 15 +++++++++ qcom/blairp-mtp-usbc.dtsi | 1 + qcom/blairp-mtp.dts | 17 ++++++++++ qcom/blairp-mtp.dtsi | 1 + qcom/blairp-qrd-nopmi-overlay.dts | 14 ++++++++ qcom/blairp-qrd-nopmi.dts | 13 ++++++++ qcom/blairp-qrd-nopmi.dtsi | 2 ++ qcom/blairp-qrd-overlay.dts | 18 +++++++++++ qcom/blairp-qrd.dts | 17 ++++++++++ qcom/blairp-qrd.dtsi | 1 + qcom/blairp.dts | 9 ++++++ qcom/blairp.dtsi | 9 ++++++ 25 files changed, 329 insertions(+), 2 deletions(-) create mode 100644 qcom/blairp-atp-overlay.dts create mode 100644 qcom/blairp-atp.dts create mode 100644 qcom/blairp-atp.dtsi create mode 100644 qcom/blairp-cdp-overlay.dts create mode 100644 qcom/blairp-cdp.dts create mode 100644 qcom/blairp-cdp.dtsi create mode 100644 qcom/blairp-mtp-nopmi-overlay.dts create mode 100644 qcom/blairp-mtp-nopmi.dts create mode 100644 qcom/blairp-mtp-nopmi.dtsi create mode 100644 qcom/blairp-mtp-overlay.dts create mode 100644 qcom/blairp-mtp-usbc-overlay.dts create mode 100644 qcom/blairp-mtp-usbc.dts create mode 100644 qcom/blairp-mtp-usbc.dtsi create mode 100644 qcom/blairp-mtp.dts create mode 100644 qcom/blairp-mtp.dtsi create mode 100644 qcom/blairp-qrd-nopmi-overlay.dts create mode 100644 qcom/blairp-qrd-nopmi.dts create mode 100644 qcom/blairp-qrd-nopmi.dtsi create mode 100644 qcom/blairp-qrd-overlay.dts create mode 100644 qcom/blairp-qrd.dts create mode 100644 qcom/blairp-qrd.dtsi create mode 100644 qcom/blairp.dts create mode 100644 qcom/blairp.dtsi diff --git a/bindings/arm/msm/msm.txt b/bindings/arm/msm/msm.txt index 013f38e3fe76..0cca021ae5f2 100644 --- a/bindings/arm/msm/msm.txt +++ b/bindings/arm/msm/msm.txt @@ -104,6 +104,9 @@ SoCs: - BLAIR compatible = "qcom,blair" +- BLAIRP + compatible = "qcom,blairp" + - MONACO compatible = "qcom,monaco" @@ -300,6 +303,10 @@ compatible = "qcom,blair-mtp" compatible = "qcom,blair-cdp" compatible = "qcom,blair-atp" compatible = "qcom,blair-qrd" +compatible = "qcom,blairp-mtp" +compatible = "qcom,blairp-cdp" +compatible = "qcom,blairp-atp" +compatible = "qcom,blairp-qrd" compatible = "qcom,scuba-idp" compatible = "qcom,monaco-rumi" compatible = "qcom,monaco" diff --git a/qcom/Makefile b/qcom/Makefile index cfe040cf7742..694208016e3c 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -150,7 +150,14 @@ dtbo-$(CONFIG_ARCH_BLAIR) += blair-rumi-overlay.dtbo \ blair-qrd-overlay.dtbo \ blair-mtp-usbc-overlay.dtbo \ blair-mtp-nopmi-overlay.dtbo \ - blair-qrd-nopmi-overlay.dtbo + blair-qrd-nopmi-overlay.dtbo \ + blairp-mtp-overlay.dtbo \ + blairp-cdp-overlay.dtbo \ + blairp-atp-overlay.dtbo \ + blairp-qrd-overlay.dtbo \ + blairp-mtp-usbc-overlay.dtbo \ + blairp-mtp-nopmi-overlay.dtbo \ + blairp-qrd-nopmi-overlay.dtbo blair-rumi-overlay.dtbo-base := blair.dtb blair-mtp-overlay.dtbo-base := blair.dtb @@ -160,6 +167,13 @@ blair-qrd-overlay.dtbo-base := blair.dtb blair-mtp-usbc-overlay.dtbo-base := blair.dtb blair-mtp-nopmi-overlay.dtbo-base := blair.dtb blair-qrd-nopmi-overlay.dtbo-base := blair.dtb +blairp-mtp-overlay.dtbo-base := blairp.dtb +blairp-cdp-overlay.dtbo-base := blairp.dtb +blairp-atp-overlay.dtbo-base := blairp.dtb +blairp-qrd-overlay.dtbo-base := blairp.dtb +blairp-mtp-usbc-overlay.dtbo-base := blairp.dtb +blairp-mtp-nopmi-overlay.dtbo-base := blairp.dtb +blairp-qrd-nopmi-overlay.dtbo-base := blairp.dtb else dtb-$(CONFIG_ARCH_BLAIR) += blair-rumi.dtb \ blair-mtp.dtb \ @@ -168,7 +182,14 @@ dtb-$(CONFIG_ARCH_BLAIR) += blair-rumi.dtb \ blair-qrd.dtb \ blair-mtp-usbc.dtb \ blair-mtp-nopmi.dtb \ - blair-qrd-nopmi.dtb + blair-qrd-nopmi.dtb \ + blairp-mtp.dtb \ + blairp-cdp.dtb \ + blairp-atp.dtb \ + blairp-qrd.dtb \ + blairp-mtp-usbc.dtb \ + blairp-mtp-nopmi.dtb \ + blairp-qrd-nopmi.dtb endif ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) diff --git a/qcom/blairp-atp-overlay.dts b/qcom/blairp-atp-overlay.dts new file mode 100644 index 000000000000..bb7b8787bdd3 --- /dev/null +++ b/qcom/blairp-atp-overlay.dts @@ -0,0 +1,44 @@ +/dts-v1/; +/plugin/; + +#include "blairp-atp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp ATP"; + compatible = "qcom,blairp-atp", "qcom,blairp", "qcom,atp"; + qcom,msm-id = <565 0x10000>; + qcom,board-id = <33 0>; +}; + +&wsa881x_i2c_e { + status = "disabled"; +}; + +&wsa881x_i2c_44 { + status = "disabled"; +}; + +&wcd937x_tx_slave { + status = "disabled"; +}; + +&wcd937x_rx_slave { + status = "disabled"; +}; + +&wcd937x_codec { + status = "disabled"; +}; + +&holi_snd { + qcom,wcd-disabled = <1>; + qcom,audio-routing = + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK"; +}; diff --git a/qcom/blairp-atp.dts b/qcom/blairp-atp.dts new file mode 100644 index 000000000000..f428a1ce4008 --- /dev/null +++ b/qcom/blairp-atp.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "blairp.dtsi" +#include "blairp-atp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp ATP"; + compatible = "qcom,blairp-atp", "qcom,blairp", "qcom,atp"; + qcom,board-id = <33 0>; +}; diff --git a/qcom/blairp-atp.dtsi b/qcom/blairp-atp.dtsi new file mode 100644 index 000000000000..0655e61bdc13 --- /dev/null +++ b/qcom/blairp-atp.dtsi @@ -0,0 +1 @@ +#include "blair-atp.dtsi" diff --git a/qcom/blairp-cdp-overlay.dts b/qcom/blairp-cdp-overlay.dts new file mode 100644 index 000000000000..02704e07a2a9 --- /dev/null +++ b/qcom/blairp-cdp-overlay.dts @@ -0,0 +1,16 @@ +/dts-v1/; +/plugin/; + +#include "blairp-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp CDP"; + compatible = "qcom,blairp-cdp", "qcom,blairp", "qcom,cdp"; + qcom,msm-id = <565 0x10000>; + qcom,board-id = <1 0>; +}; + +&wsa881x_analog_reset_gpio { + pinctrl-0 = <&spkr_1_sd_n_active>; + pinctrl-1 = <&spkr_1_sd_n_sleep>; +}; diff --git a/qcom/blairp-cdp.dts b/qcom/blairp-cdp.dts new file mode 100644 index 000000000000..0b6e0547abf3 --- /dev/null +++ b/qcom/blairp-cdp.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "blairp.dtsi" +#include "blairp-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp CDP"; + compatible = "qcom,blairp-cdp", "qcom,blairp", "qcom,cdp"; + qcom,board-id = <1 0>; +}; diff --git a/qcom/blairp-cdp.dtsi b/qcom/blairp-cdp.dtsi new file mode 100644 index 000000000000..048e3c5d9dd1 --- /dev/null +++ b/qcom/blairp-cdp.dtsi @@ -0,0 +1 @@ +#include "blair-cdp.dtsi" diff --git a/qcom/blairp-mtp-nopmi-overlay.dts b/qcom/blairp-mtp-nopmi-overlay.dts new file mode 100644 index 000000000000..58003066810b --- /dev/null +++ b/qcom/blairp-mtp-nopmi-overlay.dts @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +#include "blairp-mtp-nopmi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp MTP NOPMI"; + compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; + qcom,msm-id = <565 0x10000>; + qcom,board-id = <8 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x0 0x0>; +}; + diff --git a/qcom/blairp-mtp-nopmi.dts b/qcom/blairp-mtp-nopmi.dts new file mode 100644 index 000000000000..4f1cee09132a --- /dev/null +++ b/qcom/blairp-mtp-nopmi.dts @@ -0,0 +1,13 @@ +/dts-v1/; + +#include "blairp.dtsi" +#include "blairp-mtp-nopmi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp MTP NOPMI"; + compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; + qcom,board-id = <8 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x0 0x0>; +}; + diff --git a/qcom/blairp-mtp-nopmi.dtsi b/qcom/blairp-mtp-nopmi.dtsi new file mode 100644 index 000000000000..684585a2fa27 --- /dev/null +++ b/qcom/blairp-mtp-nopmi.dtsi @@ -0,0 +1,2 @@ +#include "blair-mtp-nopmi.dtsi" + diff --git a/qcom/blairp-mtp-overlay.dts b/qcom/blairp-mtp-overlay.dts new file mode 100644 index 000000000000..37651c24ece1 --- /dev/null +++ b/qcom/blairp-mtp-overlay.dts @@ -0,0 +1,18 @@ +/dts-v1/; +/plugin/; + +#include "blairp-mtp.dtsi" +#include "holi-mtp-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp MTP"; + compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; + qcom,msm-id = <565 0x10000>; + qcom,board-id = <8 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; +}; diff --git a/qcom/blairp-mtp-usbc-overlay.dts b/qcom/blairp-mtp-usbc-overlay.dts new file mode 100644 index 000000000000..8df452b841c0 --- /dev/null +++ b/qcom/blairp-mtp-usbc-overlay.dts @@ -0,0 +1,53 @@ +/dts-v1/; +/plugin/; + +#include "blairp-mtp-usbc.dtsi" +#include "holi-mtp-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp MTP USBC audio"; + compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; + qcom,msm-id = <565 0x10000>; + qcom,board-id = <8 1>; +}; + +&swr0 { + qcom,is_wcd937x = <0>; +}; + +&wcd937x_tx_slave { + status = "disabled"; +}; + +&wcd937x_rx_slave { + status = "disabled"; +}; + +&wcd937x_codec { + status = "disabled"; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; +}; + +&wcd938x_tx_slave { + status = "ok"; +}; + +&wcd938x_rx_slave { + status = "ok"; +}; + +&wcd938x_codec { + status = "ok"; +}; + +&holi_snd { + asoc-codec = <&stub_codec>, <&bolero>, + <&wcd938x_codec>, <&wsa881x_i2c_e>, + <&wsa881x_i2c_f>; + asoc-codec-names = "msm-stub-codec.1", "bolero_codec", + "wcd938x_codec", "wsa-codec0", + "wsa-codec1"; +}; diff --git a/qcom/blairp-mtp-usbc.dts b/qcom/blairp-mtp-usbc.dts new file mode 100644 index 000000000000..4590d8e52055 --- /dev/null +++ b/qcom/blairp-mtp-usbc.dts @@ -0,0 +1,15 @@ +/dts-v1/; + +#include "blairp.dtsi" +#include "blairp-mtp-usbc.dtsi" +#include "holi-mtp-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. BLAIRP MTP USBC audio"; + compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; + qcom,board-id = <8 1>; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; +}; diff --git a/qcom/blairp-mtp-usbc.dtsi b/qcom/blairp-mtp-usbc.dtsi new file mode 100644 index 000000000000..b90e9b1c0b19 --- /dev/null +++ b/qcom/blairp-mtp-usbc.dtsi @@ -0,0 +1 @@ +#include "blair-mtp-usbc.dtsi" diff --git a/qcom/blairp-mtp.dts b/qcom/blairp-mtp.dts new file mode 100644 index 000000000000..305dbd64a19e --- /dev/null +++ b/qcom/blairp-mtp.dts @@ -0,0 +1,17 @@ +/dts-v1/; + +#include "blairp.dtsi" +#include "blairp-mtp.dtsi" +#include "holi-mtp-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp MTP"; + compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; + qcom,board-id = <8 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; +}; diff --git a/qcom/blairp-mtp.dtsi b/qcom/blairp-mtp.dtsi new file mode 100644 index 000000000000..b8622d186cf9 --- /dev/null +++ b/qcom/blairp-mtp.dtsi @@ -0,0 +1 @@ +#include "blair-mtp.dtsi" diff --git a/qcom/blairp-qrd-nopmi-overlay.dts b/qcom/blairp-qrd-nopmi-overlay.dts new file mode 100644 index 000000000000..d3a8ca2f0c0b --- /dev/null +++ b/qcom/blairp-qrd-nopmi-overlay.dts @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +#include "blairp-qrd-nopmi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp QRD NOPMI"; + compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd"; + qcom,msm-id = <565 0x10000>; + qcom,board-id = <0x1000B 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x0 0x0>; +}; + diff --git a/qcom/blairp-qrd-nopmi.dts b/qcom/blairp-qrd-nopmi.dts new file mode 100644 index 000000000000..64cac8f5ccf5 --- /dev/null +++ b/qcom/blairp-qrd-nopmi.dts @@ -0,0 +1,13 @@ +/dts-v1/; + +#include "blairp.dtsi" +#include "blairp-qrd-nopmi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp QRD NOPMI"; + compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd"; + qcom,board-id = <0x1000B 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x0 0x0>; +}; + diff --git a/qcom/blairp-qrd-nopmi.dtsi b/qcom/blairp-qrd-nopmi.dtsi new file mode 100644 index 000000000000..c1ab5e75c7fb --- /dev/null +++ b/qcom/blairp-qrd-nopmi.dtsi @@ -0,0 +1,2 @@ +#include "blair-qrd-nopmi.dtsi" + diff --git a/qcom/blairp-qrd-overlay.dts b/qcom/blairp-qrd-overlay.dts new file mode 100644 index 000000000000..40c9baef8462 --- /dev/null +++ b/qcom/blairp-qrd-overlay.dts @@ -0,0 +1,18 @@ +/dts-v1/; +/plugin/; + +#include "blairp-qrd.dtsi" +#include "holi-qrd-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp QRD"; + compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd"; + qcom,msm-id = <565 0x10000>; + qcom,board-id = <0x1000B 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; +}; diff --git a/qcom/blairp-qrd.dts b/qcom/blairp-qrd.dts new file mode 100644 index 000000000000..7f4730b19a02 --- /dev/null +++ b/qcom/blairp-qrd.dts @@ -0,0 +1,17 @@ +/dts-v1/; + +#include "blairp.dtsi" +#include "blairp-qrd.dtsi" +#include "holi-qrd-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp QRD"; + compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd"; + qcom,board-id = <0x1000B 0>; + qcom,pmic-id-size = <4>; + qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; +}; diff --git a/qcom/blairp-qrd.dtsi b/qcom/blairp-qrd.dtsi new file mode 100644 index 000000000000..b35b4131b743 --- /dev/null +++ b/qcom/blairp-qrd.dtsi @@ -0,0 +1 @@ +#include "blair-qrd.dtsi" diff --git a/qcom/blairp.dts b/qcom/blairp.dts new file mode 100644 index 000000000000..0377d012c7c4 --- /dev/null +++ b/qcom/blairp.dts @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "blairp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp SoC"; + compatible = "qcom,blairp"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/blairp.dtsi b/qcom/blairp.dtsi new file mode 100644 index 000000000000..ebdbccee7d06 --- /dev/null +++ b/qcom/blairp.dtsi @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "blair.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Blairp SoC"; + compatible = "qcom,blairp"; + qcom,msm-id = <565 0x10000>; +}; From 0c31b0acb95e1e4b9e964b01f5be4b1125d636d5 Mon Sep 17 00:00:00 2001 From: Jagadeesh Ponduru Date: Fri, 25 Feb 2022 18:21:54 +0530 Subject: [PATCH 02/18] ARM: dts: msm: disable IPA entry for blair APQ targets Change to disable IPA through dtsi file for blairp target. Change-Id: I0a081cfeb3ecd1522415e4031bae2d55d5d2ec38 --- qcom/blairp.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/qcom/blairp.dtsi b/qcom/blairp.dtsi index ebdbccee7d06..c446a1e4d67d 100644 --- a/qcom/blairp.dtsi +++ b/qcom/blairp.dtsi @@ -7,3 +7,22 @@ compatible = "qcom,blairp"; qcom,msm-id = <565 0x10000>; }; + +&soc { + qcom,msm_gsi { + status = "disabled"; + }; + + qcom,rmnet-ipa { + status = "disabled"; + }; + + qcom,ipa_fws { + status = "disabled"; + }; + + ipa_hw: qcom,ipa@0x5800000 { + status = "disabled"; + }; + +}; From df1cf3e2afa4022997ddda8e13816926dc6dd58c Mon Sep 17 00:00:00 2001 From: Sandeep Singh Date: Wed, 2 Mar 2022 12:03:22 +0530 Subject: [PATCH 03/18] ARM: dts: msm: Disable ipa from wlan side for blair apq IPA needs to be disabled for blair apq as IPA hw is not present for apq targets. Change-Id: I4dadc80fb655504d018085ee25786bf2990df613 --- bindings/cnss/cnss-wlan.txt | 2 ++ qcom/blairp.dtsi | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/bindings/cnss/cnss-wlan.txt b/bindings/cnss/cnss-wlan.txt index 7be180ac82b5..1c3cf34581f6 100644 --- a/bindings/cnss/cnss-wlan.txt +++ b/bindings/cnss/cnss-wlan.txt @@ -54,6 +54,8 @@ Optional properties: load in uA and Regulator settle delay in us - qcom,smmu-s1-enable: Boolean property to decide whether to enable SMMU S1 stage or not + - wlan-ipa-disabled: Boolean property to decide whether IPA is disabled + or not - qcom,wlan-smmu-iova-address: I/O virtual address range as format to be used for allocations associated between WLAN/PCIe and SMMU diff --git a/qcom/blairp.dtsi b/qcom/blairp.dtsi index c446a1e4d67d..192f3b55e620 100644 --- a/qcom/blairp.dtsi +++ b/qcom/blairp.dtsi @@ -25,4 +25,8 @@ status = "disabled"; }; + icnss: qcom,icnss@C800000 { + wlan-ipa-disabled; + }; + }; From ef718fe4d58c97f5ec37fac9391a0583b42f7285 Mon Sep 17 00:00:00 2001 From: Anil Veshala Veshala Date: Wed, 30 Mar 2022 05:36:08 -0700 Subject: [PATCH 04/18] ARM: dts: msm: add rtl based flag Added dt entry for rtl based SE's. Change-Id: I065c567082b9b7b28879c4da396d3949c354f3c2 --- qcom/holi-qupv3.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/qcom/holi-qupv3.dtsi b/qcom/holi-qupv3.dtsi index 3376a25d47cc..cbc8be21fa8a 100644 --- a/qcom/holi-qupv3.dtsi +++ b/qcom/holi-qupv3.dtsi @@ -158,6 +158,7 @@ <&gpi_dma0 1 2 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_0>; + qcom,rtl_se; status = "disabled"; }; @@ -241,6 +242,7 @@ <&gpi_dma1 1 0 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -283,6 +285,7 @@ <&gpi_dma1 1 1 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -303,6 +306,7 @@ <&gpi_dma1 1 2 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; From 7302477c5b12c0da72139ad3143ffbf886afeab8 Mon Sep 17 00:00:00 2001 From: Swetha Chikkaboraiah Date: Wed, 18 May 2022 11:00:51 +0530 Subject: [PATCH 05/18] ARM: dts: qcom: Add new soc-id for Blair Add new soc-id to support Blair variant. Change-Id: I015768e06598d8e78e4280c25acc2a01a78059cc --- qcom/blair-atp-overlay.dts | 2 +- qcom/blair-cdp-overlay.dts | 2 +- qcom/blair-mtp-nopmi-overlay.dts | 2 +- qcom/blair-mtp-overlay.dts | 2 +- qcom/blair-mtp-usbc-overlay.dts | 2 +- qcom/blair-qrd-nopmi-overlay.dts | 2 +- qcom/blair-qrd-overlay.dts | 2 +- qcom/blair-rumi-overlay.dts | 2 +- qcom/blair.dtsi | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/qcom/blair-atp-overlay.dts b/qcom/blair-atp-overlay.dts index c002a611a76b..7ea8dfd91329 100644 --- a/qcom/blair-atp-overlay.dts +++ b/qcom/blair-atp-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blair ATP"; compatible = "qcom,blair-atp", "qcom,blair", "qcom,atp"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <33 0>; }; diff --git a/qcom/blair-cdp-overlay.dts b/qcom/blair-cdp-overlay.dts index c46e6e97fc86..1961fb0914d0 100644 --- a/qcom/blair-cdp-overlay.dts +++ b/qcom/blair-cdp-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blair CDP"; compatible = "qcom,blair-cdp", "qcom,blair", "qcom,cdp"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <1 0>; }; diff --git a/qcom/blair-mtp-nopmi-overlay.dts b/qcom/blair-mtp-nopmi-overlay.dts index a879373f8d08..a132050d0e25 100644 --- a/qcom/blair-mtp-nopmi-overlay.dts +++ b/qcom/blair-mtp-nopmi-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blair MTP NOPMI"; compatible = "qcom,blair-mtp", "qcom,blair", "qcom,mtp"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <8 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x0 0x0>; diff --git a/qcom/blair-mtp-overlay.dts b/qcom/blair-mtp-overlay.dts index 624cb3f025ec..4dbe0d8a6869 100644 --- a/qcom/blair-mtp-overlay.dts +++ b/qcom/blair-mtp-overlay.dts @@ -7,7 +7,7 @@ / { model = "Qualcomm Technologies, Inc. Blair MTP"; compatible = "qcom,blair-mtp", "qcom,blair", "qcom,mtp"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <8 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; diff --git a/qcom/blair-mtp-usbc-overlay.dts b/qcom/blair-mtp-usbc-overlay.dts index d6477987dbeb..69e6b42dad93 100644 --- a/qcom/blair-mtp-usbc-overlay.dts +++ b/qcom/blair-mtp-usbc-overlay.dts @@ -7,7 +7,7 @@ / { model = "Qualcomm Technologies, Inc. Blair MTP USBC audio"; compatible = "qcom,blair-mtp", "qcom,blair", "qcom,mtp"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <8 1>; }; diff --git a/qcom/blair-qrd-nopmi-overlay.dts b/qcom/blair-qrd-nopmi-overlay.dts index 242b301e2408..3b837e5a2916 100644 --- a/qcom/blair-qrd-nopmi-overlay.dts +++ b/qcom/blair-qrd-nopmi-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blair QRD NOPMI"; compatible = "qcom,blair-qrd", "qcom,blair", "qcom,qrd"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <0x1000B 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x0 0x0>; diff --git a/qcom/blair-qrd-overlay.dts b/qcom/blair-qrd-overlay.dts index 57c75c1c53cd..f8a57fbf3309 100644 --- a/qcom/blair-qrd-overlay.dts +++ b/qcom/blair-qrd-overlay.dts @@ -7,7 +7,7 @@ / { model = "Qualcomm Technologies, Inc. Blair QRD"; compatible = "qcom,blair-qrd", "qcom,blair", "qcom,qrd"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <0x1000B 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; diff --git a/qcom/blair-rumi-overlay.dts b/qcom/blair-rumi-overlay.dts index 36113587bdfb..b1720bf4a833 100644 --- a/qcom/blair-rumi-overlay.dts +++ b/qcom/blair-rumi-overlay.dts @@ -6,6 +6,6 @@ / { model = "Qualcomm Technologies, Inc. Blair RUMI"; compatible = "qcom,blair-rumi", "qcom,blair", "qcom,rumi"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; qcom,board-id = <15 0>; }; diff --git a/qcom/blair.dtsi b/qcom/blair.dtsi index b16c64f920a6..8dc813731b7f 100644 --- a/qcom/blair.dtsi +++ b/qcom/blair.dtsi @@ -17,7 +17,7 @@ / { model = "Qualcomm Technologies, Inc. Blair "; compatible = "qcom,blair"; - qcom,msm-id = <507 0x10000>; + qcom,msm-id = <507 0x10000>, <578 0x10000>; interrupt-parent = <&intc>; #address-cells = <2>; From d14128feb298351a3039ebc269b12be477c44cab Mon Sep 17 00:00:00 2001 From: Pankaj Gupta Date: Tue, 21 Jun 2022 16:02:04 +0530 Subject: [PATCH 06/18] ARM: dts: msm: Add support of FMAX 700mhz for blair GPU Enable 700 Mhz FMAX for blair GPU as per speed bin requirement. Change-Id: I86e333d751e94976a166c47d5d4d2701b7a5366f --- qcom/blair.dtsi | 67 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/qcom/blair.dtsi b/qcom/blair.dtsi index b16c64f920a6..b9ccd3baf56c 100644 --- a/qcom/blair.dtsi +++ b/qcom/blair.dtsi @@ -3684,6 +3684,73 @@ qcom,bus-max-ddr7 = <4>; }; }; + + qcom,gpu-pwrlevels-3 { + #address-cells = <1>; + #size-cells = <0>; + qcom,speed-bin = <148>; + qcom,ca-target-pwrlevel = <3>; + qcom,initial-pwrlevel = <4>; + + + /* NOM_L1 */ + qcom,gpu-pwrlevel@0 { + reg = <0>; + qcom,gpu-freq = <700000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <9>; + qcom,bus-min-ddr7 = <5>; + qcom,bus-max-ddr7 = <9>; + + }; + + /* NOM */ + qcom,gpu-pwrlevel@1 { + reg = <1>; + qcom,gpu-freq = <650000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <6>; + qcom,bus-min-ddr7 = <5>; + qcom,bus-max-ddr7 = <8>; + + }; + + /* SVS_L1 */ + qcom,gpu-pwrlevel@2 { + reg = <2>; + qcom,gpu-freq = <490000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <5>; + qcom,bus-min-ddr7 = <4>; + qcom,bus-max-ddr7 = <7>; + + }; + + /* SVS */ + qcom,gpu-pwrlevel@3 { + reg = <3>; + qcom,gpu-freq = <390000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <4>; + qcom,bus-min-ddr7 = <2>; + qcom,bus-max-ddr7= <5>; + }; + + /* LOW SVS */ + qcom,gpu-pwrlevel@4 { + reg = <4>; + qcom,gpu-freq = <266000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <2>; + qcom,bus-min-ddr7 = <1>; + qcom,bus-max-ddr7 = <4>; + }; + }; }; }; From 78f42e1abf539ab6f0b1da4034247f5b7a602f91 Mon Sep 17 00:00:00 2001 From: Sai Chaitanya Kaveti Date: Tue, 22 Nov 2022 23:08:46 +0530 Subject: [PATCH 07/18] dt-bindings: msm: Add documentation for PME in d3cold wake flag Added a DT flag for sdxlemur to issue PME message in device initiated wake from d3cold. This change adds the documentation for the flag. Change-Id: I62da7b24f3c8db215a8a0bc1d65bb92f60a6a8a5 --- bindings/pci/msm_ep_pcie.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bindings/pci/msm_ep_pcie.txt b/bindings/pci/msm_ep_pcie.txt index 734ab549c880..36fadcb1d89b 100644 --- a/bindings/pci/msm_ep_pcie.txt +++ b/bindings/pci/msm_ep_pcie.txt @@ -77,6 +77,8 @@ Optional Properties: - qcom,mhi-soc-reset-offset: AXI register offset to initiate a SOC reset. - qcom,avoid-reboot-in-d3hot: Ensures device is not in D3hot during reboot/panic. + - qcom,pme-in-wake-from-d3cold: Issue PME message in device initiated wake + from d3cold. Example: From 92d76e3e6e2466908a89b11f5d6eba5121b0ab51 Mon Sep 17 00:00:00 2001 From: Kaushal Hooda Date: Tue, 17 Jan 2023 18:24:24 +0530 Subject: [PATCH 08/18] ARM: dts: msm: Add non-wake-svc node Added new property non-wake-svc for adsp_qrtr so that it can take service id for the services for which wakeup should be prevented. Change-Id: I967acbc395cbce399d5d834fa960857798266a4b --- qcom/monaco.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/monaco.dtsi b/qcom/monaco.dtsi index e8d1b6027b1c..d42c24142f3e 100644 --- a/qcom/monaco.dtsi +++ b/qcom/monaco.dtsi @@ -1032,6 +1032,8 @@ qcom,intents = <0x800 5 0x2000 3 0x4400 2>; + qcom,non-wake-svc = <0x51 + 0x190>; }; audio_gpr: qcom,gpr { From 324ad6b1891e5fce35351fc31af745a6b48188e4 Mon Sep 17 00:00:00 2001 From: Chetan C R Date: Thu, 5 Jan 2023 18:40:07 +0530 Subject: [PATCH 09/18] ARM: dts: msm: Fallback to 3 cluster approach for Katmai There was issue reported that cpu7 is not scaling up even when some load is given to it. This issue is fixed falling back to 3 cluster approach making the cpu7 frequency scaling based on the load. Change-Id: Ib9d681f7a356b957fdb8450003a0c71029ef1a6a --- qcom/katmai-cpu-fp2.dtsi | 61 +++++++++++++++++++++++++--------------- 1 file changed, 38 insertions(+), 23 deletions(-) diff --git a/qcom/katmai-cpu-fp2.dtsi b/qcom/katmai-cpu-fp2.dtsi index 045ae1660bb3..f87e6f72849b 100644 --- a/qcom/katmai-cpu-fp2.dtsi +++ b/qcom/katmai-cpu-fp2.dtsi @@ -140,7 +140,7 @@ cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>; capacity-dmips-mhz = <1964>; dynamic-power-coefficient = <520>; - qcom,freq-domain = <&cpufreq_hw 1 4>; + qcom,freq-domain = <&cpufreq_hw 2 4>; next-level-cache = <&L2_7>; L2_7: l2-cache { compatible = "arm,arch-cache"; @@ -180,8 +180,10 @@ core2 { cpu = <&CPU6>; }; + }; - core3 { + cluster2 { + core0 { cpu = <&CPU7>; }; }; @@ -219,8 +221,6 @@ }; qcom,cpu4-computemon { - /delete-property/ qcom,cpulist; - qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; ddr4-map { qcom,core-dev-table = < 691200 MHZ_TO_MBPS( 451, 4) >, @@ -244,24 +244,10 @@ qcom,core-dev-table = < 1900800 MHZ_TO_MBPS( 150, 16) >; }; - - qcom,cpu4-qoslatmon { - /delete-property/ qcom,cpulist; - qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; - }; - - /delete-node/ qcom,cpu7-qoslatmon; - /delete-node/ qcom,cpu7-l3-computemon; - /delete-node/ qcom,cpu7-computemon; }; qcom,cpu4_grp { - /delete-property/ qcom,cpulist; - qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; - qcom,cpu4-rimps-l3-latmon { - /delete-property/ qcom,cpulist; - qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,core-dev-table = < 940800 556800000 >, < 1228800 768000000 >, @@ -269,10 +255,39 @@ < 1900800 1401600000 >; }; }; - - /delete-node/ qcom,cpu7-cpu-ddr-latfloor; - /delete-node/ qcom,cpu7-cpu-l3-latfloor; - /delete-node/ qcom,cpu7-cpu-ddr-qoslatfloor; - /delete-node/ qcom,cpu7_grp; }; +&cpu4_llcc_computemon { + qcom,core-dev-table = + < 1900800 MHZ_TO_MBPS( 150, 16) >; +}; + +&cpu7_computemon { + ddr4-map { + qcom,core-dev-table = + < 2380800 MHZ_TO_MBPS( 451, 4) >; + }; + + ddr5-map { + qcom,core-dev-table = + < 2380800 MHZ_TO_MBPS( 451, 4) >; + }; +}; + +&cpu7_l3_computemon { + qcom,core-dev-table = + < 2035200 300000000 >; +}; + +&cpu7_qoslatmon { + qcom,core-dev-table = + < 2035200 1 >; + +}; + +&cpu7_rimps_l3_latmon { + qcom,core-dev-table = + < 1056000 556800000 >, + < 1324800 768000000 >, + < 1766400 1190400000 >; +}; From c6fd95ea57efd5651499b0713b6d828a7c6bf0b8 Mon Sep 17 00:00:00 2001 From: Sai Chaitanya Kaveti Date: Wed, 25 Jan 2023 19:59:37 +0530 Subject: [PATCH 10/18] ARM: dts: msm: Introduce flag to notify BME deassert IRQ support Introducing new flag to indicate BME deassert interrupt support as part of aggregated interrupt and added dt-bindings documentation of the same. Change-Id: Id3571707eb0e984acfd28ba833d18d41ad15048c --- bindings/pci/msm_ep_pcie.txt | 2 ++ qcom/sdxlemur.dtsi | 1 + 2 files changed, 3 insertions(+) diff --git a/bindings/pci/msm_ep_pcie.txt b/bindings/pci/msm_ep_pcie.txt index 36fadcb1d89b..917cca312113 100644 --- a/bindings/pci/msm_ep_pcie.txt +++ b/bindings/pci/msm_ep_pcie.txt @@ -79,6 +79,8 @@ Optional Properties: reboot/panic. - qcom,pme-in-wake-from-d3cold: Issue PME message in device initiated wake from d3cold. + - qcom,pcie-bme-deassert-irq: Enable BME deassert irq as part of aggregated irq + if it is supported by the target. Example: diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi index 27cede7e5cc0..b6c47cd59dc6 100644 --- a/qcom/sdxlemur.dtsi +++ b/qcom/sdxlemur.dtsi @@ -990,6 +990,7 @@ qcom,aoss-rst-clr; qcom,aux-clk = <0x11>; qcom,avoid-reboot-in-d3hot; + qcom,pcie-bme-deassert-irq; qcom,phy-init = <0x1240 0x01 0x0 0x100c 0x02 0x0 From 5b243dd68cf141a75b9472cdfc7cbe7b6c44af08 Mon Sep 17 00:00:00 2001 From: Ashok Vuyyuru Date: Tue, 7 Feb 2023 20:39:46 +0530 Subject: [PATCH 11/18] ARM: dts: msm: Adding ipa fw PIL timeout value Adding changes to add timeout value to release the proxy vote as soon FW loading completed. Change-Id: I0ed7f192dcdc680d54e5b791f8cc0fc8337e6330 --- qcom/yupik.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi index e0e6a00dbd12..ffc66eb54453 100644 --- a/qcom/yupik.dtsi +++ b/qcom/yupik.dtsi @@ -5273,6 +5273,7 @@ qcom,pas-id = <0xf>; qcom,firmware-name = "yupik_ipa_fws"; qcom,pil-force-shutdown; + qcom,proxy-timeout-ms = <1000>; memory-region = <&pil_ipa_gsi_mem>; }; From f94bfb6eacdf6453aefe746bd60573aae7aae987 Mon Sep 17 00:00:00 2001 From: Nilesh Laad Date: Tue, 10 Jan 2023 17:00:46 +0530 Subject: [PATCH 12/18] ARM: dts: msm: add support for eDP on Yupik IOT HSP platform Add pinctrl changes to support eDP on Yupik IOT HSP platform. Change-Id: I319319b4429b435f9288eca71fed9a9d02792f4d --- qcom/yupik-iot-hsp.dtsi | 62 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/qcom/yupik-iot-hsp.dtsi b/qcom/yupik-iot-hsp.dtsi index b4cf6a1a5007..e200b9915874 100644 --- a/qcom/yupik-iot-hsp.dtsi +++ b/qcom/yupik-iot-hsp.dtsi @@ -4,6 +4,68 @@ &soc { }; +&sde_edp { + status = "disabled"; + pinctrl-names = "mdss_dp_hpd_active", "mdss_dp_hpd_tlmm", "mdss_dp_hpd_ctrl", + "mdss_dp_active", "mdss_dp_sleep"; + pinctrl-0 = <&edp_hpd_ctrl>; + pinctrl-1 = <&edp_hpd_ctrl>; + pinctrl-2 = <&edp_hpd_ctrl>; + pinctrl-3 = <&edp_hpd_ctrl>; + pinctrl-4 = <&edp_hpd_ctrl>; + qcom,dp-hpd-gpio = <&tlmm 60 0>; + qcom,edp-vcc-en-gpio = <&tlmm 80 0>; + //qcom,edp-backlight-pwr-gpio = <&tlmm 102 0>; + qcom,edp-pwm-en-gpio = <&pm8350c_gpios 8 0>; + qcom,edp-backlight-en-gpio = <&pm8350c_gpios 7 0>; +}; + +&tlmm { + edp_hpd_ctrl: hpd_ctrl@60 { + mux { + pins = "gpio60"; + function = "edp_hot"; + }; + + config { + pins = "gpio60"; + bias-disable; + input-enable; + drive-strength = <2>; + }; + }; +}; + +&pm8350c_gpios { + pmic_edp_bl_en: pmic-edp-bl-en-state { + pins = "gpio7"; + function = "normal"; + bias-disable; + qcom,drive-strength = ; + /* Force backlight to be disabled to match state at boot. */ + output-low; + }; + +}; + +&soc { + edp_panel_bl_reg: edp_panel_bl_reg { + compatible = "qcom,stub-regulator"; + regulator-name = "edp_panel_bl_reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + pm8350c_pwm_backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&edp_panel_bl_reg>; + enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_edp_bl_en>; + pwms = <&pm8350c_pwm_2 3 65535>; + }; +}; + &pcie0 { status = "ok"; }; From edf6eb8074564224389db2e3efe4cd22c00b9e08 Mon Sep 17 00:00:00 2001 From: AKASH KUMAR Date: Mon, 13 Mar 2023 14:29:48 +0530 Subject: [PATCH 13/18] ARM: dts: msm: ARM: dts: msm: Enable Secondary Controller for QCM6490 IOT Enable USB2 for iot targets. Also, Add lpm Disable flag for secondary controller to avoid entering lpm during active transfers. This helps to avoid failures during mtp transfers. Change-Id: If289917470e7780efa5962c2d0f7a07c7f6f0aa5 --- qcom/yupik-iot.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/qcom/yupik-iot.dtsi b/qcom/yupik-iot.dtsi index f069e51e512b..31c54138de18 100644 --- a/qcom/yupik-iot.dtsi +++ b/qcom/yupik-iot.dtsi @@ -28,3 +28,14 @@ &gcc_usb30_sec_gdsc { status = "ok"; }; + +&usb1 { + status = "ok"; + dwc3@8c00000 { + snps,usb2-gadget-lpm-disable; + }; +}; + +&usb2_phy1 { + status = "ok"; +}; From 22d1e081dfb597f038974b3a3877c470e402105d Mon Sep 17 00:00:00 2001 From: Priyansh Jain Date: Tue, 14 Mar 2023 09:28:17 +0530 Subject: [PATCH 14/18] ARM: dts: qcom: Add cooling cells property in all the CPU node for yupik Add coolings cells property for all the CPU devicetree node for yupik, as for qultivate variant any two of the CPU cores can be fused out, So, remaining gold cores can be mitigated. Change-Id: Iccf902818f1d8587ff9b88b725817ff0d5d2ee0e --- qcom/katmai-cpu-fp2.dtsi | 6 ++++++ qcom/yupik.dtsi | 5 +++++ 2 files changed, 11 insertions(+) diff --git a/qcom/katmai-cpu-fp2.dtsi b/qcom/katmai-cpu-fp2.dtsi index f87e6f72849b..62a5072a918b 100644 --- a/qcom/katmai-cpu-fp2.dtsi +++ b/qcom/katmai-cpu-fp2.dtsi @@ -39,6 +39,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_1>; + #cooling-cells = <2>; L2_1: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -56,6 +57,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_2>; + #cooling-cells = <2>; L2_2: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -73,6 +75,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_3>; + #cooling-cells = <2>; L2_3: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -108,6 +111,7 @@ dynamic-power-coefficient = <520>; qcom,freq-domain = <&cpufreq_hw 1 4>; next-level-cache = <&L2_5>; + #cooling-cells = <2>; L2_5: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -125,6 +129,7 @@ dynamic-power-coefficient = <520>; qcom,freq-domain = <&cpufreq_hw 1 4>; next-level-cache = <&L2_6>; + #cooling-cells = <2>; L2_6: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -142,6 +147,7 @@ dynamic-power-coefficient = <520>; qcom,freq-domain = <&cpufreq_hw 2 4>; next-level-cache = <&L2_7>; + #cooling-cells = <2>; L2_7: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi index ffc66eb54453..eadb26cb9ee8 100644 --- a/qcom/yupik.dtsi +++ b/qcom/yupik.dtsi @@ -101,6 +101,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_1>; + #cooling-cells = <2>; L2_1: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -118,6 +119,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_2>; + #cooling-cells = <2>; L2_2: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -135,6 +137,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_3>; + #cooling-cells = <2>; L2_3: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -170,6 +173,7 @@ dynamic-power-coefficient = <520>; qcom,freq-domain = <&cpufreq_hw 1 4>; next-level-cache = <&L2_5>; + #cooling-cells = <2>; L2_5: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; @@ -187,6 +191,7 @@ dynamic-power-coefficient = <520>; qcom,freq-domain = <&cpufreq_hw 1 4>; next-level-cache = <&L2_6>; + #cooling-cells = <2>; L2_6: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; From 80a0d26a52697d2a70913a851a160e3d571550e5 Mon Sep 17 00:00:00 2001 From: AKASH KUMAR Date: Thu, 20 Apr 2023 13:20:09 +0530 Subject: [PATCH 15/18] ARM: dts: msm: Set Default mode none for USB2 yupik IOT Set default mode to none for USB2 port as there is no provision for dynamic detection of USB modes. Change-Id: I75163c0ceee5310ba9848e95ba2b89ae0be98c11 --- qcom/yupik-iot.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/qcom/yupik-iot.dtsi b/qcom/yupik-iot.dtsi index 31c54138de18..6f817f25531f 100644 --- a/qcom/yupik-iot.dtsi +++ b/qcom/yupik-iot.dtsi @@ -30,6 +30,7 @@ }; &usb1 { + qcom,default-mode-none; status = "ok"; dwc3@8c00000 { snps,usb2-gadget-lpm-disable; From ac4f6f8c793f6b6be5f351d852a1aa4e45af04d1 Mon Sep 17 00:00:00 2001 From: Nilesh Laad Date: Tue, 11 Apr 2023 12:46:03 +0530 Subject: [PATCH 16/18] ARM: dts: msm: update gpio and pwm settings for eDP support Update gpio and pwm settings to enable correct pwm node for backlight driver. Change-Id: I068364bf6192a9735b3c602f98125895fc11ea1b --- qcom/yupik-iot-hsp.dtsi | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/qcom/yupik-iot-hsp.dtsi b/qcom/yupik-iot-hsp.dtsi index e200b9915874..f736f0b3631a 100644 --- a/qcom/yupik-iot-hsp.dtsi +++ b/qcom/yupik-iot-hsp.dtsi @@ -7,12 +7,13 @@ &sde_edp { status = "disabled"; pinctrl-names = "mdss_dp_hpd_active", "mdss_dp_hpd_tlmm", "mdss_dp_hpd_ctrl", - "mdss_dp_active", "mdss_dp_sleep"; + "mdss_dp_active", "mdss_dp_sleep", "mdss_edp_bl_pwm"; pinctrl-0 = <&edp_hpd_ctrl>; pinctrl-1 = <&edp_hpd_ctrl>; pinctrl-2 = <&edp_hpd_ctrl>; pinctrl-3 = <&edp_hpd_ctrl>; pinctrl-4 = <&edp_hpd_ctrl>; + pinctrl-5 = <&pmic_edp_bl_pwm>; qcom,dp-hpd-gpio = <&tlmm 60 0>; qcom,edp-vcc-en-gpio = <&tlmm 80 0>; //qcom,edp-backlight-pwr-gpio = <&tlmm 102 0>; @@ -46,6 +47,18 @@ output-low; }; + pmic_edp_bl_pwm: pmic-edp-bl-pwm-state { + pins = "gpio8"; + function = "func1"; + bias-disable; + qcom,drive-strength = ; + /* Force backlight to be disabled to match state at boot. */ + output-low; + }; +}; + +&pm8350c_pwm_2 { + status = "ok"; }; &soc { @@ -62,7 +75,7 @@ enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pmic_edp_bl_en>; - pwms = <&pm8350c_pwm_2 3 65535>; + pwms = <&pm8350c_pwm_2 0 65535 0>; }; }; From b9c477b26f1451ed44ad6c49074dd84b916230be Mon Sep 17 00:00:00 2001 From: Nilesh Laad Date: Fri, 28 Apr 2023 15:43:17 +0530 Subject: [PATCH 17/18] ARM: dts: msm: enable panel notifier support for eDP panel Add panel node, panel entry and a property to enable panel notifier support for eDP panel. Change-Id: I3059810a2ae911bdd610e908f374081d223bcf19 --- qcom/yupik-iot-hsp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/qcom/yupik-iot-hsp.dtsi b/qcom/yupik-iot-hsp.dtsi index e200b9915874..a3bfd78f6ee2 100644 --- a/qcom/yupik-iot-hsp.dtsi +++ b/qcom/yupik-iot-hsp.dtsi @@ -18,6 +18,14 @@ //qcom,edp-backlight-pwr-gpio = <&tlmm 102 0>; qcom,edp-pwm-en-gpio = <&pm8350c_gpios 8 0>; qcom,edp-backlight-en-gpio = <&pm8350c_gpios 7 0>; + qcom,edp-default-panel = <&edp_panel_1080p_video>; + qcom,panel-notifier-support; +}; + +&mdss_mdp { + edp_panel_1080p_video: qcom,mdss_edp_panel_1080p_video { + status = "ok"; + }; }; &tlmm { From 1eac4ecd8679bcd7a3abb251df9d33fd6a2c872b Mon Sep 17 00:00:00 2001 From: Kaustubh Pandey Date: Tue, 16 May 2023 15:55:40 +0530 Subject: [PATCH 18/18] ARM: dts: msm: Enable sdx-ext-ipc for v1 Enable sdx-ext-ipc SDX65 v1 MTP attached to IPQ807x and IPQ5018 hosts. Change-Id: I5056380956272ef5c5bd1760edc82d49560e5e0f --- qcom/sdxlemur-mtp-mbb-pcie-ep-ipq.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/qcom/sdxlemur-mtp-mbb-pcie-ep-ipq.dts b/qcom/sdxlemur-mtp-mbb-pcie-ep-ipq.dts index 54b101cea42d..4951cba0188a 100644 --- a/qcom/sdxlemur-mtp-mbb-pcie-ep-ipq.dts +++ b/qcom/sdxlemur-mtp-mbb-pcie-ep-ipq.dts @@ -10,3 +10,8 @@ "qcom,sdxlemur", "qcom,mtp"; qcom,board-id = <0xB010008 0x20B>; }; + +&sdx_ext_ipc { + ipq807x_attach = <1>; + status = "ok"; +};