From 08267086f13e06ebad5197038aaadf3e4677793d Mon Sep 17 00:00:00 2001 From: Deepak Kumar Date: Tue, 13 Oct 2020 18:41:52 +0530 Subject: [PATCH] ARM: dts: msm: Add GPU_CPR register space for Shima Extend the GMU register space to include the GPU_CPR registers. Change-Id: I171e18ce3bd05def1326dfd0ece8b53fb19ee62d --- qcom/shima-gpu.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/shima-gpu.dtsi b/qcom/shima-gpu.dtsi index 57672d085707..f7808d3470d0 100644 --- a/qcom/shima-gpu.dtsi +++ b/qcom/shima-gpu.dtsi @@ -438,7 +438,7 @@ gmu: qcom,gmu@3d69000 { compatible = "qcom,gpu-gmu"; - reg = <0x3d6a000 0x30000>, + reg = <0x3d6a000 0x34000>, <0xb290000 0x10000>; reg-names = "kgsl_gmu_reg",