From 088da186f0951e1b238b8a3ea13e47fe35fe2ffa Mon Sep 17 00:00:00 2001 From: Yuan Zhao Date: Tue, 26 May 2020 12:02:18 +0800 Subject: [PATCH] ARM: dts: msm: add 144hz panel support for lahaina Add DDIC R66451 144hz panel dtsi support for lahaina. Change-Id: Id3d39b94ab3d189d8a6703e4042f607256403dae --- ...i-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi | 134 ++++++++++++++++++ display/lahaina-sde-display-cdp.dtsi | 12 ++ display/lahaina-sde-display-common.dtsi | 14 ++ display/lahaina-sde-display-mtp.dtsi | 12 ++ display/lahaina-sde-display-qrd.dtsi | 12 ++ display/lahaina-sde-display.dtsi | 9 ++ 6 files changed, 193 insertions(+) create mode 100644 display/dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi diff --git a/display/dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi b/display/dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi new file mode 100644 index 000000000000..a959920b50ca --- /dev/null +++ b/display/dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi @@ -0,0 +1,134 @@ +&mdss_mdp { + dsi_r66451_amoled_144hz_cmd: qcom,mdss_dsi_r66451_fhd_plus_144hz_cmd { + qcom,mdss-dsi-panel-name = + "r66451 amoled cmd mode dsi visionox panel with DSC"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-physical-type = "oled"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + + qcom,dsi-sec-ctrl-num = <1>; + qcom,dsi-sec-phy-num = <1>; + + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-lane-map = "lane_map_0123"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-framerate = <144>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <95>; + qcom,mdss-dsi-h-back-porch = <40>; + qcom,mdss-dsi-h-pulse-width = <1>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <25>; + qcom,mdss-dsi-v-pulse-width = <1>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-jitter = <0x4 0x1>; + + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 02 B0 04 + 39 01 00 00 00 00 03 E8 00 02 + 39 01 00 00 00 00 03 E4 00 08 + 39 01 00 00 00 00 02 B0 00 + 39 01 00 00 00 00 32 C4 00 00 00 00 00 + 00 00 00 10 00 00 02 00 00 00 29 00 + 01 00 00 00 00 00 00 00 00 00 00 00 + 22 00 00 00 00 11 00 00 0C 00 00 00 + 00 30 00 00 00 00 00 00 + 39 01 00 00 00 00 86 CF 64 0B 00 00 00 + 00 00 00 08 00 0B 77 01 01 01 01 01 + 01 02 02 02 02 02 03 00 00 00 00 00 + 00 00 00 00 00 00 00 02 C9 02 C9 02 + C9 03 FF 03 FF 03 FF 00 00 00 00 00 + 00 00 00 00 00 00 00 02 C9 02 C9 02 + C9 03 FF 03 FF 03 FF 01 62 01 62 01 + 62 01 62 01 62 01 62 01 62 01 62 01 + 62 01 62 01 62 01 62 19 19 19 19 19 + 19 19 19 19 19 19 19 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 0F F6 0F + F6 0F F6 0F F6 0F F6 19 + 39 01 00 00 00 00 0D D0 44 44 B2 28 00 + 28 5A 00 5A 0D 17 01 + 39 01 00 00 00 00 15 D3 49 00 00 01 1A + 15 00 15 07 0F 77 77 77 37 B2 11 00 + A0 3C 9A + 39 01 00 00 00 00 1A D7 00 B9 40 00 40 + 04 00 F0 0F 00 40 00 00 00 00 00 00 + 19 40 00 40 04 00 F0 0F + 39 01 00 00 00 00 34 D8 00 00 00 00 00 + 00 00 00 00 30 00 30 00 30 00 30 00 + 30 05 00 00 00 00 00 00 00 00 00 0F + 00 0F 00 00 00 00 00 00 00 00 00 00 + 00 00 00 0F 00 2F 00 0F 00 20 + 39 01 00 00 00 00 2B DF 50 42 58 81 2D + 00 00 00 00 00 00 6B 00 00 00 00 00 + 00 00 00 01 0F FF D4 0E 00 00 00 00 + 00 00 0F 53 18 00 0F 00 00 00 00 00 + 00 + 39 01 00 00 00 00 02 F7 01 + 39 01 00 00 00 00 02 B0 80 + 39 01 00 00 00 00 0a E4 34 B4 00 00 00 + 30 04 0C E2 + 39 01 00 00 00 00 02 E6 00 + 39 01 00 00 00 00 02 B0 04 + 39 01 00 00 00 00 03 DF 50 40 + 39 01 00 00 00 00 06 F3 50 00 00 00 00 + 39 01 00 00 00 00 02 F2 11 + 39 01 00 00 00 00 06 F3 01 00 00 00 01 + 39 01 00 00 00 00 03 F4 00 02 + 39 01 00 00 00 00 02 F2 19 + 39 01 00 00 00 00 03 DF 50 42 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 05 2A 00 00 04 37 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 05 01 00 00 78 00 01 11 + 05 01 00 00 00 00 01 29 + ]; + + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-timing-switch-command-state = + "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <20>; + qcom,mdss-dsc-slice-width = <540>; + qcom,mdss-dsc-slice-per-pkt = <1>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; diff --git a/display/lahaina-sde-display-cdp.dtsi b/display/lahaina-sde-display-cdp.dtsi index 23695a28dd3a..58ebc3bec606 100644 --- a/display/lahaina-sde-display-cdp.dtsi +++ b/display/lahaina-sde-display-cdp.dtsi @@ -47,6 +47,7 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 24 0>; }; @@ -56,6 +57,17 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 24 0>; +}; + +&dsi_r66451_amoled_144hz_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 24 0>; }; diff --git a/display/lahaina-sde-display-common.dtsi b/display/lahaina-sde-display-common.dtsi index e8d923ee4a08..923309e61b86 100644 --- a/display/lahaina-sde-display-common.dtsi +++ b/display/lahaina-sde-display-common.dtsi @@ -15,6 +15,7 @@ #include "dsi-panel-r66451-dsc-fhd-plus-cmd-cphy.dtsi" #include "dsi-panel-r66451-dsc-fhd-plus-video.dtsi" #include "dsi-panel-r66451-dsc-fhd-plus-cmd.dtsi" +#include "dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi" #include "dsi-panel-ext-bridge-1080p.dtsi" #include "dsi-panel-sim-cmd.dtsi" #include "dsi-panel-sim-video.dtsi" @@ -228,6 +229,19 @@ }; }; +&dsi_r66451_amoled_144hz_cmd { + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1"; + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 22 09 09 19 17 09 + 09 09 02 04 00 1d 0e]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sharp_4k_dsc_cmd { qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; qcom,mdss-dsi-display-timings { diff --git a/display/lahaina-sde-display-mtp.dtsi b/display/lahaina-sde-display-mtp.dtsi index 804bb6a26c7d..ad1eb186123b 100644 --- a/display/lahaina-sde-display-mtp.dtsi +++ b/display/lahaina-sde-display-mtp.dtsi @@ -44,6 +44,7 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 24 0>; }; @@ -53,6 +54,17 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 24 0>; +}; + +&dsi_r66451_amoled_144hz_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 24 0>; }; diff --git a/display/lahaina-sde-display-qrd.dtsi b/display/lahaina-sde-display-qrd.dtsi index 365e13e7fa43..6792ded59c5e 100644 --- a/display/lahaina-sde-display-qrd.dtsi +++ b/display/lahaina-sde-display-qrd.dtsi @@ -26,6 +26,7 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 24 0>; }; @@ -35,6 +36,17 @@ qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 24 0>; +}; + +&dsi_r66451_amoled_144hz_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 24 0>; }; diff --git a/display/lahaina-sde-display.dtsi b/display/lahaina-sde-display.dtsi index 4e0465985d59..60e9663d7420 100644 --- a/display/lahaina-sde-display.dtsi +++ b/display/lahaina-sde-display.dtsi @@ -145,6 +145,15 @@ qcom,mdss-dsi-panel-status-read-length = <1>; qcom,esd-check-enabled; }; +&dsi_r66451_amoled_144hz_cmd { + qcom,ulps-enabled; + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x1c>; + qcom,mdss-dsi-panel-status-read-length = <1>; +}; &dsi_sharp_4k_dsc_cmd { qcom,ulps-enabled;