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clk: ux500: Register ssp clock lookups for u8500

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Signed-off-by: Ulf Hansson <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Acked-by: Lee Jones <[email protected]>
Signed-off-by: Mike Turquette <[email protected]>
This commit is contained in:
Ulf Hansson 2012-10-22 15:57:58 +02:00 • committed by Mike Turquette
commit 08b1f1c7b9
1 changed files with 6 additions and 0 deletions
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6
drivers/clk/ux500/u8500_clk.c
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@ -321,8 +321,11 @@ void u8500_clk_init(void)
clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE,
BIT(1), 0);
clk_register_clkdev(clk, "apb_pclk", "ssp0");
clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE,
BIT(2), 0);
clk_register_clkdev(clk, "apb_pclk", "ssp1");
clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE,
BIT(3), 0);
@ -465,8 +468,11 @@ void u8500_clk_init(void)
/* Periph3 */
clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk",
U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "ssp0");
clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk",
U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "ssp1");
clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk",
U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE);