From 08bc070d5e579aaa41d16d0aa462875f35489587 Mon Sep 17 00:00:00 2001
From: tinno64 <tinno64@motorola.com>
Date: Thu, 18 May 2023 11:21:18 +0800
Subject: [PATCH] dts/display: Modify 1st csot mipi clk = 450mHz

Fix inconsistency in mipi clock frequency measurement and configuration

Change-Id: I84312d45d638fd051aff616258e6496237ace20d
Signed-off-by: tinno64 <tinno64@motorola.com>
Reviewed-on: https://gerrit.mot.com/2612060
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
Submit-Approved: Jira Key
---
 qcom/bangkk-display.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qcom/bangkk-display.dtsi b/qcom/bangkk-display.dtsi
index b5867b94c893..11ce079d0af1 100644
--- a/qcom/bangkk-display.dtsi
+++ b/qcom/bangkk-display.dtsi
@@ -240,6 +240,7 @@
 	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
+			qcom,mdss-dsi-panel-clockrate = <890000000>;
 			qcom,mdss-dsi-panel-phy-timings = [00 1E 08 07 18 22 08
 								08 08 02 04 00 1A 0D];
 			qcom,display-topology = <1 1 1>;