A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Add CSIPHY/CCI for bus3 in devicetree for holi" into camera-kernel.lnx.4.0

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Camera Software Integration 2020-08-03 13:23:34 -07:00 • committed by Gerrit - the friendly Code Review server
commit 08c1791c62
1 changed files with 45 additions and 6 deletions
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51
holi-camera.dtsi
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@ -111,6 +111,41 @@
status = "ok"
};
cam_csiphy3: qcom,csiphy3 {
cell-index = <3>;
compatible = "qcom,csiphy-v1.2.5", "qcom,csiphy";
reg = <0x05C58000 0x2000>;
reg-names = "csiphy";
reg-cam-base = <0x58000>;
interrupts = <GIC_SPI 312 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy";
regulator-names = "gdscr", "mipi-csi-vdd1",
"mipi-csi-vdd2";
gdscr-supply = <&gcc_camss_top_gdsc>;
mipi-csi-vdd1-supply = <&L18A>;
mipi-csi-vdd2-supply = <&L22A>;
rgltr-cntrl-support;
rgltr-min-voltage = <0 880000 1200000>;
rgltr-max-voltage = <0 1049000 1305000>;
rgltr-load-current = <0 15900 8900>;
clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_CPHY_3_CLK>,
<&gcc GCC_CAMSS_CSI3PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMSS_CSI3PHYTIMER_CLK>;
clock-names = "cphy_rx_clk_src",
"csiphy3_clk",
"csi3phytimer_clk_src",
"csi3phytimer_clk";
src-clock-name = "csi3phytimer_clk_src";
clock-cntl-level = "svs", "svs_l1", "nom", "turbo";
clock-rates =
<240000000 0 133330000 0>,
<341330000 0 200000000 0>,
<341330000 0 268800000 0>,
<384000000 0 268800000 0>;
status = "ok"
};
cam_cci0: qcom,cci0 {
cell-index = <0>;
compatible = "qcom,cci";
@ -223,14 +258,18 @@
clock-cntl-level = "svs";
clock-rates = <0 37500000>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cci2_active>;
pinctrl-1 = <&cci2_suspend>;
pinctrl-0 = <&cci2_active &cci3_active>;
pinctrl-1 = <&cci2_suspend &cci3_suspend>;
gpios = <&tlmm 43 0>,
<&tlmm 44 0>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 1>;
<&tlmm 44 0>,
<&tlmm 2 0>,
<&tlmm 3 0>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 1 1 1>;
gpio-req-tbl-label = "CCI_I2C_DATA2",
"CCI_I2C_CLK2";
"CCI_I2C_CLK2",
"CCI_I2C_DATA3",
"CCI_I2C_CLK3";
i2c_freq_100Khz_cci1: qcom,i2c_standard_mode {
hw-thigh = <201>;