From 08c920458a143e7885334e6e17796d3520b1112f Mon Sep 17 00:00:00 2001 From: Amir Vajid Date: Tue, 1 Jan 2019 12:16:58 -0800 Subject: [PATCH] dt-bindings: devfreq: Add DT bindings for ARM memlat driver This patch adds the DT bindings for devfreq ARM memlat driver. Change-Id: I3166bb2027de9a32aba63ecdb894a5f9dc85bacc --- bindings/devfreq/arm-memlat-mon.txt | 31 +++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 bindings/devfreq/arm-memlat-mon.txt diff --git a/bindings/devfreq/arm-memlat-mon.txt b/bindings/devfreq/arm-memlat-mon.txt new file mode 100644 index 000000000000..67dc991b3e75 --- /dev/null +++ b/bindings/devfreq/arm-memlat-mon.txt @@ -0,0 +1,31 @@ +ARM CPU memory latency monitor device + +arm-memlat-mon is a device that represents the use of the PMU in ARM cores +to measure the parameters for latency driven memory access patterns. + +Required properties: +- compatible: Must be "qcom,arm-memlat-mon" +- qcom,cpulist: List of CPU phandles to be monitored in a cluster +- qcom,target-dev: The DT device that corresponds to this master port +- qcom,core-dev-table: A mapping table of core frequency to a required bandwidth vote at the + given core frequency. + +Optional properties: +- qcom,cachemiss-ev: The cache miss event that this monitor is supposed to measure. + Defaults to 0x17 if not specified. +- qcom,inst-ev: The instruction count event that this monitor is supposed to measure. + Defaults to 0x08 if not specified. + + +Example: + qcom,arm-memlat-mon { + compatible = "qcom,arm-memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1>; + qcom,target-dev = <&memlat0>; + qcom,cachemiss-ev = <0x2A>; + qcom,inst-ev = <0x08>; + qcom,core-dev-table = + < 300000 1525>, + < 499200 3143>, + < 1881600 5859>; + };