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update cs35l35 driver from Payton
the old came from github site of cirrus driver v4.9-cs35l35 branch Change-Id: I182e2bb0d1e041c72307c6b9541a7b2755e64ad2 Signed-off-by: huangys <huangys@motorola.com> Reviewed-on: https://gerrit.mot.com/1160165 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Guobin Zhang <zhanggb@motorola.com> Submit-Approved: Jira Key
This commit is contained in:
huangys
Yuesheng Huang
parent
fa3cc721ff
commit
08e4828a96
4 changed files with 518 additions and 786 deletions
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@ -1,183 +0,0 @@
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CS35L35 Boosted Speaker Amplifier
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Required properties:
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- compatible : "cirrus,cs35l35"
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- reg : the I2C address of the device for I2C
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- VA-supply, VP-supply : power supplies for the device,
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as covered in
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Documentation/devicetree/bindings/regulator/regulator.txt.
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- interrupt-parent : Specifies the phandle of the interrupt controller to
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which the IRQs from CS35L35 are delivered to.
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- interrupts : IRQ line info CS35L35.
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(See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
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for further information relating to interrupt properties)
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- cirrus,boost-ind-nanohenry: Inductor value for boost converter. The value is
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in nH and they can be values of 1000nH, 1200nH, 1500nH, and 2200nH.
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Optional properties:
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- reset-gpios : gpio used to reset the amplifier
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- cirrus,stereo-config : Boolean to determine if there are 2 AMPs for a
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Stereo configuration
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- cirrus,audio-channel : Set Location of Audio Signal on Serial Port
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0 = Data Packet received on Left I2S Channel
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1 = Data Packet received on Right I2S Channel
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- cirrus,advisory-channel : Set Location of Advisory Signal on Serial Port
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0 = Data Packet received on Left I2S Channel
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1 = Data Packet received on Right I2S Channel
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- cirrus,shared-boost : Boolean to enable ClassH tracking of Advisory Signal
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if 2 Devices share Boost BST_CTL
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- cirrus,external-boost : Boolean to specify the device is using an external
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boost supply, note that sharing a boost from another cs35l35 would constitute
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using an external supply for the slave device
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- cirrus,sp-drv-strength : Value for setting the Serial Port drive strength
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Table 3-10 of the datasheet lists drive-strength specifications
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0 = 1x (Default)
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1 = .5x
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- cirrus,sp-drv-unused : Determines how unused slots should be driven on the
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Serial Port.
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0 - Hi-Z
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2 - Drive 0's (Default)
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3 - Drive 1's
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- cirrus,bst-pdn-fet-on : Boolean to determine if the Boost PDN control
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powers down with a rectification FET On or Off. If VSPK is supplied
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externally then FET is off.
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- cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost
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converter's output voltage in mV. The range is from 2600mV to 9000mV with
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increments of 100mV.
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(Default) VP
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- cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA.
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Configures the peak current by monitoring the current through the boost FET.
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Range starts at 1680mA and goes to a maximum of 4480mA with increments of
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110mA.
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(Default) 2.46 Amps
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- cirrus,amp-gain-zc : Boolean to determine if to use Amplifier gain-change
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zero-cross
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Optional H/G Algorithm sub-node:
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The cs35l35 node can have a single "cirrus,classh-internal-algo" sub-node
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that will disable automatic control of the internal H/G Algorithm.
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It is strongly recommended that the Datasheet be referenced when adjusting
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or using these Class H Algorithm controls over the internal Algorithm.
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Serious damage can occur to the Device and surrounding components.
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- cirrus,classh-internal-algo : Sub-node for the Internal Class H Algorithm
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See Section 4.3 Internal Class H Algorithm in the Datasheet.
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If not used, the device manages the ClassH Algorithm internally.
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Optional properties for the "cirrus,classh-internal-algo" Sub-node
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Section 7.29 Class H Control
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- cirrus,classh-bst-overide : Boolean
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- cirrus,classh-bst-max-limit
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- cirrus,classh-mem-depth
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Section 7.30 Class H Headroom Control
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- cirrus,classh-headroom
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Section 7.31 Class H Release Rate
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- cirrus,classh-release-rate
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Section 7.32 Class H Weak FET Drive Control
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- cirrus,classh-wk-fet-disable
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- cirrus,classh-wk-fet-delay
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- cirrus,classh-wk-fet-thld
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Section 7.34 Class H VP Control
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- cirrus,classh-vpch-auto
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- cirrus,classh-vpch-rate
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- cirrus,classh-vpch-man
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Optional Monitor Signal Format sub-node:
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The cs35l35 node can have a single "cirrus,monitor-signal-format" sub-node
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for adjusting the Depth, Location and Frame of the Monitoring Signals
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for Algorithms.
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See Sections 4.8.2 through 4.8.4 Serial-Port Control in the Datasheet
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-cirrus,monitor-signal-format : Sub-node for the Monitor Signaling Formating
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on the I2S Port. Each of the 3 8 bit values in the array contain the settings
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for depth, location, and frame.
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If not used, the defaults for the 6 monitor signals is used.
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Sections 7.44 - 7.53 lists values for the depth, location, and frame
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for each monitoring signal.
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- cirrus,imon : 4 8 bit values to set the depth, location, frame and ADC
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scale of the IMON monitor signal.
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- cirrus,vmon : 3 8 bit values to set the depth, location, and frame
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of the VMON monitor signal.
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- cirrus,vpmon : 3 8 bit values to set the depth, location, and frame
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of the VPMON monitor signal.
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- cirrus,vbstmon : 3 8 bit values to set the depth, location, and frame
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of the VBSTMON monitor signal
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- cirrus,vpbrstat : 3 8 bit values to set the depth, location, and frame
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of the VPBRSTAT monitor signal
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- cirrus,zerofill : 3 8 bit values to set the depth, location, and frame\
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of the ZEROFILL packet in the monitor signal
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Example:
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cs35l35: cs35l35@20 {
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compatible = "cirrus,cs35l35";
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reg = <0x20>;
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VA-supply = <&dummy_vreg>;
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VP-supply = <&dummy_vreg>;
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reset-gpios = <&axi_gpio 54 0>;
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interrupt-parent = <&gpio8>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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cirrus,boost-ctl-millivolt = <9000>;
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cirrus,stereo-config;
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cirrus,audio-channel = <0x00>;
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cirrus,advisory-channel = <0x01>;
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cirrus,shared-boost;
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cirrus,classh-internal-algo {
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cirrus,classh-bst-overide;
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cirrus,classh-bst-max-limit = <0x01>;
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cirrus,classh-mem-depth = <0x01>;
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cirrus,classh-release-rate = <0x08>;
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cirrus,classh-headroom-millivolt = <0x0B>;
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cirrus,classh-wk-fet-disable = <0x01>;
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cirrus,classh-wk-fet-delay = <0x04>;
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cirrus,classh-wk-fet-thld = <0x01>;
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cirrus,classh-vpch-auto = <0x01>;
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cirrus,classh-vpch-rate = <0x02>;
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cirrus,classh-vpch-man = <0x05>;
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};
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/* Depth, Location, Frame */
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cirrus,monitor-signal-format {
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cirrus,imon = /bits/ 8 <0x03 0x00 0x01>;
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cirrus,vmon = /bits/ 8 <0x03 0x00 0x00>;
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cirrus,vpmon = /bits/ 8 <0x03 0x04 0x00>;
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cirrus,vbstmon = /bits/ 8 <0x03 0x04 0x01>;
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cirrus,vpbrstat = /bits/ 8 <0x00 0x04 0x00>;
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cirrus,zerofill = /bits/ 8 <0x00 0x00 0x00>;
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};
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};
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@ -24,6 +24,7 @@ struct classh_cfg {
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*
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* Section 4.3 of the datasheet
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*/
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/* Internal ClassH Algorithm */
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bool classh_bst_override;
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bool classh_algo_enable;
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int classh_bst_max_limit;
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@ -57,7 +58,6 @@ struct monitor_cfg {
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u8 imon_dpth;
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u8 imon_loc;
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u8 imon_frm;
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u8 imon_scale;
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u8 vmon_dpth;
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u8 vmon_loc;
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u8 vmon_frm;
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@ -81,14 +81,10 @@ struct cs35l35_platform_data {
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bool stereo;
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/* serial port drive strength */
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int sp_drv_str;
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/* serial port drive in unused slots */
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int sp_drv_unused;
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/* Boost Power Down with FET */
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bool bst_pdn_fet_on;
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/* Boost Voltage : used if ClassH Algo Enabled */
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int bst_vctl;
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/* Boost Converter Peak Current CTRL */
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int bst_ipk;
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/* Amp Gain Zero Cross */
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bool gain_zc;
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/* Audio Input Location */
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@ -97,10 +93,6 @@ struct cs35l35_platform_data {
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int adv_channel;
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/* Shared Boost for stereo */
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bool shared_bst;
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/* Specifies this amp is using an external boost supply */
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bool ext_bst;
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/* Inductor Value */
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int boost_ind;
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/* ClassH Algorithm */
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struct classh_cfg classh_algo;
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/* Monitor Config */
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File diff suppressed because it is too large
Load diff
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@ -111,7 +111,7 @@
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#define CS35L35_AUDIN_DEPTH_MASK 0x03
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#define CS35L35_AUDIN_DEPTH_SHIFT 0
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#define CS35L35_ADVIN_DEPTH_MASK 0x0C
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#define CS35L35_ADVIN_DEPTH_MASK 0x12
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#define CS35L35_ADVIN_DEPTH_SHIFT 2
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#define CS35L35_SDIN_DEPTH_8 0x01
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#define CS35L35_SDIN_DEPTH_16 0x02
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@ -138,7 +138,7 @@
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#define CS35L35_VBSTMON_DEPTH_SHIFT 0
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#define CS35L35_VPMON_DEPTH_MASK 0x0C
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#define CS35L35_VPMON_DEPTH_SHIFT 2
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#define CS35L35_VPBRSTAT_DEPTH_MASK 0x30
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#define CS35L35_VPBRSTAT_DEPTH_MASK 0x18
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#define CS35L35_VPBRSTAT_DEPTH_SHIFT 4
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#define CS35L35_ZEROFILL_DEPTH_MASK 0x03
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#define CS35L35_ZEROFILL_DEPTH_SHIFT 0x00
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@ -148,15 +148,13 @@
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#define CS35L35_MON_FRM_MASK 0x80
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#define CS35L35_MON_FRM_SHIFT 7
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#define CS35L35_IMON_SCALE_MASK 0xF8
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#define CS35L35_IMON_SCALE_SHIFT 3
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#define CS35L35_MS_MASK 0x80
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#define CS35L35_MS_SHIFT 7
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#define CS35L35_SPMODE_MASK 0x40
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#define CS35L35_SP_DRV_MASK 0x10
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#define CS35L35_SP_DRV_SHIFT 4
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#define CS35L35_CLK_CTL2_MASK 0xFF
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#define CS35L35_CLK_DIV_MASK 0x3
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#define CS35L35_PDM_MODE_MASK 0x40
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#define CS35L35_PDM_MODE_SHIFT 6
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#define CS35L35_CLK_SOURCE_MASK 0x03
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@ -186,26 +184,11 @@
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#define CS35L35_BST_CTL_MASK 0x7F
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#define CS35L35_BST_CTL_SHIFT 0
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#define CS35L35_BST_IPK_MASK 0x1F
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#define CS35L35_BST_IPK_SHIFT 0
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#define CS35L35_AMP_MUTE_MASK 0x20
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#define CS35L35_AMP_MUTE_SHIFT 5
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#define CS35L35_AMP_GAIN_ZC_MASK 0x10
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#define CS35L35_AMP_GAIN_ZC_SHIFT 4
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#define CS35L35_AMP_DIGSFT_MASK 0x02
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#define CS35L35_AMP_DIGSFT_SHIFT 1
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/* CS35L35_SP_FMT_CTL3 */
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#define CS35L35_SP_I2S_DRV_MASK 0x03
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#define CS35L35_SP_I2S_DRV_SHIFT 0
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/* Boost Converter Config */
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#define CS35L35_BST_CONV_COEFF_MASK 0xFF
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#define CS35L35_BST_CONV_SLOPE_MASK 0xFF
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#define CS35L35_BST_CONV_LBST_MASK 0x03
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#define CS35L35_BST_CONV_SWFREQ_MASK 0xF0
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/* Class H Algorithm Control */
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#define CS35L35_CH_STEREO_MASK 0x40
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#define CS35L35_CH_STEREO_SHIFT 6
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@ -273,32 +256,30 @@
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#define CS35L35_VMON_OVFL 0x08
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#define CS35L35_IMON_OVFL 0x04
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/* Mulit-Device Sync */
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#define CS35L35_SYNC_EN_MASK 0x01
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#define CS35L35_SYNC_MS_MASK 0x20
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#define CS35L35_SYNC_MS_SHIFT 5
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#define CS35L35_SYNC_MS_CTRL_MASK 0x10
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#define CS35L35_SYNC_MS_CTRL_SHIFT 4
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#define CS35L35_SYNC_CLK_SEL_MASK 0x02
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#define CS35L35_SYNC_CLK_SEL_SHIFT 1
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#define CS35L35_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
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SNDRV_PCM_FMTBIT_S24_LE)
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struct cs35l35_private {
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struct device *dev;
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struct i2c_client *i2c_client;
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struct snd_soc_codec *codec;
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struct cs35l35_platform_data pdata;
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struct regmap *regmap;
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struct regulator_bulk_data supplies[2];
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int num_supplies;
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int sysclk;
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int sclk;
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int mclk_pll;
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int mclk_div;
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int mclk_sp_base;
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bool tdm_mode;
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bool pdm_mode;
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bool i2s_mode;
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bool i2s_enabled;
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bool slave_mode;
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bool pdm_mclk_switch;
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/* GPIO for /RST */
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struct gpio_desc *reset_gpio;
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/* GPIO for INT */
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struct gpio_desc *irq_gpio;
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struct completion pdn_done;
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};
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