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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: imx: define an enum for gpt timer device type
Define an enum for gpt timer device type in include/soc/imx/timer.h to tell the gpt block differences among SoCs. Update non-DT users (clock drivers) to pass the device type. As we now have include/soc/imx/timer.h, the declaration of mxc_timer_init() is moved into there as the best fit. Signed-off-by: Shawn Guo <[email protected]>
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8 changed files with 41 additions and 13 deletions
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@ -23,6 +23,7 @@
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <dt-bindings/clock/imx1-clock.h>
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#include <soc/imx/timer.h>
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#include <asm/irq.h>
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#include "clk.h"
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@ -102,7 +103,7 @@ int __init mx1_clocks_init(unsigned long fref)
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clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-fb.0");
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clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ahb", "imx1-fb.0");
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mxc_timer_init(MX1_TIM1_BASE_ADDR, MX1_TIM1_INT);
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mxc_timer_init(MX1_TIM1_BASE_ADDR, MX1_TIM1_INT, GPT_TYPE_IMX1);
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return 0;
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}
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@ -15,6 +15,7 @@
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <dt-bindings/clock/imx21-clock.h>
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#include <soc/imx/timer.h>
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#include <asm/irq.h>
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#include "clk.h"
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@ -156,7 +157,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
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clk_register_clkdev(clk[IMX21_CLK_I2C_GATE], NULL, "imx21-i2c.0");
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clk_register_clkdev(clk[IMX21_CLK_OWIRE_GATE], NULL, "mxc_w1.0");
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mxc_timer_init(MX21_GPT1_BASE_ADDR, MX21_INT_GPT1);
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mxc_timer_init(MX21_GPT1_BASE_ADDR, MX21_INT_GPT1, GPT_TYPE_IMX21);
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return 0;
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}
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@ -6,6 +6,7 @@
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#include <linux/of_address.h>
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#include <dt-bindings/clock/imx27-clock.h>
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#include <soc/imx/revision.h>
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#include <soc/imx/timer.h>
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#include <asm/irq.h>
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#include "clk.h"
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@ -233,7 +234,7 @@ int __init mx27_clocks_init(unsigned long fref)
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clk_register_clkdev(clk[IMX27_CLK_EMMA_AHB_GATE], "ahb", "m2m-emmaprp.0");
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clk_register_clkdev(clk[IMX27_CLK_EMMA_IPG_GATE], "ipg", "m2m-emmaprp.0");
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mxc_timer_init(MX27_GPT1_BASE_ADDR, MX27_INT_GPT1);
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mxc_timer_init(MX27_GPT1_BASE_ADDR, MX27_INT_GPT1, GPT_TYPE_IMX21);
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return 0;
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}
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@ -22,6 +22,7 @@
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#include <linux/err.h>
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#include <linux/of.h>
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#include <soc/imx/revision.h>
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#include <soc/imx/timer.h>
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#include <asm/irq.h>
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#include "clk.h"
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@ -198,7 +199,7 @@ int __init mx31_clocks_init(unsigned long fref)
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mx31_revision();
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clk_disable_unprepare(clk[iim_gate]);
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mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT);
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mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, GPT_TYPE_IMX31);
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return 0;
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}
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@ -14,6 +14,7 @@
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#include <linux/of.h>
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#include <linux/err.h>
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#include <soc/imx/revision.h>
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#include <soc/imx/timer.h>
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#include <asm/irq.h>
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#include "clk.h"
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@ -293,7 +294,7 @@ int __init mx35_clocks_init(void)
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imx_print_silicon_rev("i.MX35", mx35_revision());
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mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT);
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mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT, GPT_TYPE_IMX31);
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return 0;
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}
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@ -6,13 +6,6 @@
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extern spinlock_t imx_ccm_lock;
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/*
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* This is a stop-gap solution for clock drivers like imx1/imx21 which call
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* mxc_timer_init() to initialize timer for non-DT boot. It can be removed
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* when these legacy non-DT support is converted or dropped.
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*/
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void mxc_timer_init(unsigned long pbase, int irq);
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void imx_check_clocks(struct clk *clks[], unsigned int count);
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extern void imx_cscmr1_fixup(u32 *val);
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