clk: qcom: gpucc-lahaina: Fix gpu_cc_cx_gmu_clk stuck off warning

Earlier gpu_cc_cx_gmu_clk, gpu_cc_hub_cx_int_clk are kept always on,
due to SMMU hw voting missed tying these 2 clocks.
Update gpu_cc_cx_gmu_clk flag to CLK_DONT_HOLD_STATE as this clk
is used with aon ops and should not be warned by clk framework as clk
hold off state during the kernel boot.

Change-Id: I8fcfffa8c7e4dc6e9ca66bb82cda75c855b35b74
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
This commit is contained in:
Vivek Aknurwar 2020-07-07 13:34:35 -07:00
commit 09e312d708

View file

@ -332,7 +332,7 @@ static struct clk_branch gpu_cc_cx_gmu_clk = {
.hw = &gpu_cc_gmu_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
.flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,
.ops = &clk_branch2_aon_ops,
},
},
@ -507,7 +507,7 @@ static struct clk_branch gpu_cc_hub_aon_clk = {
static struct clk_branch gpu_cc_hub_cx_int_clk = {
.halt_reg = 0x1204,
.halt_check = BRANCH_HALT_SKIP,
.halt_check = BRANCH_HALT,
.clkr = {
.enable_reg = 0x1204,
.enable_mask = BIT(0),
@ -517,7 +517,7 @@ static struct clk_branch gpu_cc_hub_cx_int_clk = {
.hw = &gpu_cc_hub_cx_int_div_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
.flags = CLK_SET_RATE_PARENT | CLK_DONT_HOLD_STATE,
.ops = &clk_branch2_aon_ops,
},
},