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fpga: dfl: fme: add header sub feature support
The Header Register set is always present for FPGA Management Engine (FME), this patch implements init and uinit function for header sub feature and introduces several read-only sysfs interfaces for the capability and status. Sysfs interfaces: * /sys/class/fpga_region/<regionX>/<dfl-fme.x>/ports_num Read-only. Number of ports implemented * /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_id Read-only. Bitstream (static FPGA region) identifier number. It contains the detailed version and other information of this static FPGA region. * /sys/class/fpga_region/<regionX>/<dfl-fme.x>/bitstream_metadata Read-only. Bitstream (static FPGA region) meta data. It contains the synthesis date, seed and other information of this static FPGA region. Signed-off-by: Tim Whisonant <[email protected]> Signed-off-by: Enno Luebbers <[email protected]> Signed-off-by: Shiva Rao <[email protected]> Signed-off-by: Christopher Rauer <[email protected]> Signed-off-by: Kang Luwei <[email protected]> Signed-off-by: Xiao Guangrong <[email protected]> Signed-off-by: Wu Hao <[email protected]> Acked-by: Alan Tull <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Documentation/ABI/testing/sysfs-platform-dfl-fme
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Documentation/ABI/testing/sysfs-platform-dfl-fme
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What: /sys/bus/platform/devices/dfl-fme.0/ports_num
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Date: June 2018
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KernelVersion: 4.19
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Contact: Wu Hao <[email protected]>
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Description: Read-only. One DFL FPGA device may have more than 1
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port/Accelerator Function Unit (AFU). It returns the
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number of ports on the FPGA device when read it.
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What: /sys/bus/platform/devices/dfl-fme.0/bitstream_id
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Date: June 2018
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KernelVersion: 4.19
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Contact: Wu Hao <[email protected]>
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Description: Read-only. It returns Bitstream (static FPGA region)
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identifier number, which includes the detailed version
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and other information of this static FPGA region.
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What: /sys/bus/platform/devices/dfl-fme.0/bitstream_metadata
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Date: June 2018
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KernelVersion: 4.19
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Contact: Wu Hao <[email protected]>
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Description: Read-only. It returns Bitstream (static FPGA region) meta
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data, which includes the synthesis date, seed and other
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information of this static FPGA region.
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