mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: SoC cleanups for 3.16
Cleanups for 3.16. Among these are:
- A bunch of misc cleanups for Broadcom platforms, mostly housekeeping
- Enabling Common Clock Framework on the older s3c24xx Samsung chipsets
- Cleanup of the Versatile Express system controller code, moving it to syscon
- Power management cleanups for OMAP platforms
+ a handful of other cleanups across the place
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Merge tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC cleanups from Olof Johansson:
"Cleanups for 3.16. Among these are:
- a bunch of misc cleanups for Broadcom platforms, mostly
housekeeping
- enabling Common Clock Framework on the older s3c24xx Samsung
chipsets
- cleanup of the Versatile Express system controller code, moving it
to syscon
- power management cleanups for OMAP platforms
plus a handful of other cleanups across the place"
* tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
ARM: kconfig: allow PCI support to be selected with ARCH_MULTIPLATFORM
clk: samsung: fix build error
ARM: vexpress: refine dependencies for new code
clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
ARM: OMAP2+: PRCM: cleanup some header includes
...
This commit is contained in:
commit
0a58471541
211 changed files with 4666 additions and 5172 deletions
62
include/dt-bindings/clock/s3c2410.h
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62
include/dt-bindings/clock/s3c2410.h
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@ -0,0 +1,62 @@
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/*
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* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Device Tree binding constants clock controllers of Samsung S3C2410 and later.
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*/
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#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
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#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
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/*
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* Let each exported clock get a unique index, which is used on DT-enabled
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* platforms to lookup the clock from a clock specifier. These indices are
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* therefore considered an ABI and so must not be changed. This implies
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* that new clocks should be added either in free spaces between clock groups
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* or at the end.
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*/
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/* Core clocks. */
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/* id 1 is reserved */
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#define MPLL 2
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#define UPLL 3
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#define FCLK 4
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#define HCLK 5
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#define PCLK 6
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#define UCLK 7
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#define ARMCLK 8
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/* pclk-gates */
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#define PCLK_UART0 16
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#define PCLK_UART1 17
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#define PCLK_UART2 18
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#define PCLK_I2C 19
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#define PCLK_SDI 20
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#define PCLK_SPI 21
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#define PCLK_ADC 22
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#define PCLK_AC97 23
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#define PCLK_I2S 24
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#define PCLK_PWM 25
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#define PCLK_RTC 26
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#define PCLK_GPIO 27
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/* hclk-gates */
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#define HCLK_LCD 32
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#define HCLK_USBH 33
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#define HCLK_USBD 34
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#define HCLK_NAND 35
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#define HCLK_CAM 36
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#define CAMIF 40
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/* Total number of clocks. */
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#define NR_CLKS (CAMIF + 1)
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#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */
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73
include/dt-bindings/clock/s3c2412.h
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73
include/dt-bindings/clock/s3c2412.h
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@ -0,0 +1,73 @@
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/*
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* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Device Tree binding constants clock controllers of Samsung S3C2412.
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*/
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#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
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#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
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/*
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* Let each exported clock get a unique index, which is used on DT-enabled
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* platforms to lookup the clock from a clock specifier. These indices are
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* therefore considered an ABI and so must not be changed. This implies
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* that new clocks should be added either in free spaces between clock groups
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* or at the end.
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*/
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/* Core clocks. */
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/* id 1 is reserved */
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#define MPLL 2
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#define UPLL 3
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#define MDIVCLK 4
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#define MSYSCLK 5
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#define USYSCLK 6
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#define HCLK 7
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#define PCLK 8
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#define ARMDIV 9
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#define ARMCLK 10
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/* Special clocks */
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#define SCLK_CAM 16
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#define SCLK_UART 17
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#define SCLK_I2S 18
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#define SCLK_USBD 19
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#define SCLK_USBH 20
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/* pclk-gates */
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#define PCLK_WDT 32
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#define PCLK_SPI 33
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#define PCLK_I2S 34
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#define PCLK_I2C 35
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#define PCLK_ADC 36
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#define PCLK_RTC 37
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#define PCLK_GPIO 38
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#define PCLK_UART2 39
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#define PCLK_UART1 40
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#define PCLK_UART0 41
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#define PCLK_SDI 42
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#define PCLK_PWM 43
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#define PCLK_USBD 44
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/* hclk-gates */
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#define HCLK_HALF 48
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#define HCLK_X2 49
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#define HCLK_SDRAM 50
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#define HCLK_USBH 51
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#define HCLK_LCD 52
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#define HCLK_NAND 53
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#define HCLK_DMA3 54
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#define HCLK_DMA2 55
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#define HCLK_DMA1 56
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#define HCLK_DMA0 57
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/* Total number of clocks. */
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#define NR_CLKS (HCLK_DMA0 + 1)
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#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H */
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92
include/dt-bindings/clock/s3c2443.h
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92
include/dt-bindings/clock/s3c2443.h
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@ -0,0 +1,92 @@
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/*
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* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Device Tree binding constants clock controllers of Samsung S3C2443 and later.
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*/
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#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
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#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
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/*
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* Let each exported clock get a unique index, which is used on DT-enabled
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* platforms to lookup the clock from a clock specifier. These indices are
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* therefore considered an ABI and so must not be changed. This implies
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* that new clocks should be added either in free spaces between clock groups
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* or at the end.
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*/
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/* Core clocks. */
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#define MSYSCLK 1
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#define ESYSCLK 2
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#define ARMDIV 3
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#define ARMCLK 4
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#define HCLK 5
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#define PCLK 6
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/* Special clocks */
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#define SCLK_HSSPI0 16
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#define SCLK_FIMD 17
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#define SCLK_I2S0 18
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#define SCLK_I2S1 19
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#define SCLK_HSMMC1 20
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#define SCLK_HSMMC_EXT 21
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#define SCLK_CAM 22
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#define SCLK_UART 23
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#define SCLK_USBH 24
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/* Muxes */
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#define MUX_HSSPI0 32
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#define MUX_HSSPI1 33
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#define MUX_HSMMC0 34
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#define MUX_HSMMC1 35
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/* hclk-gates */
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#define HCLK_DMA0 48
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#define HCLK_DMA1 49
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#define HCLK_DMA2 50
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#define HCLK_DMA3 51
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#define HCLK_DMA4 52
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#define HCLK_DMA5 53
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#define HCLK_DMA6 54
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#define HCLK_DMA7 55
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#define HCLK_CAM 56
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#define HCLK_LCD 57
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#define HCLK_USBH 58
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#define HCLK_USBD 59
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#define HCLK_IROM 60
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#define HCLK_HSMMC0 61
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#define HCLK_HSMMC1 62
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#define HCLK_CFC 63
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#define HCLK_SSMC 64
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#define HCLK_DRAM 65
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#define HCLK_2D 66
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/* pclk-gates */
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#define PCLK_UART0 72
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#define PCLK_UART1 73
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#define PCLK_UART2 74
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#define PCLK_UART3 75
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#define PCLK_I2C0 76
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#define PCLK_SDI 77
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#define PCLK_SPI0 78
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#define PCLK_ADC 79
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#define PCLK_AC97 80
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#define PCLK_I2S0 81
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#define PCLK_PWM 82
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#define PCLK_WDT 83
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#define PCLK_RTC 84
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#define PCLK_GPIO 85
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#define PCLK_SPI1 86
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#define PCLK_CHIPID 87
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#define PCLK_I2C1 88
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#define PCLK_I2S1 89
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#define PCLK_PCM 90
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/* Total number of clocks. */
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#define NR_CLKS (PCLK_PCM + 1)
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#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */
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