From 353e99f554ea0b9c7be530ca5e42a66e4be3775c Mon Sep 17 00:00:00 2001 From: Urvashi Agrawal Date: Tue, 18 Feb 2020 13:28:19 -0800 Subject: [PATCH] msm: kgsl: Initialize LPAC registers Some LPAC registers need to be initialized during boot to avoid any LPAC side glitches at the time when GC is processing SET_SECURE packets. Change-Id: Id5ace195cb2e42fdd1661b04a40d3385cbce5635 Signed-off-by: Urvashi Agrawal --- drivers/gpu/msm/a6xx_reg.h | 5 +++++ drivers/gpu/msm/adreno_a6xx.c | 8 ++++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/gpu/msm/a6xx_reg.h b/drivers/gpu/msm/a6xx_reg.h index 81394936b249..7b7d161c7f9f 100644 --- a/drivers/gpu/msm/a6xx_reg.h +++ b/drivers/gpu/msm/a6xx_reg.h @@ -118,6 +118,11 @@ #define A6XX_CP_APERTURE_CNTL_CD 0xA03 #define A6XX_VSC_ADDR_MODE_CNTL 0xC01 +/* LPAC registers */ +#define A6XX_CP_LPAC_ROQ_THRESHOLDS_1 0xB32 +#define A6XX_CP_LPAC_ROQ_THRESHOLDS_2 0xB33 +#define A6XX_CP_LPAC_PROG_FIFO_SIZE 0xB34 + /* RBBM registers */ #define A6XX_RBBM_INT_0_STATUS 0x201 #define A6XX_RBBM_STATUS 0x210 diff --git a/drivers/gpu/msm/adreno_a6xx.c b/drivers/gpu/msm/adreno_a6xx.c index 507bc290a6a9..6dcbea9f5a84 100644 --- a/drivers/gpu/msm/adreno_a6xx.c +++ b/drivers/gpu/msm/adreno_a6xx.c @@ -445,6 +445,14 @@ static void a6xx_start(struct adreno_device *adreno_dev) kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_1, 0x8040362C); } + if (adreno_is_a660(adreno_dev)) { + kgsl_regwrite(device, A6XX_CP_LPAC_ROQ_THRESHOLDS_2, + 0x00800060); + kgsl_regwrite(device, A6XX_CP_LPAC_ROQ_THRESHOLDS_1, + 0x40202016); + kgsl_regwrite(device, A6XX_CP_LPAC_PROG_FIFO_SIZE, 0x00000080); + } + if (adreno_is_a612(adreno_dev) || adreno_is_a610(adreno_dev)) { /* For A612 and A610 Mem pool size is reduced to 48 */ kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 48);