Merge "ARM: dts: msm: Add I2C devicetree node of NFC for lahaina"

This commit is contained in:
qctecmdr 2020-05-18 03:55:09 -07:00 • committed by Gerrit - the friendly Code Review server
commit 0b5be2fc98
4 changed files with 99 additions and 0 deletions

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@ -207,4 +207,27 @@
status = "ok"
};
&qupv3_se15_i2c {
status = "ok"
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 87 0x00>;
qcom,sn-ven = <&tlmm 62 0x00>;
qcom,sn-firm = <&tlmm 86 0x00>;
qcom,sn-clkreq = <&tlmm 63 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <87 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active &nfc_fwdl_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend &nfc_fwdl_suspend>;
};
};
#include "camera/lahaina-camera-sensor-cdp.dtsi"

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@ -170,4 +170,27 @@
status = "ok"
};
&qupv3_se15_i2c {
status = "ok"
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 87 0x00>;
qcom,sn-ven = <&tlmm 62 0x00>;
qcom,sn-firm = <&tlmm 86 0x00>;
qcom,sn-clkreq = <&tlmm 63 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <87 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active &nfc_fwdl_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend &nfc_fwdl_suspend>;
};
};
#include "camera/lahaina-camera-sensor-mtp.dtsi"

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@ -381,6 +381,36 @@
};
nfc {
nfc_int_active: nfc_int_active {
/* active state */
mux {
/* GPIO 87 NFC Read Interrupt */
pins = "gpio87";
function = "gpio";
};
config {
pins = "gpio87";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_int_suspend: nfc_int_suspend {
/* sleep state */
mux {
/* GPIO 87 NFC Read Interrupt */
pins = "gpio87";
function = "gpio";
};
config {
pins = "gpio87";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_enable_active: nfc_enable_active {
mux {
pins = "gpio62";

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@ -234,3 +234,26 @@
0x3 0x3 0x3 0x3>;
};
};
&qupv3_se15_i2c {
status = "ok"
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 87 0x00>;
qcom,sn-ven = <&tlmm 62 0x00>;
qcom,sn-firm = <&tlmm 86 0x00>;
qcom,sn-clkreq = <&tlmm 63 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <87 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active &nfc_fwdl_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend &nfc_fwdl_suspend>;
};
};