mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 08:36:12 -04:00
Merge "fw-api: CL 7552008 - update fw common interface files"
This commit is contained in:
commit
0bd34e8f97
7 changed files with 1301 additions and 21 deletions
896
fw/htt.h
896
fw/htt.h
|
|
@ -186,9 +186,14 @@
|
|||
* 3.66 Add HTT_T2H_MSG_TYPE_TX_OFFLOAD_DELIVER_IND msg.
|
||||
* Add PKT_CAPTURE_MODE flag within HTT_T2H TX_I_ORD_PADDR_IND msg.
|
||||
* 3.67 Add drop threshold field to HTT_H2T RX_RING_SELECTION_CFG msg.
|
||||
* 3.68 Add ipa_drop threshold fields to HTT_H2T_MSG_TYPE_SRING_SETUP
|
||||
* 3.69 Add htt_ul_ofdma_user_info_v0 defs
|
||||
* 3.70 Add AST1-AST3 fields to HTT_T2H PEER_MAP_V2 msg
|
||||
* 3.71 Add rx offload engine / flow search engine htt setup message defs for
|
||||
* HTT_H2T_MSG_TYPE_RX_FSE_SETUP_CFG, HTT_H2T_MSG_TYPE_RX_FSE_OPERATION_CFG
|
||||
*/
|
||||
#define HTT_CURRENT_VERSION_MAJOR 3
|
||||
#define HTT_CURRENT_VERSION_MINOR 68
|
||||
#define HTT_CURRENT_VERSION_MINOR 71
|
||||
|
||||
#define HTT_NUM_TX_FRAG_DESC 1024
|
||||
|
||||
|
|
@ -527,6 +532,8 @@ enum htt_h2t_msg_type {
|
|||
HTT_H2T_MSG_TYPE_RFS_CONFIG = 0xf,
|
||||
HTT_H2T_MSG_TYPE_EXT_STATS_REQ = 0x10,
|
||||
HTT_H2T_MSG_TYPE_PPDU_STATS_CFG = 0x11,
|
||||
HTT_H2T_MSG_TYPE_RX_FSE_SETUP_CFG = 0x12,
|
||||
HTT_H2T_MSG_TYPE_RX_FSE_OPERATION_CFG = 0x13,
|
||||
|
||||
/* keep this last */
|
||||
HTT_H2T_NUM_MSGS
|
||||
|
|
@ -4299,9 +4306,9 @@ PREPACK struct htt_wdi_ipa_op_request_t
|
|||
* setup message
|
||||
*
|
||||
* The message would appear as follows:
|
||||
* |31 24|23 20|19|18 16|15|14 8|7 0|
|
||||
* |--------------- +-----------------+----------------+------------------|
|
||||
* | ring_type | ring_id | pdev_id | msg_type |
|
||||
* |31 24|23 21|20|19|18 16|15|14 8|7 0|
|
||||
* |--------------- +-----------------+-----------------+-----------------|
|
||||
* | ring_type | ring_id | pdev_id | msg_type |
|
||||
* |----------------------------------------------------------------------|
|
||||
* | ring_base_addr_lo |
|
||||
* |----------------------------------------------------------------------|
|
||||
|
|
@ -4325,12 +4332,15 @@ PREPACK struct htt_wdi_ipa_op_request_t
|
|||
* |----------------------------------------------------------------------|
|
||||
* | intr_timer_th |IM| intr_batch_counter_th |
|
||||
* |----------------------------------------------------------------------|
|
||||
* | reserved |RR|PTCF| intr_low_threshold |
|
||||
* | reserved |ID|RR| PTCF| intr_low_threshold |
|
||||
* |----------------------------------------------------------------------|
|
||||
* | reserved |IPA drop thres hi|IPA drop thres lo|
|
||||
* |----------------------------------------------------------------------|
|
||||
* Where
|
||||
* IM = sw_intr_mode
|
||||
* RR = response_required
|
||||
* PTCF = prefetch_timer_cfg
|
||||
* IP = IPA drop flag
|
||||
*
|
||||
* The message is interpreted as follows:
|
||||
* dword0 - b'0:7 - msg_type: This will be set to
|
||||
|
|
@ -5820,6 +5830,466 @@ PREPACK struct htt_rx_ring_selection_cfg_t {
|
|||
((_var) |= ((_val) << HTT_H2T_PPDU_STATS_CFG_TLV_BITMASK_S)); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief Host-->target HTT RX FSE setup message
|
||||
* @details
|
||||
* Through this message, the host will provide details of the flow tables
|
||||
* in host DDR along with hash keys.
|
||||
* This message can be sent per SOC or per PDEV, which is differentiated
|
||||
* by pdev id values.
|
||||
* The host will allocate flow search table and sends table size,
|
||||
* physical DMA address of flow table, and hash keys to firmware to
|
||||
* program into the RXOLE FSE HW block.
|
||||
*
|
||||
* The following field definitions describe the format of the RX FSE setup
|
||||
* message sent from the host to target
|
||||
*
|
||||
* Header fields:
|
||||
* dword0 - b'7:0 - msg_type: This will be set to
|
||||
* HTT_H2T_MSG_TYPE_RX_FSE_SETUP_CFG
|
||||
* b'15:8 - pdev_id: 0 indicates msg is for all LMAC rings, i.e. soc
|
||||
* 1, 2, 3 indicates pdev_id 0,1,2 and the msg is for that
|
||||
* pdev's LMAC ring.
|
||||
* b'31:16 - reserved : Reserved for future use
|
||||
* dword1 - b'19:0 - number of records: This field indicates the number of
|
||||
* entries in the flow table. For example: 8k number of
|
||||
* records is equivalent to
|
||||
* 8 * 1024 * sizeof(RX_FLOW_SEARCH_ENTRY_STRUCT)
|
||||
* b'27:20 - max search: This field specifies the skid length to FSE
|
||||
* parser HW module whenever match is not found at the
|
||||
* exact index pointed by hash.
|
||||
* b'29:28 - ip_da_sa: This indicates which IPV4-IPV6 RFC to be used.
|
||||
* Refer htt_ip_da_sa_prefix below for more details.
|
||||
* b'31:30 - reserved: Reserved for future use
|
||||
* dword2 - b'31:0 - base address lo: Lower 4 bytes base address of flow
|
||||
* table allocated by host in DDR
|
||||
* dword3 - b'31:0 - base address hi: Higher 4 bytes of base address of flow
|
||||
* table allocated by host in DDR
|
||||
* dword4:13 - b'31:0 - Toeplitz: 315 bits of Toeplitz keys for flow table
|
||||
* entry hashing
|
||||
*
|
||||
*
|
||||
* |31 30|29 28|27|26|25 20|19 16|15 8|7 0|
|
||||
* |---------------------------------------------------------------|
|
||||
* | reserved | pdev_id | MSG_TYPE |
|
||||
* |---------------------------------------------------------------|
|
||||
* |resvd|IPDSA| max_search | Number of records |
|
||||
* |---------------------------------------------------------------|
|
||||
* | base address lo |
|
||||
* |---------------------------------------------------------------|
|
||||
* | base address high |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 31_0 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 63_32 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 95_64 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 127_96 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 159_128 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 191_160 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 223_192 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 255_224 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | toeplitz key 287_256 |
|
||||
* |---------------------------------------------------------------|
|
||||
* | reserved | toeplitz key 314_288(26:0 bits) |
|
||||
* |---------------------------------------------------------------|
|
||||
* where:
|
||||
* IPDSA = ip_da_sa
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief: htt_ip_da_sa_prefix
|
||||
* 0x0 -> Prefix is 0x20010db8_00000000_00000000
|
||||
* IPv6 addresses beginning with 0x20010db8 are reserved for
|
||||
* documentation per RFC3849
|
||||
* 0x1 -> Prefix is 0x00000000_00000000_0000ffff RFC4291 IPv4-mapped IPv6
|
||||
* 0x2 -> Prefix is 0x0 RFC4291 IPv4-compatible IPv6
|
||||
* 0x3 -> Prefix is 0x0064ff9b_00000000_00000000 RFC6052 well-known prefix
|
||||
*/
|
||||
|
||||
enum htt_ip_da_sa_prefix {
|
||||
HTT_RX_IPV6_20010db8,
|
||||
HTT_RX_IPV4_MAPPED_IPV6,
|
||||
HTT_RX_IPV4_COMPATIBLE_IPV6,
|
||||
HTT_RX_IPV6_64FF9B,
|
||||
};
|
||||
|
||||
PREPACK struct htt_h2t_msg_rx_fse_setup_t {
|
||||
A_UINT32 msg_type:8, /* HTT_H2T_MSG_TYPE_RX_FSE_SETUP_CFG */
|
||||
pdev_id:8,
|
||||
reserved0:16;
|
||||
A_UINT32 num_records:20,
|
||||
max_search:8,
|
||||
ip_da_sa:2, /* htt_ip_da_sa_prefix enumeration */
|
||||
reserved1:2;
|
||||
A_UINT32 base_addr_lo;
|
||||
A_UINT32 base_addr_hi;
|
||||
A_UINT32 toeplitz31_0;
|
||||
A_UINT32 toeplitz63_32;
|
||||
A_UINT32 toeplitz95_64;
|
||||
A_UINT32 toeplitz127_96;
|
||||
A_UINT32 toeplitz159_128;
|
||||
A_UINT32 toeplitz191_160;
|
||||
A_UINT32 toeplitz223_192;
|
||||
A_UINT32 toeplitz255_224;
|
||||
A_UINT32 toeplitz287_256;
|
||||
A_UINT32 toeplitz314_288:27,
|
||||
reserved2:5;
|
||||
} POSTPACK;
|
||||
|
||||
#define HTT_RX_FSE_SETUP_SZ (sizeof(struct htt_h2t_msg_rx_fse_setup_t))
|
||||
#define HTT_RX_FSE_OPERATION_SZ (sizeof(struct htt_h2t_msg_rx_fse_operation_t))
|
||||
|
||||
#define HTT_RX_FSE_SETUP_HASH_314_288_M 0x07ffffff
|
||||
#define HTT_RX_FSE_SETUP_HASH_314_288_S 0
|
||||
|
||||
/* DWORD 0: Pdev ID */
|
||||
#define HTT_RX_FSE_SETUP_PDEV_ID_M 0x0000ff00
|
||||
#define HTT_RX_FSE_SETUP_PDEV_ID_S 8
|
||||
#define HTT_RX_FSE_SETUP_PDEV_ID_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_PDEV_ID_M) >> \
|
||||
HTT_RX_FSE_SETUP_PDEV_ID_S)
|
||||
#define HTT_RX_FSE_SETUP_PDEV_ID_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_PDEV_ID, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_PDEV_ID_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 1:num of records */
|
||||
#define HTT_RX_FSE_SETUP_NUM_REC_M 0x000fffff
|
||||
#define HTT_RX_FSE_SETUP_NUM_REC_S 0
|
||||
#define HTT_RX_FSE_SETUP_NUM_REC_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_NUM_REC_M) >> \
|
||||
HTT_RX_FSE_SETUP_NUM_REC_S)
|
||||
#define HTT_RX_FSE_SETUP_NUM_REC_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_NUM_REC, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_NUM_REC_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 1:max_search */
|
||||
#define HTT_RX_FSE_SETUP_MAX_SEARCH_M 0x0ff00000
|
||||
#define HTT_RX_FSE_SETUP_MAX_SEARCH_S 20
|
||||
#define HTT_RX_FSE_SETUP_MAX_SEARCH_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_MAX_SEARCH_M) >> \
|
||||
HTT_RX_FSE_SETUP_MAX_SEARCH_S)
|
||||
#define HTT_RX_FSE_SETUP_MAX_SEARCH_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_MAX_SEARCH, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_MAX_SEARCH_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 1:ip_da_sa prefix */
|
||||
#define HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX_M 0x30000000
|
||||
#define HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX_S 28
|
||||
#define HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX_M) >> \
|
||||
HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX_S)
|
||||
#define HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_IP_DA_SA_PREFIX_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 2: Base Address LO */
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_LO_M 0xffffffff
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_LO_S 0
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_LO_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_BASE_ADDR_LO_M) >> \
|
||||
HTT_RX_FSE_SETUP_BASE_ADDR_LO_S)
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_LO_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_BASE_ADDR_LO, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_BASE_ADDR_LO_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 3: Base Address High */
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_HI_M 0xffffffff
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_HI_S 0
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_HI_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_BASE_ADDR_HI_M) >> \
|
||||
HTT_RX_FSE_SETUP_BASE_ADDR_HI_S)
|
||||
#define HTT_RX_FSE_SETUP_BASE_ADDR_HI_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_BASE_ADDR_HI, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_BASE_ADDR_HI_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 4-12: Hash Value */
|
||||
#define HTT_RX_FSE_SETUP_HASH_VALUE_M 0xffffffff
|
||||
#define HTT_RX_FSE_SETUP_HASH_VALUE_S 0
|
||||
#define HTT_RX_FSE_SETUP_HASH_VALUE_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_HASH_VALUE_M) >> \
|
||||
HTT_RX_FSE_SETUP_HASH_VALUE_S)
|
||||
#define HTT_RX_FSE_SETUP_HASH_VALUE_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_HASH_VALUE, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_HASH_VALUE_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 13: Hash Value 314:288 bits */
|
||||
#define HTT_RX_FSE_SETUP_HASH_314_288_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_SETUP_HASH_314_288_M) >> \
|
||||
HTT_RX_FSE_SETUP_HASH_314_288_S)
|
||||
#define HTT_RX_FSE_SETUP_HASH_314_288_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SETUP_HASH_314_288, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_SETUP_HASH_314_288_S)); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief Host-->target HTT RX FSE operation message
|
||||
* @details
|
||||
* The host will send this Flow Search Engine (FSE) operation message for
|
||||
* every flow add/delete operation.
|
||||
* The FSE operation includes FSE full cache invalidation or individual entry
|
||||
* invalidation.
|
||||
* This message can be sent per SOC or per PDEV which is differentiated
|
||||
* by pdev id values.
|
||||
*
|
||||
* |31 16|15 8|7 1|0|
|
||||
* |-------------------------------------------------------------|
|
||||
* | reserved | pdev_id | MSG_TYPE |
|
||||
* |-------------------------------------------------------------|
|
||||
* | reserved | operation |I|
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_src_addr_31_0 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_src_addr_63_32 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_src_addr_95_64 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_src_addr_127_96 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_dst_addr_31_0 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_dst_addr_63_32 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_dst_addr_95_64 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | ip_dst_addr_127_96 |
|
||||
* |-------------------------------------------------------------|
|
||||
* | l4_dst_port | l4_src_port |
|
||||
* | (32-bit SPI incase of IPsec) |
|
||||
* |-------------------------------------------------------------|
|
||||
* | reserved | l4_proto |
|
||||
* |-------------------------------------------------------------|
|
||||
*
|
||||
* where I is 1-bit ipsec_valid.
|
||||
*
|
||||
* The following field definitions describe the format of the RX FSE operation
|
||||
* message sent from the host to target for every add/delete flow entry to flow
|
||||
* table.
|
||||
*
|
||||
* Header fields:
|
||||
* dword0 - b'7:0 - msg_type: This will be set to
|
||||
* HTT_H2T_MSG_TYPE_RX_FSE_OPERATION_CFG
|
||||
* b'15:8 - pdev_id: 0 indicates msg is for all LMAC rings, i.e. soc
|
||||
* 1, 2, 3 indicates pdev_id 0,1,2 and the msg is for the
|
||||
* specified pdev's LMAC ring.
|
||||
* b'31:16 - reserved : Reserved for future use
|
||||
* dword1 - b'0 - ipsec_valid: This indicates protocol IP or IPsec
|
||||
* (Internet Protocol Security).
|
||||
* IPsec describes the framework for providing security at
|
||||
* IP layer. IPsec is defined for both versions of IP:
|
||||
* IPV4 and IPV6.
|
||||
* Please refer to htt_rx_flow_proto enumeration below for
|
||||
* more info.
|
||||
* ipsec_valid = 1 for IPSEC packets
|
||||
* ipsec_valid = 0 for IP Packets
|
||||
* b'7:1 - operation: This indicates types of FSE operation.
|
||||
* Refer to htt_rx_fse_operation enumeration:
|
||||
* 0 - No Cache Invalidation required
|
||||
* 1 - Cache invalidate only one entry given by IP
|
||||
* src/dest address at DWORD[2:9]
|
||||
* 2 - Complete FSE Cache Invalidation
|
||||
* 3 - FSE Disable
|
||||
* 4 - FSE Enable
|
||||
* b'31:8 - reserved: Reserved for future use
|
||||
* dword2:9-b'31:0 - IP src/dest: IPV4/IPV6 source and destination address
|
||||
* for per flow addition/deletion
|
||||
* For IPV4 src/dest addresses, the first A_UINT32 is used
|
||||
* and the subsequent 3 A_UINT32 will be padding bytes.
|
||||
* For IPV6 src/dest Addresses, all A_UINT32 are used.
|
||||
* dword10 -b'31:0 - L4 src port (15:0): 16-bit Source Port numbers range
|
||||
* from 0 to 65535 but only 0 to 1023 are designated as
|
||||
* well-known ports. Refer to [RFC1700] for more details.
|
||||
* This field is valid only if
|
||||
* (valid_ip_proto(l4_proto) && (ipsec_valid == 0))
|
||||
* - L4 dest port (31:16): 16-bit Destination Port numbers
|
||||
* range from 0 to 65535 but only 0 to 1023 are designated
|
||||
* as well-known ports. Refer to [RFC1700] for more details.
|
||||
* This field is valid only if
|
||||
* (valid_ip_proto(l4_proto) && (ipsec_valid == 0))
|
||||
* - SPI (31:0): Security Parameters Index is an
|
||||
* identification tag added to the header while using IPsec
|
||||
* for tunneling the IP traffici.
|
||||
* Valid only if IPSec_valid bit (in DWORD1) is set to 1.
|
||||
* dword11 -b'7:0 - l4_proto: This carries L4 protocol numbers, which are
|
||||
* Assigned Internet Protocol Numbers.
|
||||
* l4_proto numbers for standard protocol like UDP/TCP
|
||||
* protocol at l4 layer, e.g. l4_proto = 6 for TCP,
|
||||
* l4_proto = 17 for UDP etc.
|
||||
* b'31:8 - reserved: Reserved for future use.
|
||||
*
|
||||
*/
|
||||
|
||||
PREPACK struct htt_h2t_msg_rx_fse_operation_t {
|
||||
A_UINT32 msg_type:8,
|
||||
pdev_id:8,
|
||||
reserved0:16;
|
||||
A_UINT32 ipsec_valid:1,
|
||||
operation:7,
|
||||
reserved1:24;
|
||||
A_UINT32 ip_src_addr_31_0;
|
||||
A_UINT32 ip_src_addr_63_32;
|
||||
A_UINT32 ip_src_addr_95_64;
|
||||
A_UINT32 ip_src_addr_127_96;
|
||||
A_UINT32 ip_dest_addr_31_0;
|
||||
A_UINT32 ip_dest_addr_63_32;
|
||||
A_UINT32 ip_dest_addr_95_64;
|
||||
A_UINT32 ip_dest_addr_127_96;
|
||||
union {
|
||||
A_UINT32 spi;
|
||||
struct {
|
||||
A_UINT32 l4_src_port:16,
|
||||
l4_dest_port:16;
|
||||
} ip;
|
||||
} u;
|
||||
A_UINT32 l4_proto:8,
|
||||
reserved:24;
|
||||
} POSTPACK;
|
||||
|
||||
/**
|
||||
* Enumeration for IP Protocol or IPSEC Protocol
|
||||
* IPsec describes the framework for providing security at IP layer.
|
||||
* IPsec is defined for both versions of IP: IPV4 and IPV6.
|
||||
*/
|
||||
enum htt_rx_flow_proto {
|
||||
HTT_RX_FLOW_IP_PROTO,
|
||||
HTT_RX_FLOW_IPSEC_PROTO,
|
||||
};
|
||||
|
||||
/**
|
||||
* Enumeration for FSE Cache Invalidation
|
||||
* 0 - No Cache Invalidation required
|
||||
* 1 - Cache invalidate only one entry given by IP src/dest address at DWORD2:9
|
||||
* 2 - Complete FSE Cache Invalidation
|
||||
* 3 - FSE Disable
|
||||
* 4 - FSE Enable
|
||||
*/
|
||||
enum htt_rx_fse_operation {
|
||||
HTT_RX_FSE_CACHE_INVALIDATE_NONE,
|
||||
HTT_RX_FSE_CACHE_INVALIDATE_ENTRY,
|
||||
HTT_RX_FSE_CACHE_INVALIDATE_FULL,
|
||||
HTT_RX_FSE_DISABLE,
|
||||
HTT_RX_FSE_ENABLE,
|
||||
};
|
||||
|
||||
/* DWORD 0: Pdev ID */
|
||||
#define HTT_RX_FSE_OPERATION_PDEV_ID_M 0x0000ff00
|
||||
#define HTT_RX_FSE_OPERATION_PDEV_ID_S 8
|
||||
#define HTT_RX_FSE_OPERATION_PDEV_ID_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_OPERATION_PDEV_ID_M) >> \
|
||||
HTT_RX_FSE_OPERATION_PDEV_ID_S)
|
||||
#define HTT_RX_FSE_OPERATION_PDEV_ID_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_OPERATION_PDEV_ID, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_OPERATION_PDEV_ID_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 1:IP PROTO or IPSEC */
|
||||
#define HTT_RX_FSE_IPSEC_VALID_M 0x00000001
|
||||
#define HTT_RX_FSE_IPSEC_VALID_S 0
|
||||
|
||||
#define HTT_RX_FSE_IPSEC_VALID_SET(word, ipsec_valid) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_IPSEC_VALID, ipsec_valid); \
|
||||
(word) |= ((ipsec_valid) << HTT_RX_FSE_IPSEC_VALID_S); \
|
||||
} while (0)
|
||||
#define HTT_RX_FSE_IPSEC_VALID_GET(word) \
|
||||
(((word) & HTT_RX_FSE_IPSEC_VALID_M) >> HTT_RX_FSE_IPSEC_VALID_S)
|
||||
|
||||
/* DWORD 1:FSE Operation */
|
||||
#define HTT_RX_FSE_OPERATION_M 0x000000fe
|
||||
#define HTT_RX_FSE_OPERATION_S 1
|
||||
|
||||
#define HTT_RX_FSE_OPERATION_SET(word, op_val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_OPERATION, op_val); \
|
||||
(word) |= ((op_val) << HTT_RX_FSE_OPERATION_S); \
|
||||
} while (0)
|
||||
#define HTT_RX_FSE_OPERATION_GET(word) \
|
||||
(((word) & HTT_RX_FSE_OPERATION_M) >> HTT_RX_FSE_OPERATION_S)
|
||||
|
||||
/* DWORD 2-9:IP Address */
|
||||
#define HTT_RX_FSE_OPERATION_IP_ADDR_M 0xffffffff
|
||||
#define HTT_RX_FSE_OPERATION_IP_ADDR_S 0
|
||||
#define HTT_RX_FSE_OPERATION_IP_ADDR_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_OPERATION_IP_ADDR_M) >> \
|
||||
HTT_RX_FSE_OPERATION_IP_ADDR_S)
|
||||
#define HTT_RX_FSE_OPERATION_IP_ADDR_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_OPERATION_IP_ADDR, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_OPERATION_IP_ADDR_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 10:Source Port Number */
|
||||
#define HTT_RX_FSE_SOURCEPORT_M 0x0000ffff
|
||||
#define HTT_RX_FSE_SOURCEPORT_S 0
|
||||
|
||||
#define HTT_RX_FSE_SOURCEPORT_SET(word, sport) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_SOURCEPORT, sport); \
|
||||
(word) |= ((sport) << HTT_RX_FSE_SOURCEPORT_S); \
|
||||
} while (0)
|
||||
#define HTT_RX_FSE_SOURCEPORT_GET(word) \
|
||||
(((word) & HTT_RX_FSE_SOURCEPORT_M) >> HTT_RX_FSE_SOURCEPORT_S)
|
||||
|
||||
|
||||
/* DWORD 11:Destination Port Number */
|
||||
#define HTT_RX_FSE_DESTPORT_M 0xffff0000
|
||||
#define HTT_RX_FSE_DESTPORT_S 16
|
||||
|
||||
#define HTT_RX_FSE_DESTPORT_SET(word, dport) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_DESTPORT, dport); \
|
||||
(word) |= ((dport) << HTT_RX_FSE_DESTPORT_S); \
|
||||
} while (0)
|
||||
#define HTT_RX_FSE_DESTPORT_GET(word) \
|
||||
(((word) & HTT_RX_FSE_DESTPORT_M) >> HTT_RX_FSE_DESTPORT_S)
|
||||
|
||||
/* DWORD 10-11:SPI (In case of IPSEC) */
|
||||
#define HTT_RX_FSE_OPERATION_SPI_M 0xffffffff
|
||||
#define HTT_RX_FSE_OPERATION_SPI_S 0
|
||||
#define HTT_RX_FSE_OPERATION_SPI_GET(_var) \
|
||||
(((_var) & HTT_RX_FSE_OPERATION_SPI_ADDR_M) >> \
|
||||
HTT_RX_FSE_OPERATION_SPI_ADDR_S)
|
||||
#define HTT_RX_FSE_OPERATION_SPI_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_OPERATION_SPI, _val); \
|
||||
((_var) |= ((_val) << HTT_RX_FSE_OPERATION_SPI_S)); \
|
||||
} while (0)
|
||||
|
||||
/* DWORD 12:L4 PROTO */
|
||||
#define HTT_RX_FSE_L4_PROTO_M 0x000000ff
|
||||
#define HTT_RX_FSE_L4_PROTO_S 0
|
||||
|
||||
#define HTT_RX_FSE_L4_PROTO_SET(word, proto_val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_FSE_L4_PROTO, proto_val); \
|
||||
(word) |= ((proto_val) << HTT_RX_FSE_L4_PROTO_S); \
|
||||
} while (0)
|
||||
#define HTT_RX_FSE_L4_PROTO_GET(word) \
|
||||
(((word) & HTT_RX_FSE_L4_PROTO_M) >> HTT_RX_FSE_L4_PROTO_S)
|
||||
|
||||
|
||||
|
||||
/*=== target -> host messages ===============================================*/
|
||||
|
||||
|
|
@ -7967,7 +8437,8 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
|
|||
* to identify which peer the frame needs to be forwarded to (i.e. the
|
||||
* peer assocated with the Destination MAC Address within the packet),
|
||||
* and particularly which vdev needs to transmit the frame (for cases
|
||||
* of inter-vdev rx --> tx forwarding).
|
||||
* of inter-vdev rx --> tx forwarding). The HW peer id here is the same
|
||||
* meaning as AST_INDEX_0.
|
||||
* This DA-based peer ID that is provided for certain rx frames
|
||||
* (the rx frames that need to be re-transmitted as tx frames)
|
||||
* is the ID that the HW uses for referring to the peer in question,
|
||||
|
|
@ -7980,7 +8451,7 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
|
|||
* |-----------------------------------------------------------------------|
|
||||
* | MAC addr 3 | MAC addr 2 | MAC addr 1 | MAC addr 0 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | HW peer ID | MAC addr 5 | MAC addr 4 |
|
||||
* | HW peer ID / AST index 0 | MAC addr 5 | MAC addr 4 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
*
|
||||
*
|
||||
|
|
@ -8110,26 +8581,34 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
|
|||
* is the ID that the HW uses for referring to the peer in question,
|
||||
* rather than the peer ID that the SW+FW use to refer to the peer.
|
||||
*
|
||||
* The HW peer id here is the same meaning as AST_INDEX_0.
|
||||
* Some chips support up to 4 AST indices per peer: AST_INDEX_0, AST_INDEX_1,
|
||||
* AST_INDEX_2, and AST_INDEX_3. AST 0 is always valid; for AST 1 through
|
||||
* AST 3, check the AST_VALID_MASK(3) to see if the corresponding extension
|
||||
* AST is valid.
|
||||
*
|
||||
* |31 24|23 16|15 8|7 0|
|
||||
* |31 28|27 24|23 20|19 17|16|15 8|7 0|
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | SW peer ID | VDEV ID | msg type |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | MAC addr 3 | MAC addr 2 | MAC addr 1 | MAC addr 0 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | HW peer ID | MAC addr 5 | MAC addr 4 |
|
||||
* | HW peer ID / AST index 0 | MAC addr 5 | MAC addr 4 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Reserved_17_31 | Next Hop | AST Hash Value |
|
||||
* | Reserved_20_31 |ASTVM|NH| AST Hash Value |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Reserved_0 |
|
||||
* | ASTFM3 | ASTFM2 | ASTFM1 | ASTFM0 | AST index 1 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Reserved_1 |
|
||||
* |TID valid low pri| TID valid hi pri| AST index 2 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Reserved_1 | AST index 3 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Reserved_2 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
* | Reserved_3 |
|
||||
* |-----------------------------------------------------------------------|
|
||||
*
|
||||
* Where:
|
||||
* NH = Next Hop
|
||||
* ASTVM = AST valid mask
|
||||
* ASTFM = AST flow mask
|
||||
*
|
||||
* The following field definitions describe the format of the rx peer map v2
|
||||
* messages sent from the target to the host.
|
||||
|
|
@ -8153,7 +8632,7 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
|
|||
* Bits 15:0
|
||||
* Purpose: Identifies which peer node the peer ID is for.
|
||||
* Value: upper 2 bytes of peer node's MAC address
|
||||
* - HW_PEER_ID
|
||||
* - HW_PEER_ID / AST_INDEX_0
|
||||
* Bits 31:16
|
||||
* Purpose: Identifies the HW peer ID corresponding to the peer MAC
|
||||
* address, so for rx frames marked for rx --> tx forwarding, the
|
||||
|
|
@ -8168,6 +8647,36 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
|
|||
* Bit 16
|
||||
* Purpose: Bit indicates that a next_hop AST entry is used for WDS
|
||||
* (Wireless Distribution System).
|
||||
* - AST_VALID_MASK
|
||||
* Bits 19:17
|
||||
* Purpose: Indicate if the AST 1 through AST 3 are valid
|
||||
* - AST_INDEX_1
|
||||
* Bits 15:0
|
||||
* Purpose: indicate the second AST index for this peer
|
||||
* - AST_0_FLOW_MASK
|
||||
* Bits 19:16
|
||||
* Purpose: identify the which flow the AST 0 entry corresponds to.
|
||||
* - AST_1_FLOW_MASK
|
||||
* Bits 23:20
|
||||
* Purpose: identify the which flow the AST 1 entry corresponds to.
|
||||
* - AST_2_FLOW_MASK
|
||||
* Bits 27:24
|
||||
* Purpose: identify the which flow the AST 2 entry corresponds to.
|
||||
* - AST_3_FLOW_MASK
|
||||
* Bits 31:28
|
||||
* Purpose: identify the which flow the AST 3 entry corresponds to.
|
||||
* - AST_INDEX_2
|
||||
* Bits 15:0
|
||||
* Purpose: indicate the third AST index for this peer
|
||||
* - TID_VALID_HI_PRI
|
||||
* Bits 23:16
|
||||
* Purpose: identify if this peer's TIDs 0-7 support HI priority flow
|
||||
* - TID_VALID_LOW_PRI
|
||||
* Bits 31:24
|
||||
* Purpose: identify if this peer's TIDs 0-7 support Low priority flow
|
||||
* - AST_INDEX_3
|
||||
* Bits 15:0
|
||||
* Purpose: indicate the fourth AST index for this peer
|
||||
*/
|
||||
#define HTT_RX_PEER_MAP_V2_VDEV_ID_M 0xff00
|
||||
#define HTT_RX_PEER_MAP_V2_VDEV_ID_S 8
|
||||
|
|
@ -8183,6 +8692,29 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
|
|||
#define HTT_RX_PEER_MAP_V2_AST_HASH_VALUE_S 0
|
||||
#define HTT_RX_PEER_MAP_V2_NEXT_HOP_M 0x00010000
|
||||
#define HTT_RX_PEER_MAP_V2_NEXT_HOP_S 16
|
||||
#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_M 0x000e0000
|
||||
#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_S 17
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_M 0xffff
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_S 0
|
||||
#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_M 0x000f0000
|
||||
#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_S 16
|
||||
#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_M 0x00f00000
|
||||
#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_S 20
|
||||
#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_M 0x0f000000
|
||||
#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_S 24
|
||||
#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_M 0xf0000000
|
||||
#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_S 28
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_M 0xffff
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_S 0
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_M 0x00ff0000
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_S 16
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_M 0xff000000
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_S 24
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_M 0xffff
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_S 0
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_VDEV_ID_SET(word, value) \
|
||||
do { \
|
||||
|
|
@ -8224,10 +8756,97 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
|
|||
#define HTT_RX_PEER_MAP_V2_NEXT_HOP_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_NEXT_HOP_M) >> HTT_RX_PEER_MAP_V2_NEXT_HOP_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_VALID_MASK, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_VALID_MASK_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_VALID_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_VALID_MASK_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_INDEX_1, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_INDEX_1_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_INDEX_1_M) >> HTT_RX_PEER_MAP_V2_AST_INDEX_1_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_0_FLOW_MASK_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_1_FLOW_MASK_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_2_FLOW_MASK_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_M) >> HTT_RX_PEER_MAP_V2_AST_3_FLOW_MASK_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_INDEX_2, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_INDEX_2_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_INDEX_2_M) >> HTT_RX_PEER_MAP_V2_AST_INDEX_2_S)
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_M) >> HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_M) >> HTT_RX_PEER_MAP_V2_TID_VALID_LOW_PRI_S)
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_SET(word, value) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V2_AST_INDEX_3, value); \
|
||||
(word) |= (value) << HTT_RX_PEER_MAP_V2_AST_INDEX_3_S; \
|
||||
} while (0)
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_GET(word) \
|
||||
(((word) & HTT_RX_PEER_MAP_V2_AST_INDEX_3_M) >> HTT_RX_PEER_MAP_V2_AST_INDEX_3_S)
|
||||
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_MAC_ADDR_OFFSET 4 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_HW_PEER_ID_OFFSET 8 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_AST_HASH_INDEX_OFFSET 12 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_NEXT_HOP_OFFSET 12 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_AST_VALID_MASK_OFFSET 12 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_1_OFFSET 16 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_AST_X_FLOW_MASK_OFFSET 16 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_2_OFFSET 20 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_LO_PRI_OFFSET 20 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_TID_VALID_HI_PRI_OFFSET 20 /* bytes */
|
||||
#define HTT_RX_PEER_MAP_V2_AST_INDEX_3_OFFSET 24 /* bytes */
|
||||
|
||||
#define HTT_RX_PEER_MAP_V2_BYTES 32
|
||||
|
||||
|
|
@ -12328,4 +12947,249 @@ PREPACK struct htt_t2h_msg_bkpressure_event_ind_t {
|
|||
A_UINT32 backpressure_time_ms; /* Time in milliseconds for which backpressure is seen continuously */
|
||||
} POSTPACK;
|
||||
|
||||
|
||||
/*
|
||||
* Defines two 32 bit words that can be used by the target to indicate a per
|
||||
* user RU allocation and rate information.
|
||||
*
|
||||
* This information is currently provided in the "sw_response_reference_ptr"
|
||||
* (word 0) and "sw_response_reference_ptr_ext" (word 1) fields of the
|
||||
* "rx_ppdu_end_user_stats" TLV.
|
||||
*
|
||||
* VALID:
|
||||
* The consumer of these words must explicitly check the valid bit,
|
||||
* and only attempt interpretation of any of the remaining fields if
|
||||
* the valid bit is set to 1.
|
||||
*
|
||||
* VERSION:
|
||||
* The consumer of these words must also explicitly check the version bit,
|
||||
* and only use the V0 definition if the VERSION field is set to 0.
|
||||
*
|
||||
* Version 1 is currently undefined, with the exception of the VALID and
|
||||
* VERSION fields.
|
||||
*
|
||||
* Version 0:
|
||||
*
|
||||
* The fields below are duplicated per BW.
|
||||
*
|
||||
* The consumer must determine which BW field to use, based on the UL OFDMA
|
||||
* PPDU BW indicated by HW.
|
||||
*
|
||||
* RU_START: RU26 start index for the user.
|
||||
* Note that this is always using the RU26 index, regardless
|
||||
* of the actual RU assigned to the user
|
||||
* (i.e. the second RU52 is RU_START 2, RU_SIZE
|
||||
* HTT_UL_OFDMA_V0_RU_SIZE_RU_52)
|
||||
*
|
||||
* For example, 20MHz (the value in the top row is RU_START)
|
||||
*
|
||||
* RU Size 0 (26): |0|1|2|3|4|5|6|7|8|
|
||||
* RU Size 1 (52): | | | | | |
|
||||
* RU Size 2 (106): | | | |
|
||||
* RU Size 3 (242): | |
|
||||
*
|
||||
* RU_SIZE: Indicates the RU size, as defined by enum
|
||||
* htt_ul_ofdma_user_info_ru_size.
|
||||
*
|
||||
* LDPC: LDPC enabled (if 0, BCC is used)
|
||||
*
|
||||
* DCM: DCM enabled
|
||||
*
|
||||
* |31 | 30|29 23|22 19|18 16|15 9| 8 | 7 |6 3|2 0|
|
||||
* |---------------------------------+--------------------------------|
|
||||
* |Ver|Valid| FW internal |
|
||||
* |---------------------------------+--------------------------------|
|
||||
* | reserved |Trig Type|RU SIZE| RU START |DCM|LDPC|MCS |NSS|
|
||||
* |---------------------------------+--------------------------------|
|
||||
*/
|
||||
|
||||
enum htt_ul_ofdma_user_info_ru_size {
|
||||
HTT_UL_OFDMA_V0_RU_SIZE_RU_26,
|
||||
HTT_UL_OFDMA_V0_RU_SIZE_RU_52,
|
||||
HTT_UL_OFDMA_V0_RU_SIZE_RU_106,
|
||||
HTT_UL_OFDMA_V0_RU_SIZE_RU_242,
|
||||
HTT_UL_OFDMA_V0_RU_SIZE_RU_484,
|
||||
HTT_UL_OFDMA_V0_RU_SIZE_RU_996,
|
||||
HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
|
||||
};
|
||||
|
||||
/* htt_up_ofdma_user_info_v0 provides an abstract view of the info */
|
||||
struct htt_ul_ofdma_user_info_v0 {
|
||||
A_UINT32 word0;
|
||||
A_UINT32 word1;
|
||||
};
|
||||
|
||||
/* htt_up_ofdma_user_info_v0_bitmap shows what bitfields are within the info */
|
||||
PREPACK struct htt_ul_ofdma_user_info_v0_bitmap {
|
||||
union {
|
||||
A_UINT32 word0;
|
||||
struct {
|
||||
A_UINT32 w0_fw_rsvd:30;
|
||||
A_UINT32 w0_valid:1;
|
||||
A_UINT32 w0_version:1;
|
||||
};
|
||||
};
|
||||
union {
|
||||
A_UINT32 word1;
|
||||
struct {
|
||||
A_UINT32 w1_nss:3;
|
||||
A_UINT32 w1_mcs:4;
|
||||
A_UINT32 w1_ldpc:1;
|
||||
A_UINT32 w1_dcm:1;
|
||||
A_UINT32 w1_ru_start:7;
|
||||
A_UINT32 w1_ru_size:3;
|
||||
A_UINT32 w1_trig_type:4;
|
||||
A_UINT32 w1_unused:9;
|
||||
};
|
||||
};
|
||||
} POSTPACK;
|
||||
|
||||
enum HTT_UL_OFDMA_TRIG_TYPE {
|
||||
HTT_UL_OFDMA_USER_INFO_V0_TRIG_TYPE_BASIC = 0,
|
||||
HTT_UL_OFDMA_USER_INFO_V0_TRIG_TYPE_BFRP,
|
||||
HTT_UL_OFDMA_USER_INFO_V0_TRIG_TYPE_MU_BAR,
|
||||
HTT_UL_OFDMA_USER_INFO_V0_TRIG_TYPE_MU_RTS_CTS,
|
||||
HTT_UL_OFDMA_USER_INFO_V0_TRIG_TYPE_BSR,
|
||||
};
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_SZ (sizeof(struct htt_ul_ofdma_user_info_v0))
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL_M 0x0000ffff
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL_S 0
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M 0x40000000
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_S 30
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VER_M 0x80000000
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VER_S 31
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_M 0x00000007
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_S 0
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_M 0x00000078
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_S 3
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC_M 0x00000080
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC_S 7
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_DCM_M 0x00000100
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_DCM_S 8
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_M 0x0000fe00
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_S 9
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_M 0x00070000
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_S 16
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_TRIG_TYP_M 0x00780000
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_TRIG_TYP_S 19
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RESERVED1_M 0xff800000
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RESERVED1_S 23
|
||||
|
||||
/*--- word 0 ---*/
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL_M) >> HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W0_FW_INTERNAL_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M) >> HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W0_VER_M) >> HTT_UL_OFDMA_USER_INFO_V0_W0_VER_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W0_VER_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W0_VER, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W0_VER_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
/*--- word 1 ---*/
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_M) >> HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W1_NSS, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_M) >> HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W1_MCS, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC_M) >> HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W1_LDPC_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_DCM_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W1_DCM_M) >> HTT_UL_OFDMA_USER_INFO_V0_W1_DCM_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_DCM_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W1_DCM, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W1_DCM_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_M) >> HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_M) >> HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_TRIG_TYP_GET(word) \
|
||||
(((word) & HTT_UL_OFDMA_USER_INFO_V0_W1_TRIG_TYP_M) >> HTT_UL_OFDMA_USER_INFO_V0_W1_TRIG_TYP_S)
|
||||
|
||||
#define HTT_UL_OFDMA_USER_INFO_V0_W1_TRIG_TYP_SET(word, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_UL_OFDMA_USER_INFO_V0_W1_RU_TRIG_TYP, _val); \
|
||||
((word) |= ((_val) << HTT_UL_OFDMA_USER_INFO_V0_W1_RU_TRIG_TYP_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1288,8 +1288,32 @@ typedef struct {
|
|||
resp_ppdu_type: 2;
|
||||
};
|
||||
};
|
||||
|
||||
/* Note: This is for tracking a UL OFDMA packet */
|
||||
union {
|
||||
A_UINT32 trig_cookie_info;
|
||||
struct {
|
||||
A_UINT32 trig_cookie: 16,
|
||||
trig_cookie_rsvd: 15,
|
||||
trig_cookie_valid: 1;
|
||||
};
|
||||
};
|
||||
} htt_ppdu_stats_user_rate_tlv;
|
||||
|
||||
#define HTT_PPDU_STATS_USR_RATE_COOKIE_M 0x0000ffff
|
||||
#define HTT_PPDU_STATS_USR_RATE_COOKIE_S 0
|
||||
|
||||
#define HTT_PPDU_STATS_USR_RATE_VALID_M 0x80000000
|
||||
#define HTT_PPDU_STATS_USR_RATE_VALID_S 31
|
||||
|
||||
#define HTT_PPDU_STATS_USR_RATE_COOKIE_GET(_val) \
|
||||
(((_val) & HTT_PPDU_STATS_USR_RATE_COOKIE_M) >> \
|
||||
HTT_PPDU_STATS_USR_RATE_COOKIE_S)
|
||||
|
||||
#define HTT_PPDU_STATS_USR_RATE_VALID_GET(_val) \
|
||||
(((_val) & HTT_PPDU_STATS_USR_RATE_VALID_M) >> \
|
||||
HTT_PPDU_STATS_USR_RATE_VALID_S)
|
||||
|
||||
#define HTT_PPDU_STATS_ENQ_MPDU_BITMAP_TLV_TID_NUM_M 0x000000ff
|
||||
#define HTT_PPDU_STATS_ENQ_MPDU_BITMAP_TLV_TID_NUM_S 0
|
||||
|
||||
|
|
|
|||
|
|
@ -226,7 +226,8 @@ enum htt_dbg_ext_stats_type {
|
|||
/* HTT_DBG_EXT_STATS_PDEV_CCA_STATS
|
||||
* PARAMS:
|
||||
* - config_param0:
|
||||
* [Bit0] - 1 sec interval histogram
|
||||
* [Bit0] - Clear bit0 to read 1sec,100ms & cumulative CCA stats.
|
||||
* Set bit0 to 1 to read 1sec interval histogram.
|
||||
* [Bit1] - 100ms interval histogram
|
||||
* [Bit3] - Cumulative CCA stats
|
||||
* RESP MSG:
|
||||
|
|
@ -256,7 +257,8 @@ enum htt_dbg_ext_stats_type {
|
|||
* PARAMS:
|
||||
* - config_param0:
|
||||
* [Bit0] vdev_id_set:1
|
||||
* set to 1 if vdev_id is set and vdev stats are requested
|
||||
* set to 1 if vdev_id is set and vdev stats are requested.
|
||||
* set to 0 if pdev_stats sounding stats are requested.
|
||||
* [Bit8 : Bit1] vdev_id:8
|
||||
* note:0xFF to get all active vdevs based on pdev_mask.
|
||||
* [Bit31 : Bit9] rsvd:22
|
||||
|
|
@ -805,6 +807,11 @@ typedef struct {
|
|||
A_UINT32 wal_rx_recovery_rst_rx_busy_count;
|
||||
A_UINT32 wal_rx_recovery_rst_phy_mac_hang_count;
|
||||
A_UINT32 rx_flush_cnt; /* Num rx flush issued */
|
||||
A_UINT32 phy_warm_reset_reason_tx_lifetime_expiry_cca_stuck;
|
||||
A_UINT32 phy_warm_reset_reason_tx_consecutive_flush9_war;
|
||||
A_UINT32 phy_warm_reset_reason_tx_hwsch_reset_war;
|
||||
A_UINT32 phy_warm_reset_reason_hwsch_wdog_or_cca_wdog_war;
|
||||
A_UINT32 fw_rx_rings_reset;
|
||||
} htt_hw_stats_pdev_errs_tlv;
|
||||
|
||||
typedef struct {
|
||||
|
|
@ -1182,7 +1189,20 @@ typedef enum {
|
|||
#define HTT_TX_PEER_STATS_NUM_MCS_COUNTERS 12
|
||||
#define HTT_TX_PEER_STATS_NUM_GI_COUNTERS 4
|
||||
#define HTT_TX_PEER_STATS_NUM_DCM_COUNTERS 5
|
||||
/* HTT_TX_PEER_STATS_NUM_BW_COUNTERS:
|
||||
* bw index 0: rssi_pri20_chain0
|
||||
* bw index 1: rssi_ext20_chain0
|
||||
* bw index 2: rssi_ext40_low20_chain0
|
||||
* bw index 3: rssi_ext40_high20_chain0
|
||||
*/
|
||||
#define HTT_TX_PEER_STATS_NUM_BW_COUNTERS 4
|
||||
/* HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS:
|
||||
* bw index 4 (bw ext index 0): rssi_ext80_low20_chain0
|
||||
* bw index 5 (bw ext index 1): rssi_ext80_low_high20_chain0
|
||||
* bw index 6 (bw ext index 2): rssi_ext80_high_low20_chain0
|
||||
* bw index 7 (bw ext index 3): rssi_ext80_high20_chain0
|
||||
*/
|
||||
#define HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS 4
|
||||
#define HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS 8
|
||||
#define HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
|
||||
|
||||
|
|
@ -1261,6 +1281,8 @@ typedef struct _htt_rx_peer_rate_stats_tlv {
|
|||
A_UINT32 rx_ulmumimo_data_ppdu; /* ppdu level */
|
||||
A_UINT32 rx_ulmumimo_mpdu_ok; /* mpdu level */
|
||||
A_UINT32 rx_ulmumimo_mpdu_fail; /* mpdu level */
|
||||
|
||||
A_UINT8 rssi_chain_ext[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS]; /* units = dB above noise floor */
|
||||
} htt_rx_peer_rate_stats_tlv;
|
||||
|
||||
typedef enum {
|
||||
|
|
@ -1748,6 +1770,10 @@ typedef struct {
|
|||
A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
|
||||
A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
|
||||
A_UINT32 ax_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
|
||||
A_UINT32 ax_ul_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
|
||||
A_UINT32 ax_ul_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
|
||||
A_UINT32 ax_ul_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
|
||||
A_UINT32 ax_ul_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
|
||||
} htt_tx_pdev_mu_mimo_sch_stats_tlv;
|
||||
|
||||
typedef struct {
|
||||
|
|
@ -3140,6 +3166,8 @@ typedef struct {
|
|||
A_UINT32 rx_ulmumimo_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* ppdu level */
|
||||
A_UINT32 rx_ulmumimo_mpdu_ok[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* mpdu level */
|
||||
A_UINT32 rx_ulmumimo_mpdu_fail[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* mpdu level */
|
||||
A_UINT32 rx_ulofdma_non_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
|
||||
A_UINT32 rx_ulofdma_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
|
||||
} htt_rx_pdev_rate_stats_tlv;
|
||||
|
||||
/* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE
|
||||
|
|
@ -3839,6 +3867,17 @@ typedef struct {
|
|||
|
||||
A_UINT32 num_obss_tx_ppdu_success;
|
||||
A_UINT32 num_obss_tx_ppdu_failure;
|
||||
/* num_sr_tx_tranmissions:
|
||||
* Counter of TX done by aborting other BSS RX with spatial reuse
|
||||
* (for cases where rx RSSI from other BSS is below the packet-detection
|
||||
* threshold for doing spatial reuse)
|
||||
*/
|
||||
A_UINT32 num_sr_tx_tranmissions;
|
||||
/* num_sr_rx_ge_pd_rssi_thr
|
||||
* counter of rx from other BSS for which RSSI was above the
|
||||
* packet-detection threshold specified for enabling spatial reuse
|
||||
*/
|
||||
A_UINT32 num_sr_rx_ge_pd_rssi_thr;
|
||||
} htt_pdev_obss_pd_stats_tlv;
|
||||
|
||||
/* NOTE:
|
||||
|
|
|
|||
|
|
@ -396,6 +396,12 @@ typedef enum {
|
|||
WMI_SERVICE_DSM_ROAM_FILTER = 211, /* FW supports data stall AP mitigation while roaming */
|
||||
WMI_SERVICE_PACKET_CAPTURE_SUPPORT = 212, /* target supports packet capture Mode (SMART MU) */
|
||||
WMI_SERVICE_PER_PEER_HTT_STATS_RESET = 213, /* FW supports HTT per peer stats reset facility */
|
||||
WMI_SERVICE_DELETE_ALL_PEER_SUPPORT = 214, /* target supports cmd to delete all peers within a vdev */
|
||||
WMI_SERVICE_DYNAMIC_HW_MODE_SWITCH_SUPPORT = 215, /* target supports Dynamic HW mode switch */
|
||||
WMI_SERVICE_MSDU_FLOW_OVERRIDE_BY_HOST = 216, /* target supports flow override feature */
|
||||
WMI_SERVICE_WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENT= 217, /* target will send WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENT */
|
||||
WMI_SERVICE_RX_FSE_SUPPORT = 218, /* target supports flow search through RxOLE FSE hw block */
|
||||
WMI_SERVICE_FREQINFO_IN_METADATA = 219, /* FW provides freq_info during spectral scan */
|
||||
|
||||
/******* ADD NEW SERVICES HERE *******/
|
||||
|
||||
|
|
|
|||
|
|
@ -984,6 +984,14 @@ typedef enum {
|
|||
WMITLV_TAG_STRUC_wmi_pdev_dsm_filter_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_pdev_bssid_disallow_list_config_param,
|
||||
WMITLV_TAG_STRUC_wmi_mgmt_hdr,
|
||||
WMITLV_TAG_STRUC_wmi_muedca_params_config_event_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_twt_btwt_invite_sta_cmd_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_twt_btwt_remove_sta_cmd_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_twt_btwt_invite_sta_complete_event_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_twt_btwt_remove_sta_complete_event_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_vdev_delete_all_peer_cmd_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_vdev_delete_all_peer_resp_event_fixed_param,
|
||||
WMITLV_TAG_STRUC_wmi_chan_rf_characterization_info_event_fixed_param,
|
||||
} WMITLV_TAG_ID;
|
||||
|
||||
/*
|
||||
|
|
@ -1383,6 +1391,9 @@ typedef enum {
|
|||
OP(WMI_ROAM_IDLE_CONFIG_CMDID) \
|
||||
OP(WMI_IDLE_TRIGGER_MONITOR_CMDID) \
|
||||
OP(WMI_PDEV_DSM_FILTER_CMDID) \
|
||||
OP(WMI_TWT_BTWT_INVITE_STA_CMDID) \
|
||||
OP(WMI_TWT_BTWT_REMOVE_STA_CMDID) \
|
||||
OP(WMI_VDEV_DELETE_ALL_PEER_CMDID) \
|
||||
/* add new CMD_LIST elements above this line */
|
||||
|
||||
|
||||
|
|
@ -1610,6 +1621,11 @@ typedef enum {
|
|||
OP(WMI_PDEV_RAP_INFO_EVENTID) \
|
||||
OP(WMI_IFACE_COMBINATION_IND_EVENTID) \
|
||||
OP(WMI_VDEV_MGMT_OFFLOAD_EVENTID) \
|
||||
OP(WMI_MUEDCA_PARAMS_CONFIG_EVENTID) \
|
||||
OP(WMI_TWT_BTWT_INVITE_STA_COMPLETE_EVENTID) \
|
||||
OP(WMI_TWT_BTWT_REMOVE_STA_COMPLETE_EVENTID) \
|
||||
OP(WMI_VDEV_DELETE_ALL_PEER_RESP_EVENTID) \
|
||||
OP(WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID) \
|
||||
/* add new EVT_LIST elements above this line */
|
||||
|
||||
|
||||
|
|
@ -1637,6 +1653,12 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_CREATE_CMDID);
|
|||
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_PEER_DELETE_CMDID);
|
||||
|
||||
/* Delete all peer Cmd */
|
||||
#define WMITLV_TABLE_WMI_VDEV_DELETE_ALL_PEER_CMDID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_delete_all_peer_cmd_fixed_param, wmi_vdev_delete_all_peer_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_DELETE_ALL_PEER_CMDID);
|
||||
|
||||
/* Peer unmap response Cmd */
|
||||
#define WMITLV_TABLE_WMI_PEER_UNMAP_RESPONSE_CMDID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_unmap_response_cmd_fixed_param, wmi_peer_unmap_response_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
|
||||
|
|
@ -3927,6 +3949,16 @@ WMITLV_CREATE_PARAM_STRUC(WMI_TWT_PAUSE_DIALOG_CMDID);
|
|||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_twt_resume_dialog_cmd_fixed_param, wmi_twt_resume_dialog_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_TWT_RESUME_DIALOG_CMDID);
|
||||
|
||||
/* B-TWT STA invitation cmd */
|
||||
#define WMITLV_TABLE_WMI_TWT_BTWT_INVITE_STA_CMDID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_twt_btwt_invite_sta_cmd_fixed_param, wmi_twt_btwt_invite_sta_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_TWT_BTWT_INVITE_STA_CMDID);
|
||||
|
||||
/* B-TWT STA removal cmd */
|
||||
#define WMITLV_TABLE_WMI_TWT_BTWT_REMOVE_STA_CMDID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_twt_btwt_remove_sta_cmd_fixed_param, wmi_twt_btwt_remove_sta_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_TWT_BTWT_REMOVE_STA_CMDID);
|
||||
|
||||
/* Set peer tid configurations Cmd */
|
||||
#define WMITLV_TABLE_WMI_PEER_TID_CONFIGURATIONS_CMDID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_tid_configurations_cmd_fixed_param, wmi_peer_tid_configurations_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
|
|
@ -4012,6 +4044,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_SERVICE_AVAILABLE_EVENTID);
|
|||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_CHAN_RF_CHARACTERIZATION_INFO, wmi_chan_rf_characterization_info, WMITLV_SIZE_VAR)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_SERVICE_READY_EXT_EVENTID);
|
||||
|
||||
#define WMITLV_TABLE_WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chan_rf_characterization_info_event_fixed_param, wmi_chan_rf_characterization_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, WMI_CHAN_RF_CHARACTERIZATION_INFO, wmi_chan_rf_characterization_info, WMITLV_SIZE_VAR)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID);
|
||||
|
||||
/* iface combination indication event */
|
||||
#define WMITLV_TABLE_WMI_IFACE_COMBINATION_IND_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_wlanfw_iface_cmb_ind_event_fixed_param, wmi_wlanfw_iface_cmb_ind_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
|
||||
|
|
@ -4301,6 +4338,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_GET_KEEPALIVE_EVENTID);
|
|||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_get_tpc_power_evt_fixed_param, wmi_get_tpc_power_evt_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_GET_TPC_POWER_EVENTID);
|
||||
|
||||
/** Get MU EDCA report param event */
|
||||
#define WMITLV_TABLE_WMI_MUEDCA_PARAMS_CONFIG_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_muedca_params_config_event_fixed_param, wmi_muedca_params_config_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_MUEDCA_PARAMS_CONFIG_EVENTID);
|
||||
|
||||
/* GPIO Input Event */
|
||||
#define WMITLV_TABLE_WMI_GPIO_INPUT_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_gpio_input_event_fixed_param, wmi_gpio_input_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
|
|
@ -4816,6 +4858,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_STATE_EVENTID);
|
|||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_delete_resp_event_fixed_param, wmi_peer_delete_resp_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_PEER_DELETE_RESP_EVENTID);
|
||||
|
||||
/* delete all peer response Event */
|
||||
#define WMITLV_TABLE_WMI_VDEV_DELETE_ALL_PEER_RESP_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_delete_all_peer_resp_event_fixed_param, wmi_vdev_delete_all_peer_resp_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_DELETE_ALL_PEER_RESP_EVENTID);
|
||||
|
||||
/* peer assoc conf Event */
|
||||
#define WMITLV_TABLE_WMI_PEER_ASSOC_CONF_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_assoc_conf_event_fixed_param, wmi_peer_assoc_conf_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
|
|
@ -5329,6 +5376,16 @@ WMITLV_CREATE_PARAM_STRUC(WMI_TWT_PAUSE_DIALOG_COMPLETE_EVENTID);
|
|||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_twt_resume_dialog_complete_event_fixed_param, wmi_twt_resume_dialog_complete_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_TWT_RESUME_DIALOG_COMPLETE_EVENTID);
|
||||
|
||||
/* inviting STA to B-TWT dialog complete Event */
|
||||
#define WMITLV_TABLE_WMI_TWT_BTWT_INVITE_STA_COMPLETE_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_twt_btwt_invite_sta_complete_event_fixed_param, wmi_twt_btwt_invite_sta_complete_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_TWT_BTWT_INVITE_STA_COMPLETE_EVENTID);
|
||||
|
||||
/* removing STA from B-TWT dialog complete Event */
|
||||
#define WMITLV_TABLE_WMI_TWT_BTWT_REMOVE_STA_COMPLETE_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_twt_btwt_remove_sta_complete_event_fixed_param, wmi_twt_btwt_remove_sta_complete_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
|
||||
WMITLV_CREATE_PARAM_STRUC(WMI_TWT_BTWT_REMOVE_STA_COMPLETE_EVENTID);
|
||||
|
||||
/* Event to send roam scan stats */
|
||||
#define WMITLV_TABLE_WMI_ROAM_SCAN_STATS_EVENTID(id,op,buf,len) \
|
||||
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_scan_stats_event_fixed_param, wmi_roam_scan_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
|
||||
|
|
|
|||
294
fw/wmi_unified.h
294
fw/wmi_unified.h
|
|
@ -480,6 +480,8 @@ typedef enum {
|
|||
WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID,
|
||||
/* request LTE-Coex info */
|
||||
WMI_VDEV_GET_MWS_COEX_INFO_CMDID,
|
||||
/** delete all peer (excluding bss peer) */
|
||||
WMI_VDEV_DELETE_ALL_PEER_CMDID,
|
||||
|
||||
/* peer specific commands */
|
||||
|
||||
|
|
@ -1211,6 +1213,8 @@ typedef enum {
|
|||
WMI_TWT_DEL_DIALOG_CMDID,
|
||||
WMI_TWT_PAUSE_DIALOG_CMDID,
|
||||
WMI_TWT_RESUME_DIALOG_CMDID,
|
||||
WMI_TWT_BTWT_INVITE_STA_CMDID,
|
||||
WMI_TWT_BTWT_REMOVE_STA_CMDID,
|
||||
|
||||
/** WMI commands related to motion detection **/
|
||||
WMI_MOTION_DET_CONFIG_PARAM_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_MOTION_DET),
|
||||
|
|
@ -1332,6 +1336,7 @@ typedef enum {
|
|||
/* Event to report a rogue ap info that is detected in fw */
|
||||
WMI_PDEV_RAP_INFO_EVENTID,
|
||||
|
||||
WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
|
||||
|
||||
/* VDEV specific events */
|
||||
/** VDEV started event in response to VDEV_START request */
|
||||
|
|
@ -1386,6 +1391,9 @@ typedef enum {
|
|||
/* Event to handle FW offloaded mgmt packets */
|
||||
WMI_VDEV_MGMT_OFFLOAD_EVENTID,
|
||||
|
||||
/* FW response to Host for delete all peer cmdid */
|
||||
WMI_VDEV_DELETE_ALL_PEER_RESP_EVENTID,
|
||||
|
||||
|
||||
/* peer specific events */
|
||||
/** FW reauet to kick out the station for reasons like inactivity,lack of response ..etc */
|
||||
|
|
@ -1713,6 +1721,9 @@ typedef enum {
|
|||
/** event to get TX power per input HALPHY parameters */
|
||||
WMI_GET_TPC_POWER_EVENTID,
|
||||
|
||||
/** event to provide MU-EDCA Parameters (to update host's beacon config) */
|
||||
WMI_MUEDCA_PARAMS_CONFIG_EVENTID,
|
||||
|
||||
/* GPIO Event */
|
||||
WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
|
||||
/** upload H_CV info WMI event
|
||||
|
|
@ -1819,6 +1830,8 @@ typedef enum {
|
|||
WMI_TWT_DEL_DIALOG_COMPLETE_EVENTID,
|
||||
WMI_TWT_PAUSE_DIALOG_COMPLETE_EVENTID,
|
||||
WMI_TWT_RESUME_DIALOG_COMPLETE_EVENTID,
|
||||
WMI_TWT_BTWT_INVITE_STA_COMPLETE_EVENTID,
|
||||
WMI_TWT_BTWT_REMOVE_STA_COMPLETE_EVENTID,
|
||||
|
||||
/** Events in Prototyping phase */
|
||||
WMI_NDI_CAP_RSP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PROTOTYPE),
|
||||
|
|
@ -2522,6 +2535,16 @@ typedef struct {
|
|||
*/
|
||||
} wmi_service_ready_ext_event_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_chan_rf_characterization_info_event_fixed_param */
|
||||
/*
|
||||
* A variable-length TLV array of wmi_chan_rf_characterization_info will
|
||||
* follow this fixed_param TLV, containing rx characterization info for
|
||||
* primary channels.
|
||||
* WMI_CHAN_RF_CHARACTERIZATION_INFO wmi_chan_rf_characterization_info[];
|
||||
*/
|
||||
} wmi_chan_rf_characterization_info_event_fixed_param;
|
||||
|
||||
typedef enum {
|
||||
WMI_FW_STA_RTT_INITR = 0x00000001,
|
||||
WMI_FW_STA_RTT_RESPR = 0x00000002,
|
||||
|
|
@ -3217,8 +3240,76 @@ typedef struct {
|
|||
* other - reserved.
|
||||
*/
|
||||
A_UINT32 ul_resp_config;
|
||||
|
||||
/* msdu_flow_override_config0 - contains AST enable bitmask
|
||||
* AST0 is unconditionally enabled, unless the MSDU flow override feature
|
||||
* is entirely disabled.
|
||||
* AST1 through AST3 are conditionally enabled, based on bits 0-2 in
|
||||
* msdu_flow_override_config0.
|
||||
* If all three bits are 0, no msdu flow override feature at all in FW.
|
||||
*
|
||||
* The WMI_MSDU_FLOW_AST_ENABLE_GET and WMI_MSDU_FLOW_AST_ENABLE_SET
|
||||
* macros are used to read and write these bitfields.
|
||||
*/
|
||||
A_UINT32 msdu_flow_override_config0;
|
||||
|
||||
/* msdu_flow_override_config1:
|
||||
* Bits 3:0 - AST0_FLOW_MASK(4)
|
||||
* Bits 7:4 - AST1_FLOW_MASK(4)
|
||||
* Bits 11:8 - AST2_FLOW_MASK(4)
|
||||
* Bits 15:12 - AST3_FLOW_MASK(4)
|
||||
* Bits 23:16 - TID_VALID_HI_PRI (8)
|
||||
* Bits 31:24 - TID_VALID_LOW_PRI (8)
|
||||
*
|
||||
* The macros
|
||||
* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_GET
|
||||
* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_SET
|
||||
* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_GET
|
||||
* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_SET
|
||||
* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_GET
|
||||
* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_SET
|
||||
* are used to read and write these bitfields.
|
||||
*/
|
||||
A_UINT32 msdu_flow_override_config1;
|
||||
} wmi_resource_config;
|
||||
|
||||
#define WMI_MSDU_FLOW_AST_ENABLE_GET(msdu_flow_config0, ast_x) \
|
||||
(((ast_x) == 0) ? 1 : ((msdu_flow_config0) & (1 << ((ast_x) - 1))))
|
||||
#define WMI_MSDU_FLOW_AST_ENABLE_SET(msdu_flow_config0, ast_x, enable) \
|
||||
do { \
|
||||
if ((ast_x) == 0) break; \
|
||||
if ((enable)) { \
|
||||
(msdu_flow_config0) |= (1 << ((ast_x) - 1)); \
|
||||
} else { \
|
||||
(msdu_flow_config0) &= ~(1 << ((ast_x) - 1)); \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
#define WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_GET(msdu_flow_config1, ast_x) \
|
||||
(((msdu_flow_config1) & (0x0f << ((ast_x) * 4))) >> ((ast_x) * 4))
|
||||
#define WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_SET( \
|
||||
msdu_flow_config1, ast_x, mask) \
|
||||
do { \
|
||||
(msdu_flow_config1) &= ~(0xF << ((ast_x) * 4)); \
|
||||
(msdu_flow_config1) |= ((mask) << ((ast_x) * 4)); \
|
||||
} while(0)
|
||||
|
||||
#define WMI_MSDU_FLOW_TID_VALID_HI_MASKS_GET(msdu_flow_config1) \
|
||||
(((msdu_flow_config1) & 0xff0000) >> 16)
|
||||
#define WMI_MSDU_FLOW_TID_VALID_HI_MASKS_SET(msdu_flow_config1, mask) \
|
||||
do { \
|
||||
(msdu_flow_config1) &= ~0xff0000; \
|
||||
(msdu_flow_config1) |= ((mask) << 16); \
|
||||
} while(0)
|
||||
|
||||
#define WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_GET(msdu_flow_config1) \
|
||||
((msdu_flow_config1 & 0xff000000) >> 24)
|
||||
#define WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_SET(msdu_flow_config1, mask) \
|
||||
do { \
|
||||
(msdu_flow_config1) &= ~0xff000000; \
|
||||
(msdu_flow_config1) |= ((mask) << 24); \
|
||||
} while(0)
|
||||
|
||||
#define WMI_RSRC_CFG_FLAG_SET(word32, flag, value) \
|
||||
do { \
|
||||
(word32) &= ~WMI_RSRC_CFG_FLAG_ ## flag ## _M; \
|
||||
|
|
@ -5898,6 +5989,20 @@ typedef enum {
|
|||
/* Parameter used for enabling/disabling non wlan coex from boot */
|
||||
WMI_PDEV_PARAM_ENABLE_NON_WLAN_COEX_FROM_BOOT,
|
||||
|
||||
/* Parameter used to configure OBSS Packet Detection per Access Category
|
||||
* for Spatial Reuse feature.
|
||||
* Based on the bits set, the corresponding Access Category Queues will have
|
||||
* spatial reuse enabled / disabled.
|
||||
* bit | AC
|
||||
* -----------
|
||||
* 0 | BK
|
||||
* 1 | BE
|
||||
* 2 | VI
|
||||
* 3 | VO
|
||||
* 4 - 31 | Reserved
|
||||
*/
|
||||
WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC,
|
||||
|
||||
} WMI_PDEV_PARAM;
|
||||
|
||||
#define WMI_PDEV_ONLY_BSR_TRIG_IS_ENABLED(trig_type) WMI_GET_BITS(trig_type, 0, 1)
|
||||
|
|
@ -6655,6 +6760,7 @@ typedef enum {
|
|||
WMI_REQUEST_BCN_STAT = 0x0800,
|
||||
WMI_REQUEST_BCN_STAT_RESET = 0x1000,
|
||||
WMI_REQUEST_PEER_EXTD2_STAT = 0x2000,
|
||||
WMI_REQUEST_MIB_EXTD_STAT = 0x4000,
|
||||
} wmi_stats_id;
|
||||
|
||||
/*
|
||||
|
|
@ -7348,6 +7454,8 @@ typedef struct {
|
|||
* indicate this is the final WMI_STATS_EVENT in a series.
|
||||
*/
|
||||
A_UINT32 last_event;
|
||||
/** number of extended MIB stats event structures (wmi_mib_extd_stats) */
|
||||
A_UINT32 num_mib_extd_stats;
|
||||
|
||||
/* This TLV is followed by another TLV of array of bytes
|
||||
* A_UINT8 data[];
|
||||
|
|
@ -7364,6 +7472,11 @@ typedef struct {
|
|||
* the data[] array also contains num_peer_stats * size of wmi_peer_extd_stats
|
||||
* following the information elements listed above.
|
||||
*/
|
||||
/* If WMI_REQUEST_MIB_EXTD_STAT is set in stats_id,
|
||||
* the data[] array also contains
|
||||
* num_mib_extd_stats * size of(struct wmi_mib_extd_stats)
|
||||
* following the information elements listed above.
|
||||
*/
|
||||
} wmi_stats_event_fixed_param;
|
||||
|
||||
/* WLAN channel CCA stats bitmap */
|
||||
|
|
@ -8141,6 +8254,9 @@ typedef struct {
|
|||
A_UINT32 rx_duration_us;
|
||||
} wmi_chan_stats;
|
||||
|
||||
/**
|
||||
* MIB statistics. See 802.11 spec for the meaning of each field.
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 tx_mpdu_grp_frag_cnt; /*dot11TransmittedFragmentCount */
|
||||
A_UINT32 tx_msdu_grp_frm_cnt; /*dot11GroupTransmittedFrameCount */
|
||||
|
|
@ -8193,6 +8309,20 @@ typedef struct {
|
|||
A_UINT32 reserved_4;
|
||||
} wmi_mib_stats;
|
||||
|
||||
/**
|
||||
* MIB extension statistics.
|
||||
*/
|
||||
typedef struct {
|
||||
A_UINT32 tx_msdu_multi_retry_cnt; /*dot11MultipleRetryCount*/
|
||||
A_UINT32 tx_ack_fail_cnt; /*dot11ACKFailureCount*/
|
||||
A_UINT32 tx_qos_msdu_multi_retry_up; /*dot11QosMultipleRetryCount*/
|
||||
A_UINT32 tx_qos_ack_fail_cnt_up; /*dot11QosACKFailureCount*/
|
||||
A_UINT32 rsna_cmac_icv_err_cnt; /*dot11RSNAStatsCMACICVErrors*/
|
||||
A_UINT32 rsna_cmac_replay_err_cnt; /*dot11RSNAStatsCMACReplays*/
|
||||
A_UINT32 rx_ampdu_deli_crc_err_cnt; /*dot11AMPDUDelimiterCRCErrorCount*/
|
||||
A_UINT32 reserved[8]; /* Reserve more fields for future extension */
|
||||
} wmi_mib_extd_stats;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_rssi_stats */
|
||||
A_UINT32 vdev_id;
|
||||
|
|
@ -9836,6 +9966,30 @@ typedef enum {
|
|||
*/
|
||||
WMI_VDEV_PARAM_PACKET_CAPTURE_MODE, /* 0x93 */
|
||||
|
||||
/**
|
||||
* To configure duration of how many seconds without tx unicast traffic is
|
||||
* considered stale for mcast rate adaptation
|
||||
*/
|
||||
WMI_VDEV_PARAM_MCAST_RC_STALE_PERIOD, /* 0x94 */
|
||||
|
||||
/*
|
||||
* Bits 3:0 - AST0_FLOW_MASK(4)
|
||||
* Bits 7:4 - AST1_FLOW_MASK(4)
|
||||
* Bits 11:8 - AST2_FLOW_MASK(4)
|
||||
* Bits 15:12 - AST3_FLOW_MASK(4)
|
||||
* Bits 23:16 - TID_VALID_HI_PRI(8)
|
||||
* Bits 31:24 - TID_VALID_LOW_PRI(8)
|
||||
*
|
||||
* The below macros can be used to set/get the relevent fields.
|
||||
* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_GET(msdu_flow_config1, ast_x)
|
||||
* WMI_MSDU_FLOW_ASTX_MSDU_FLOW_MASKS_SET(msdu_flow_config1, ast_x, mask)
|
||||
* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_GET(msdu_flow_config1)
|
||||
* WMI_MSDU_FLOW_TID_VALID_HI_MASKS_SET(msdu_flow_config1, mask)
|
||||
* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_GET(msdu_flow_config1)
|
||||
* WMI_MSDU_FLOW_TID_VALID_LOW_MASKS_SET(msdu_flow_config1, mask)
|
||||
*/
|
||||
WMI_VDEV_PARAM_MSDU_FLOW_OVERRIDE_CONFIG, /* 0x95 */
|
||||
|
||||
|
||||
/*=== ADD NEW VDEV PARAM TYPES ABOVE THIS LINE ===
|
||||
* The below vdev param types are used for prototyping, and are
|
||||
|
|
@ -10960,6 +11114,12 @@ typedef struct {
|
|||
wmi_mac_addr peer_macaddr;
|
||||
} wmi_peer_delete_cmd_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_delete_all_peer_cmd_fixed_param */
|
||||
/** unique id identifying the VDEV, generated by the caller */
|
||||
A_UINT32 vdev_id;
|
||||
} wmi_vdev_delete_all_peer_cmd_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
/** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_unmap_response_cmd_fixed_param */
|
||||
A_UINT32 tlv_header;
|
||||
|
|
@ -18376,6 +18536,20 @@ typedef struct {
|
|||
wmi_mac_addr peer_macaddr;
|
||||
} wmi_peer_delete_resp_event_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_delete_all_peer_resp_event_fixed_param */
|
||||
/** unique id identifying the VDEV, generated by the caller */
|
||||
A_UINT32 vdev_id;
|
||||
/* Status of peer delete all command */
|
||||
/*
|
||||
* Values for Status:
|
||||
* 0 - OK; command successful
|
||||
* 1 - EINVAL; Requested invalid vdev_id
|
||||
* 2 - EFAILED; Delete all peer failed
|
||||
*/
|
||||
A_UINT32 status;
|
||||
} wmi_vdev_delete_all_peer_resp_event_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
/* TLV tag and len; tag equals WMITLV_TAG_STRUC_ wmi_peer_state_event_fixed_param */
|
||||
A_UINT32 tlv_header;
|
||||
|
|
@ -23109,6 +23283,12 @@ typedef struct {
|
|||
* Refer to WMI_HE_CAP_xx_LTF_xxx_SUPPORT_GET/SET macros
|
||||
*/
|
||||
A_UINT32 he_cap_info_internal;
|
||||
|
||||
A_UINT32 wireless_modes; /* REGDMN MODE, see REGDMN_MODE_ enum */
|
||||
A_UINT32 low_2ghz_chan_freq; /* units = MHz */
|
||||
A_UINT32 high_2ghz_chan_freq; /* units = MHz */
|
||||
A_UINT32 low_5ghz_chan_freq; /* units = MHz */
|
||||
A_UINT32 high_5ghz_chan_freq; /* units = MHz */
|
||||
} WMI_MAC_PHY_CAPABILITIES;
|
||||
|
||||
typedef struct {
|
||||
|
|
@ -23499,6 +23679,8 @@ static INLINE A_UINT8 *wmi_id_to_name(A_UINT32 wmi_command)
|
|||
WMI_RETURN_STRING(WMI_PEER_CREATE_CMDID);
|
||||
/** delete a peer */
|
||||
WMI_RETURN_STRING(WMI_PEER_DELETE_CMDID);
|
||||
/** delete all peer (excluding bss peer) */
|
||||
WMI_RETURN_STRING(WMI_VDEV_DELETE_ALL_PEER_CMDID);
|
||||
/** flush specific tid queues of a peer */
|
||||
WMI_RETURN_STRING(WMI_PEER_FLUSH_TIDS_CMDID);
|
||||
/** set a parameter of a peer */
|
||||
|
|
@ -24059,6 +24241,8 @@ static INLINE A_UINT8 *wmi_id_to_name(A_UINT32 wmi_command)
|
|||
WMI_RETURN_STRING(WMI_ROAM_IDLE_CONFIG_CMDID);
|
||||
WMI_RETURN_STRING(WMI_IDLE_TRIGGER_MONITOR_CMDID);
|
||||
WMI_RETURN_STRING(WMI_PDEV_DSM_FILTER_CMDID);
|
||||
WMI_RETURN_STRING(WMI_TWT_BTWT_INVITE_STA_CMDID);
|
||||
WMI_RETURN_STRING(WMI_TWT_BTWT_REMOVE_STA_CMDID);
|
||||
}
|
||||
|
||||
return "Invalid WMI cmd";
|
||||
|
|
@ -24797,6 +24981,10 @@ typedef enum _WMI_TWT_COMMAND_T {
|
|||
#define TWT_FLAGS_GET_PROTECTION(flag) WMI_GET_BITS(flag, 11, 1)
|
||||
#define TWT_FLAGS_SET_PROTECTION(flag, val) WMI_SET_BITS(flag, 11, 1, val)
|
||||
|
||||
/* B-TWT ID 0: 0 means non-0 B-TWT ID or I-TWT, 1 means B-TWT ID 0 */
|
||||
#define TWT_FLAGS_GET_BTWT_ID0(flag) WMI_GET_BITS(flag, 12, 1)
|
||||
#define TWT_FLAGS_SET_BTWT_ID0(flag, val) WMI_SET_BITS(flag, 12, 1, val)
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_twt_add_dialog_cmd_fixed_param */
|
||||
A_UINT32 vdev_id; /* VDEV identifier */
|
||||
|
|
@ -24824,6 +25012,11 @@ typedef struct {
|
|||
* Refer to 11ax spec session "9.4.2.199 TWT element" for more info.
|
||||
*/
|
||||
A_UINT32 b_twt_persistence;
|
||||
|
||||
/* Broadcast TWT(B-TWT) Recommendation, refer to section
|
||||
* "9.4.2.199 TWT element" of latest 11ax draft
|
||||
*/
|
||||
A_UINT32 b_twt_recommendation;
|
||||
} wmi_twt_add_dialog_cmd_fixed_param;
|
||||
|
||||
/* status code of adding TWT dialog */
|
||||
|
|
@ -24935,6 +25128,60 @@ typedef struct {
|
|||
A_UINT32 status; /* refer to WMI_RESUME_TWT_STATUS_T */
|
||||
} wmi_twt_resume_dialog_complete_event_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_twt_btwt_invite_sta_cmd_fixed_param */
|
||||
A_UINT32 vdev_id; /* VDEV identifier */
|
||||
wmi_mac_addr peer_macaddr; /* peer MAC address */
|
||||
A_UINT32 dialog_id; /* TWT dialog ID */
|
||||
} wmi_twt_btwt_invite_sta_cmd_fixed_param;
|
||||
|
||||
/* status code of inviting STA to B-TWT dialog */
|
||||
typedef enum _WMI_TWT_BTWT_INVITE_STA_STATUS_T {
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_OK, /* inviting STA to B-TWT successfully completed */
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_DIALOG_ID_NOT_EXIST, /* TWT dialog ID not exists */
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_INVALID_PARAM, /* invalid parameters */
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_DIALOG_ID_BUSY, /* FW is in the process of handling this dialog */
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_ALREADY_JOINED, /* peer STA already joined the session */
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_NO_RESOURCE, /* FW resource exhausted */
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_NO_ACK, /* peer STA did not ACK the request/response frame */
|
||||
WMI_TWT_BTWT_INVITE_STA_STATUS_UNKNOWN_ERROR, /* failed with an unknown reason */
|
||||
} WMI_TWT_BTWT_INVITE_STA_STATUS_T;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals wmi_twt_btwt_invite_sta_complete_event_fixed_param */
|
||||
A_UINT32 vdev_id; /* VDEV identifier */
|
||||
wmi_mac_addr peer_macaddr; /* peer MAC address */
|
||||
A_UINT32 dialog_id; /* TWT dialog ID */
|
||||
A_UINT32 status; /* refer to WMI_TWT_BTWT_INVITE_STA_STATUS_T */
|
||||
} wmi_twt_btwt_invite_sta_complete_event_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals wmi_twt_btwt_remove_sta_cmd_fixed_param */
|
||||
A_UINT32 vdev_id; /* VDEV identifier */
|
||||
wmi_mac_addr peer_macaddr; /* peer MAC address */
|
||||
A_UINT32 dialog_id; /* TWT dialog ID */
|
||||
} wmi_twt_btwt_remove_sta_cmd_fixed_param;
|
||||
|
||||
/* status code of removing STA from B-TWT dialog */
|
||||
typedef enum _WMI_TWT_BTWT_REMOVE_STA_STATUS_T {
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_OK, /* removing STA from B-TWT successfully completed */
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_DIALOG_ID_NOT_EXIST, /* TWT dialog ID not exists */
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_INVALID_PARAM, /* invalid parameters */
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_DIALOG_ID_BUSY, /* FW is in the process of handling this dialog */
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_NOT_JOINED, /* peer STA not joined yet */
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_NO_RESOURCE, /* FW resource exhausted */
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_NO_ACK, /* peer STA did not ACK the request/response frame */
|
||||
WMI_TWT_BTWT_REMOVE_STA_STATUS_UNKNOWN_ERROR, /* failed with an unknown reason */
|
||||
} WMI_TWT_BTWT_REMOVE_STA_STATUS_T;
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 tlv_header; /* TLV tag and len; tag equals wmi_twt_btwt_remove_sta_complete_event_fixed_param */
|
||||
A_UINT32 vdev_id; /* VDEV identifier */
|
||||
wmi_mac_addr peer_macaddr; /* peer MAC address */
|
||||
A_UINT32 dialog_id; /* TWT dialog ID */
|
||||
A_UINT32 status; /* refer to WMI_TWT_BTWT_REMOVE_STA_STATUS_T */
|
||||
} wmi_twt_btwt_remove_sta_complete_event_fixed_param;
|
||||
|
||||
typedef enum {
|
||||
WMI_DMA_RING_CONFIG_MODULE_SPECTRAL,
|
||||
WMI_DMA_RING_CONFIG_MODULE_RTT,
|
||||
|
|
@ -25109,6 +25356,18 @@ typedef struct {
|
|||
* in HOST.
|
||||
*/
|
||||
A_UINT32 reset_delay;
|
||||
/**
|
||||
* Current center freq1 (MHz units)
|
||||
*/
|
||||
A_UINT32 freq1;
|
||||
/**
|
||||
* Current center freq2 (MHz units)
|
||||
*/
|
||||
A_UINT32 freq2;
|
||||
/**
|
||||
* Channel Width (MHz units)
|
||||
*/
|
||||
A_UINT32 ch_width;
|
||||
} wmi_dma_buf_release_spectral_meta_data;
|
||||
|
||||
typedef enum {
|
||||
|
|
@ -25649,6 +25908,37 @@ typedef struct {
|
|||
A_UINT32 pulse_width; /** Duration of pulse in micro seconds */
|
||||
} wmi_hpcs_pulse_start_cmd_fixed_param;
|
||||
|
||||
typedef struct {
|
||||
/* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_muedca_params_config_event_fixed_param */
|
||||
A_UINT32 tlv_header; /** TLV Header */
|
||||
A_UINT32 pdev_id;
|
||||
/*
|
||||
* The following per-AC arrays are indexed using the
|
||||
* WMI_AC_xxx / wmi_traffic_ac enum values.
|
||||
*/
|
||||
/* aifsn
|
||||
* Arbitration inter frame spacing number (AIFSN)
|
||||
* Values are integers used for back off computation.
|
||||
*/
|
||||
A_UINT32 aifsn[WMI_AC_MAX];
|
||||
/* ecwmin
|
||||
* Exponent form of ContentionWindow min (ECWmin)
|
||||
* Values are integers used for back off computation.
|
||||
*/
|
||||
A_UINT32 ecwmin[WMI_AC_MAX];
|
||||
/* ecwmax
|
||||
* Exponent form of ContentionWindow max (ECWmax)
|
||||
* Values are integers used for back off computation.
|
||||
*/
|
||||
A_UINT32 ecwmax[WMI_AC_MAX];
|
||||
/* muedca_expiration_time
|
||||
* MU EDCA Expiration time refers to the length of time after the most
|
||||
* recent UL trigger time. The MU EDCA Timer field indicates the time
|
||||
* limit, in units of 8 TUs
|
||||
*/
|
||||
A_UINT32 muedca_expiration_time[WMI_AC_MAX];
|
||||
} wmi_muedca_params_config_event_fixed_param;
|
||||
|
||||
/* Default PE Duration subfield indicates the PE duration in units of 4 us */
|
||||
#define WMI_HEOPS_DEFPE_GET_D3(he_ops) WMI_GET_BITS(he_ops, 0, 3)
|
||||
#define WMI_HEOPS_DEFPE_SET_D3(he_ops, value) WMI_SET_BITS(he_ops, 0, 3, value)
|
||||
|
|
@ -26496,8 +26786,8 @@ typedef struct {
|
|||
#define WMI_HEOPS_DEFPE_SET WMI_HEOPS_DEFPE_SET_D2
|
||||
#define WMI_HEOPS_TWT_REQUIRED_GET WMI_HEOPS_TWT_REQUIRED_GET_D2
|
||||
#define WMI_HEOPS_TWT_REQUIRED_SET WMI_HEOPS_TWT_REQUIRED_SET_D2
|
||||
#define WMI_HEOPS_TWT_GET WMI_HEOPS_TWT_GET_D2 /* Depricated */
|
||||
#define WMI_HEOPS_TWT_SET WMI_HEOPS_TWT_SET_D2 /* Depricated */
|
||||
#define WMI_HEOPS_TWT_GET WMI_HEOPS_TWT_GET_D2 /* Deprecated */
|
||||
#define WMI_HEOPS_TWT_SET WMI_HEOPS_TWT_SET_D2 /* Deprecated */
|
||||
#define WMI_HEOPS_RTSTHLD_GET WMI_HEOPS_RTSTHLD_GET_D2
|
||||
#define WMI_HEOPS_RTSTHLD_SET WMI_HEOPS_RTSTHLD_SET_D2
|
||||
#define WMI_HEOPS_PARTBSSCOLOR_GET WMI_HEOPS_PARTBSSCOLOR_GET_D2
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@
|
|||
#define __WMI_VER_MINOR_ 0
|
||||
/** WMI revision number has to be incremented when there is a
|
||||
* change that may or may not break compatibility. */
|
||||
#define __WMI_REVISION_ 679
|
||||
#define __WMI_REVISION_ 690
|
||||
|
||||
/** The Version Namespace should not be normally changed. Only
|
||||
* host and firmware of the same WMI namespace will work
|
||||
|
|
|
|||
Loading…
Reference in a new issue