From 1cefdf74e499df4f9c2ab78242a34dd651975450 Mon Sep 17 00:00:00 2001 From: Christopher Braga Date: Sun, 23 Feb 2020 12:28:25 -0500 Subject: [PATCH] drm: msm: sde: Clear SB DMA flag upon sending SB DMA last command Previous SB DMA logic was not clearing a "SB DMA active" flag, resulting in SB DMA incorrectly being flushed every frame. While this logic matches the DB DMA approach, it is unnecessary and could result in delayed DB DMA execution. Update SB DMA logic to clear the "active" flag for the target DSPP immediately after the SB DMA is flushed. Change-Id: I3dc0792a50d7dec42cb32bf8cd1e3d0b217cf582 Signed-off-by: Christopher Braga --- msm/sde/sde_color_processing.c | 1 + 1 file changed, 1 insertion(+) diff --git a/msm/sde/sde_color_processing.c b/msm/sde/sde_color_processing.c index 97b8df157c56..9448420119b5 100644 --- a/msm/sde/sde_color_processing.c +++ b/msm/sde/sde_color_processing.c @@ -1547,6 +1547,7 @@ void sde_cp_dspp_flush_helper(struct sde_crtc *sde_crtc, u32 feature) if (feature == SDE_CP_CRTC_DSPP_SB) { if (!dspp->sb_dma_in_use) continue; + dspp->sb_dma_in_use = false; _flush_sb_dma_hw(active_ctls, ctl, sizeof(active_ctls));