From 0c3551b1a330a0fa52ee11e7e400cb2d4bf4094a Mon Sep 17 00:00:00 2001 From: Mukund Madhusudan Atre Date: Sun, 5 Jan 2020 17:35:42 -0800 Subject: [PATCH] ARM: dts: msm: Fix supply and areg clock name in ife2 dt node for Lahaina Fix supply and clock name in ife2 dt node. Also, remove DSP clock as IFE2 does not support HVX for Lahaina target. CRs-Fixed: 2584631 Change-Id: Ia0f58142e9562446d4e7c517cd717d5cc78c200c --- lahaina-camera.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/lahaina-camera.dtsi b/lahaina-camera.dtsi index cc3446ac1727..6d93cc87f8a2 100644 --- a/lahaina-camera.dtsi +++ b/lahaina-camera.dtsi @@ -1346,7 +1346,7 @@ interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; - ife1-supply = <&cam_cc_ife_2_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; clock-names = "ife_csid_clk_src", "ife_csid_clk", @@ -1391,7 +1391,7 @@ interrupts = ; regulator-names = "camss", "ife2"; camss-supply = <&cam_cc_titan_top_gdsc>; - ife1-supply = <&cam_cc_ife_2_gdsc>; + ife2-supply = <&cam_cc_ife_2_gdsc>; clock-names = "ife_2_ahb", "ife_2_areg", @@ -1413,11 +1413,8 @@ clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", "turbo"; src-clock-name = "ife_clk_src"; - scl-clk-names = "ife_1_areg"; + scl-clk-names = "ife_2_areg"; clock-control-debugfs = "true"; - clock-names-option = "ife_dsp_clk"; - clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>; - clock-rates-option = <720000000>; ubwc-static-cfg = <0x1026 0x1036>; status = "ok"; };