A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-11 15:11:48 -04:00
Code Issues Projects Releases Packages Wiki Activity

Merge "cnss2: Log SW_CTRL GPIO value if PCIe link training fails"

Browse source
This commit is contained in:
qctecmdr 2021-04-12 20:21:32 -07:00 • committed by Gerrit - the friendly Code Review server
commit 0ce006ce47
3 changed files with 38 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

3
drivers/net/wireless/cnss2/main.h
View file

@ -97,6 +97,7 @@ struct cnss_pinctrl_info {
struct pinctrl_state *wlan_en_sleep;
int bt_en_gpio;
int xo_clk_gpio; /*qca6490 only */
int sw_ctrl_gpio;
};
#if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
@ -569,5 +570,5 @@ int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
const struct firmware **fw_entry,
const char *filename);
void cnss_disable_redundant_vreg(struct cnss_plat_data *plat_priv);
int cnss_gpio_get_value(struct cnss_plat_data *plat_priv, int gpio_num);
#endif /* _CNSS_MAIN_H */

7
drivers/net/wireless/cnss2/pci.c
View file

@ -2433,7 +2433,7 @@ static int cnss_qca6290_powerup(struct cnss_pci_data *pci_priv)
int ret = 0;
struct cnss_plat_data *plat_priv = pci_priv->plat_priv;
unsigned int timeout;
int retry = 0;
int retry = 0, sw_ctrl_gpio = plat_priv->pinctrl_info.sw_ctrl_gpio;
if (plat_priv->ramdump_info_v2.dump_data_valid) {
cnss_pci_clear_dump_info(pci_priv);
@ -2454,6 +2454,8 @@ retry:
ret = cnss_resume_pci_link(pci_priv);
if (ret) {
cnss_pr_err("Failed to resume PCI link, err = %d\n", ret);
cnss_pr_dbg("Value of SW_CTRL GPIO: %d\n",
cnss_gpio_get_value(plat_priv, sw_ctrl_gpio));
if (test_bit(IGNORE_PCI_LINK_FAILURE,
&plat_priv->ctrl_params.quirks)) {
cnss_pr_dbg("Ignore PCI link resume failure\n");
@ -2463,6 +2465,9 @@ retry:
if (ret == -EAGAIN && retry++ < POWER_ON_RETRY_MAX_TIMES) {
cnss_power_off_device(plat_priv);
cnss_pr_dbg("Retry to resume PCI link #%d\n", retry);
cnss_pr_dbg("Value of SW_CTRL GPIO: %d\n",
cnss_gpio_get_value(plat_priv,
sw_ctrl_gpio));
msleep(POWER_ON_RETRY_DELAY_MS * retry);
goto retry;
}

31
drivers/net/wireless/cnss2/power.c
View file

@ -4,12 +4,12 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/pinctrl/consumer.h>
#include <linux/regulator/consumer.h>
#if IS_ENABLED(CONFIG_QCOM_COMMAND_DB)
#include <soc/qcom/cmd-db.h>
#endif
#include <linux/of_gpio.h>
#include "main.h"
#include "debug.h"
@ -54,6 +54,7 @@ static struct cnss_clk_cfg cnss_clk_list[] = {
#define WLAN_EN_GPIO "wlan-en-gpio"
#define BT_EN_GPIO "qcom,bt-en-gpio"
#define XO_CLK_GPIO "qcom,xo-clk-gpio"
#define SW_CTRL_GPIO "qcom,sw-ctrl-gpio"
#define WLAN_EN_ACTIVE "wlan_en_active"
#define WLAN_EN_SLEEP "wlan_en_sleep"
#define WLAN_VREGS_PROP "wlan_vregs"
@ -786,6 +787,17 @@ int cnss_get_pinctrl(struct cnss_plat_data *plat_priv)
} else {
pinctrl_info->xo_clk_gpio = -EINVAL;
}
if (of_find_property(dev->of_node, SW_CTRL_GPIO, NULL)) {
pinctrl_info->sw_ctrl_gpio = of_get_named_gpio(dev->of_node,
SW_CTRL_GPIO,
0);
cnss_pr_dbg("Switch control GPIO: %d\n",
pinctrl_info->sw_ctrl_gpio);
} else {
pinctrl_info->sw_ctrl_gpio = -EINVAL;
}
return 0;
out:
return ret;
@ -936,6 +948,23 @@ set_wlan_en:
return ret;
}
int cnss_gpio_get_value(struct cnss_plat_data *plat_priv, int gpio_num)
{
int ret;
if (gpio_num < 0)
return -EINVAL;
ret = gpio_direction_input(gpio_num);
if (ret) {
cnss_pr_err("Failed to set direction of GPIO(%d), err = %d",
gpio_num, ret);
return -EINVAL;
}
return gpio_get_value(gpio_num);
}
int cnss_power_on_device(struct cnss_plat_data *plat_priv)
{
int ret = 0;