A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-14 08:36:12 -04:00
Code Issues Projects Releases Packages Wiki Activity

scsi: ufs-qcom: Add reset control support for host controller

Browse source 
Add reset control for host controller so that host controller can be reset
as required in its power up sequence.

Change-Id: I7aae30c859426cad0c995400e747883fc60fef17
Signed-off-by: Can Guo <cang@codeaurora.org>
This commit is contained in:
Can Guo 2019-10-09 23:42:58 -07:00
commit 0cf02ecf9d
2 changed files with 56 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

53
drivers/scsi/ufs/ufs-qcom.c
View file

@ -413,6 +413,44 @@ static void ufs_qcom_select_unipro_mode(struct ufs_qcom_host *host)
mb();
}
/**
* ufs_qcom_host_reset - reset host controller and PHY
*/
static int ufs_qcom_host_reset(struct ufs_hba *hba)
{
int ret = 0;
struct ufs_qcom_host *host = ufshcd_get_variant(hba);
if (!host->core_reset) {
dev_warn(hba->dev, "%s: reset control not set\n", __func__);
goto out;
}
ret = reset_control_assert(host->core_reset);
if (ret) {
dev_err(hba->dev, "%s: core_reset assert failed, err = %d\n",
__func__, ret);
goto out;
}
/*
* The hardware requirement for delay between assert/deassert
* is at least 3-4 sleep clock (32.7KHz) cycles, which comes to
* ~125us (4/32768). To be on the safe side add 200us delay.
*/
usleep_range(200, 210);
ret = reset_control_deassert(host->core_reset);
if (ret)
dev_err(hba->dev, "%s: core_reset deassert failed, err = %d\n",
__func__, ret);
usleep_range(1000, 1100);
out:
return ret;
}
static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
{
struct ufs_qcom_host *host = ufshcd_get_variant(hba);
@ -421,6 +459,12 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
bool is_rate_B = (UFS_QCOM_LIMIT_HS_RATE == PA_HS_MODE_B)
? true : false;
/* Reset UFS Host Controller and PHY */
ret = ufs_qcom_host_reset(hba);
if (ret)
dev_warn(hba->dev, "%s: host reset returned %d\n",
__func__, ret);
#ifdef CONFIG_SCSI_UFSHCD_QTI
/* Use Rate-A for Gear4 on non-simulation platforms */
if (hba->phy_init_g4) {
@ -2001,6 +2045,15 @@ static int ufs_qcom_init(struct ufs_hba *hba)
host->hba = hba;
ufshcd_set_variant(hba, host);
/* Setup the reset control of HCI */
host->core_reset = devm_reset_control_get(hba->dev, "rst");
if (IS_ERR(host->core_reset)) {
err = PTR_ERR(host->core_reset);
dev_warn(dev, "Failed to get reset control %d\n", err);
host->core_reset = NULL;
err = 0;
}
/* Fire up the reset controller. Failure here is non-fatal. */
host->rcdev.of_node = dev->of_node;
host->rcdev.ops = &ufs_qcom_reset_ops;

3
drivers/scsi/ufs/ufs-qcom.h
View file

@ -6,6 +6,7 @@
#define UFS_QCOM_H_
#include <linux/reset-controller.h>
#include <linux/reset.h>
#include <linux/phy/phy.h>
#include "ufshcd.h"
#ifdef CONFIG_SCSI_UFSHCD_QTI
@ -312,6 +313,8 @@ struct ufs_qcom_host {
u32 dbg_print_en;
struct ufs_qcom_testbus testbus;
/* Reset control of HCI */
struct reset_control *core_reset;
struct reset_controller_dev rcdev;
struct gpio_desc *device_reset;