mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-10 14:19:09 -04:00
Makefile:add config for penang5g row sm4375
update makefile and add dtsi for penangb to build pass Change-Id: I663bfcb5500a981207c644fc577ffff72645ffd5 Signed-off-by: caoqian4 <caoqian4@motorola.com> Reviewed-on: https://gerrit.mot.com/2550756 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Submit-Approved: Jira Key Tested-by: Jira Key Reviewed-by: Lu Lu <lulu2@lenovo.com> (cherry picked from commit 91768443c939590ac1fb9902fa738db95c3d1fb6) Reviewed-on: https://gerrit.mot.com/2552225 Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
This commit is contained in:
parent
61e6140a27
commit
0daf3e7c80
19 changed files with 2911 additions and 0 deletions
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@ -114,6 +114,15 @@ holi-penang-evt1-overlay.dtbo-base := holi-moto-base.dtb
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holi-penang-dvt2-jp-overlay.dtbo-base := holi-moto-base.dtb
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holi-penang-dvt2-sb-overlay.dtbo-base := holi-moto-base.dtb
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dtbo-$(CONFIG_PENANGB_DTB) += \
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holi-penangb-dvt2-jp-overlay.dtbo \
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holi-penangb-dvt2-sb-overlay.dtbo \
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holi-penangb-evt1-overlay.dtbo
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holi-penangb-evt1-overlay.dtbo-base := holi-moto-base.dtb
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holi-penangb-dvt2-jp-overlay.dtbo-base := holi-moto-base.dtb
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holi-penangb-dvt2-sb-overlay.dtbo-base := holi-moto-base.dtb
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dtbo-$(CONFIG_PNANGN_DTB) += \
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holi-pnangn-evt1-overlay.dtbo
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27
qcom/bat_setting/CW_nd50-atl-5000mah-penangb5g.dtsi
Normal file
27
qcom/bat_setting/CW_nd50-atl-5000mah-penangb5g.dtsi
Normal file
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@ -0,0 +1,27 @@
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/*
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* Copyright (C) 2021 Motorola Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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nd50-atl-5000mah {
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serialnum = "SB18D34202";
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fcc_design = <5000>;
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ui_full = <99>;
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config_profile_info = [5A 00 00 00 00 00 00 00
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A7 B6 BC CA B9 B2 AE 6F
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51 FF FF CF 97 82 68 57
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50 4F 4D 86 D9 DE E3 E8
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D8 CF D4 D6 D3 D1 CE CA
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C6 C5 CC BA 9A 8F 85 7E
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6E 6E 7B 8E A5 8E 67 66
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80 00 57 10 00 A0 63 00
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00 00 64 22 C3 5C 00 00
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00 00 00 00 00 00 00 42 ];
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};
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27
qcom/bat_setting/CW_nd50-atl-5000mah_new-penangb5g.dtsi
Normal file
27
qcom/bat_setting/CW_nd50-atl-5000mah_new-penangb5g.dtsi
Normal file
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@ -0,0 +1,27 @@
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/*
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* Copyright (C) 2021 Motorola Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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nd50-atl-5000mah_new {
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serialnum = "SB18D69208";
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fcc_design = <5000>;
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ui_full = <99>;
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config_profile_info = [5A 00 00 00 00 00 00 00
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A7 B6 BC CA B9 B2 AE 6F
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51 FF FF CF 97 82 68 57
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50 4F 4D 86 D9 DE E3 E8
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D8 CF D4 D6 D3 D1 CE CA
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C6 C5 CC BA 9A 8F 85 7E
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6E 6E 7B 8E A5 8E 67 66
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80 00 57 10 00 A0 63 00
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00 00 64 22 C3 5C 00 00
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00 00 00 00 00 00 00 42 ];
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};
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27
qcom/bat_setting/CW_nd50-jiade-5000mah-penangb5g.dtsi
Normal file
27
qcom/bat_setting/CW_nd50-jiade-5000mah-penangb5g.dtsi
Normal file
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@ -0,0 +1,27 @@
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/*
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* Copyright (C) 2021 Motorola Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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nd50-jiade-5000mah {
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serialnum = "SB18D45495";
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fcc_design = <5000>;
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ui_full = <99>;
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config_profile_info = [5A 00 00 00 00 00 00 00
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9E C0 C3 C6 B9 B6 AA 6D
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47 FF D7 9D 82 6A 5B 52
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4D 4D 4C 7D D9 DE 8C D2
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CA C9 D1 D5 D4 D2 CF CA
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C7 C7 D5 B8 9C 91 89 82
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7C 7C 85 95 AB 87 67 73
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80 00 57 10 00 A0 6E 00
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00 00 64 21 C3 6E 00 00
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00 00 00 00 00 00 00 F0 ];
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};
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27
qcom/bat_setting/CW_nd50-jiade-5000mah_new-penangb5g.dtsi
Normal file
27
qcom/bat_setting/CW_nd50-jiade-5000mah_new-penangb5g.dtsi
Normal file
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@ -0,0 +1,27 @@
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/*
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* Copyright (C) 2021 Motorola Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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nd50-jiade-5000mah_new {
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serialnum = "SB18D69209";
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fcc_design = <5000>;
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ui_full = <99>;
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config_profile_info = [5A 00 00 00 00 00 00 00
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9E C0 C3 C6 B9 B6 AA 6D
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47 FF D7 9D 82 6A 5B 52
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4D 4D 4C 7D D9 DE 8C D2
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CA C9 D1 D5 D4 D2 CF CA
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C7 C7 D5 B8 9C 91 89 82
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7C 7C 85 95 AB 87 67 73
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80 00 57 10 00 A0 6E 00
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00 00 64 21 C3 6E 00 00
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00 00 00 00 00 00 00 F0 ];
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};
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224
qcom/discrete_charging_penangb.dtsi
Normal file
224
qcom/discrete_charging_penangb.dtsi
Normal file
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@ -0,0 +1,224 @@
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/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/iio/qti_power_supply_iio.h>
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#include "rt1711h-penang.dtsi"
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#include "sgm7220-penang.dtsi"
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#include "discrete-rt-pd-manger.dtsi"
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&pm6125_vadc {
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gpio6_div3{
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reg = <ADC5_GPIO3_DIV3>;
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label = "gpio3_div3";
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qcom,pre-scaling = <1 3>;
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};
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};
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&pm6125_gpios {
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gpio6_adc{
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gpio6_adc_default:gpio6_adc_default{
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pins = "gpio6";
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function = "normal";
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bias-high-impedance;
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};
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};
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};
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&qupv3_se8_i2c {
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status = "okay";
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cw2217@64 {
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compatible = "cellwise,cw2217";
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reg = <0x64>;
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status = "okay";
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sense_r_mohm = <5>;
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factory_mode_ntc_exist = <0>;
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df-serialnum = "SB18D34202";
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#include "bat_setting/CW_nd50-atl-5000mah-penang5g.dtsi"
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#include "bat_setting/CW_nd50-atl-5000mah_new-penang5g.dtsi"
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#include "bat_setting/CW_nd50-jiade-5000mah-penang5g.dtsi"
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#include "bat_setting/CW_nd50-jiade-5000mah_new-penang5g.dtsi"
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#include "bat_setting/CW_nd50-local-5000mah.dtsi"
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};
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};
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&qupv3_se10_i2c {
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status = "okay";
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sgm41543: sgm41543@0B {
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status = "okay";
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compatible = "sgm,sgm41543D";
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reg = <0x0B>;
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pinctrl-names = "default";
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pinctrl-0 = <&sgm4154x_gpio_pins &gpio6_adc_default>;
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#io-channel-cells = <1>;
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io-channels = <&pm6125_vadc ADC5_GPIO3_DIV3>;
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io-channel-names = "gpio3_div3";
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interrupt-parent = <&tlmm>;
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interrupts = <59 0>; //irq num base on hardware design
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sgm,irq-gpio = <&tlmm 59 0>; //irq num base on hardware design
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// sgm,chg-en-gpio = <&tlmm 45 0>; //gpio num base on hardware design 1.MTK parent node name is pio 2.QUALCOMM parent node name is tlmm or other
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dpdm-supply = <&qusb_phy0>;
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mmi,qc3-support;
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sgm,18w_iindpm_comp;
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/* enable dynamic adjust battery voltage */
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enable_dynamic_adjust_batvol;
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/* enable dynamic adjust vindpm */
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enable_dynamic_adjust_vindpm;
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enable_sw_jeita;
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jeita_temp_above_t4_cv = <0>;
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jeita_temp_t3_to_t4_cv = <4100000>;
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jeita_temp_t2_to_t3_cv = <4350000>;
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jeita_temp_t1_to_t2_cv = <4350000>;
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jeita_temp_t0_to_t1_cv = <0>;
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jeita_temp_below_t0_cv = <0>;
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jeita_temp_above_t4_cc_current = <0>;
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jeita_temp_t3_to_t4_cc_current = <1000000>;
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jeita_temp_t2_to_t3_cc_current = <1250000>;
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jeita_temp_t1_to_t2_cc_current = <1000000>;
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jeita_temp_below_t0_cc_current = <0>;
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temp_t4_thres = <50>;
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temp_t4_thres_minus_x_degree = <48>;
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temp_t3_thres = <45>;
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temp_t3_thres_minus_x_degree = <45>;
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temp_t2_thres = <20>;
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temp_t2_thres_plus_x_degree = <15>;
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temp_t1_thres = <0>;
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temp_t1_thres_plus_x_degree = <0>;
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temp_t0_thres = <0>;
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temp_t0_thres_plus_x_degree = <2>;
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temp_neg_10_thres = <0>;
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};
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bq25890: bq25890@6A {
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status = "okay";
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compatible = "ti,bq2589x-1";
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reg = <0x6A>;
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pinctrl-names = "default";
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pinctrl-0 = <&bq2589x_irq &gpio6_adc_default>;
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#io-channel-cells = <1>;
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io-channels = <&pm6125_vadc ADC5_GPIO3_DIV3>;
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io-channel-names = "gpio3_div3";
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bq2589x_irq-gpio = <&tlmm 59 0>;
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//bq2589x_en-gpio = <&tlmm 45 0>;
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dpdm-supply = <&qusb_phy0>;
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mmi,qc3-support;
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/* enable dynamic adjust battery voltage */
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enable_dynamic_adjust_batvol;
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/* enable dynamic adjust vindpm */
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enable_dynamic_adjust_vindpm;
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ti,bq2589x,vbus-volt-high-level = <8700>;/* tune adapter to output 9v */
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ti,bq2589x,vbus-volt-low-level = <4400>;/* tune adapter to output 5v */
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ti,bq2589x,vbat-min-volt-to-tuneup = <3000>;
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ti,bq2589x,charge-voltage = <4450>;
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ti,bq2589x,charge-current = <3000>;
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ti,bq2589x,term-current = <128>;
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ti,bq2589x,enable-auto-dpdm;
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ti,bq2589x,enable-termination;
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ti,bq2589x,enable-ico;
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ti,bq2589x,use-absolute-vindpm;
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};
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};
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&soc {
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mmi_charger: mmi,charger {
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status = "ok"
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compatible = "mmi,mmi-charger";
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mmi,enable-charging-limit;
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mmi,upper-limit-capacity = <70>;
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mmi,lower-limit-capacity = <65>;
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mmi,heartbeat-interval = <5000>;
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mmi,dcp-power-max = <10000>;
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mmi,hvdcp-power-max = <18000>;
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};
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mmi_discrete_charger: mmi,discrete-charging {
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status = "ok"
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compatible = "mmi,mmi-discrete-charger";
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#io-channel-cells = <1>;
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battery-names = "battery";
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supplied-from = "mmi_battery";
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mmi,chrg-iterm-ma = <243>;
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mmi,fg-iterm-ma = <500>;
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mmi,max-fv-mv = <4450>;
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mmi,max-fcc-ma = <4000>;
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mmi,demo-fv-mv = <4000>;
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mmi,otg-cl-ua = <1200000>;
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mmi,df-serialnum = "SB18D34202";
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mmi,mmi-temp-zones = <0 4200 1000 0>,
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<10 4250 2500 1000>,
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<15 0 2500 2500>,
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<45 0 3600 3600>,
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<60 4200 3600 0>;
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mmi,thermal-mitigation = <3600000 3300000 3000000 2500000
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2000000 1500000
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1200000 900000
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500000 300000>;
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};
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};
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&tlmm {
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sgm4154x_gpio_pins: sgm4154x_gpio_pins {
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mux {
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pins = "gpio59";
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function = "gpio";
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};
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config {
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pins = "gpio59";
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drive-strength = <2>;
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bias-pull-up;
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input-enable;
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};
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};
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bq2589x_irq: bq2589x_irq {
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mux {
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pins = "gpio59";
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function = "gpio";
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};
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config {
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pins = "gpio59";
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drive-strength = <2>;
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bias-pull-up;
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input-enable;
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};
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};
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/*
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chg_irq_default: chg_irq_default {
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mux {
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pins = "gpio59";
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function = "gpio";
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};
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config {
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pins = "gpio59";
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bias-pull-up;
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drive-strength = <2>;
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input-enable;
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};
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};
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*/
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};
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367
qcom/holi-audio-penangb-overlay.dtsi
Normal file
367
qcom/holi-audio-penangb-overlay.dtsi
Normal file
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@ -0,0 +1,367 @@
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#include <dt-bindings/clock/qcom,audio-ext-clk.h>
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#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
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#include <dt-bindings/sound/audio-codec-port-types.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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&cdc_dmic01_gpios {
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status = "disabled";
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};
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&cdc_dmic23_gpios {
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status = "disabled";
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};
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&rx_swr_gpios {
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status = "okay";
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};
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&dai_mi2s0_rx {
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status = "okay";
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qcom,msm-mi2s-lines = <1>;
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};
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&dai_mi2s0_tx {
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status = "okay";
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qcom,msm-mi2s-lines = <0>;
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};
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&dai_mi2s1_rx {
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status = "okay";
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qcom,msm-mi2s-lines = <1>;
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};
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&dai_mi2s1_tx {
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status = "okay";
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qcom,msm-mi2s-lines = <2>;
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};
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&dai_mi2s2_rx {
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status = "okay";
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qcom,msm-mi2s-lines = <1>;
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};
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&dai_mi2s2_tx {
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status = "okay";
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qcom,msm-mi2s-lines = <0>;
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};
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&dai_mi2s3_rx {
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status = "okay";
|
||||
qcom,msm-mi2s-lines = <1>;
|
||||
};
|
||||
|
||||
&dai_mi2s3_tx {
|
||||
status = "okay";
|
||||
qcom,msm-mi2s-lines = <0>;
|
||||
};
|
||||
|
||||
&bolero {
|
||||
qcom,num-macros = <3>;
|
||||
qcom,bolero-version = <5>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
bolero-clk-rsc-mngr {
|
||||
compatible = "qcom,bolero-clk-rsc-mngr";
|
||||
qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
|
||||
<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
|
||||
qcom,rx_mclk_mode_muxsel = <0x0A5640D8>;
|
||||
qcom,va_mclk_mode_muxsel = <0x0A7A0000>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
|
||||
"va_core_clk", "va_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
|
||||
<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
|
||||
<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
|
||||
};
|
||||
|
||||
va_macro: va-macro@A730000 {
|
||||
compatible = "qcom,va-macro";
|
||||
reg = <0xA730000 0x0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,va-dmic-sample-rate = <600000>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
qcom,is-used-swr-gpio = <1>;
|
||||
qcom,va-swr-gpios = <&va_swr_gpios>;
|
||||
swr0: va_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
qcom,is_wcd937x = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <3>;
|
||||
qcom,swrm-hctl-reg = <0x0A7EC100>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0xA740000 0x0>;
|
||||
interrupts-extended =
|
||||
<&wakegic 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&tlmm 128 GPIO_ACTIVE_HIGH>;
|
||||
interrupt-names = "swr_master_irq", "swr_wake_irq";
|
||||
qcom,swr-num-ports = <3>;
|
||||
qcom,swr-port-mapping = <1 SWRM_TX1_CH1 0x1>,
|
||||
<1 SWRM_TX1_CH2 0x2>,
|
||||
<1 SWRM_TX1_CH3 0x4>, <1 SWRM_TX1_CH4 0x8>,
|
||||
<2 SWRM_TX2_CH1 0x1>, <2 SWRM_TX2_CH2 0x2>,
|
||||
<2 SWRM_TX2_CH3 0x4>, <2 SWRM_TX2_CH4 0x8>,
|
||||
<3 SWRM_TX3_CH1 0x1>, <3 SWRM_TX3_CH2 0x2>,
|
||||
<3 SWRM_TX3_CH3 0x4>, <3 SWRM_TX3_CH4 0x8>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-phy-dev-addr = <0x0A 0x01170223>,
|
||||
<0x08 0x58350223>,
|
||||
<0x08 0x58350222>,
|
||||
<0x08 0x58350221>,
|
||||
<0x08 0x58350220>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
qcom,swr-mstr-irq-wakeup-capable = <1>;
|
||||
qcom,is-always-on = <1>;
|
||||
wcd937x_tx_slave: wcd937x-tx-slave {
|
||||
compatible = "qcom,wcd937x-slave";
|
||||
reg = <0x0A 0x01170223>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tx_macro: tx-macro@A620000 {
|
||||
compatible = "qcom,tx-macro";
|
||||
reg = <0xA620000 0x0>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>,
|
||||
<&clock_audio_tx_2 0>;
|
||||
qcom,tx-dmic-sample-rate = <2400000>;
|
||||
qcom,is-used-swr-gpio = <0>;
|
||||
};
|
||||
|
||||
rx_macro: rx-macro@A600000 {
|
||||
compatible = "qcom,rx-macro";
|
||||
reg = <0xA600000 0x0>;
|
||||
clock-names = "rx_core_clk", "rx_npl_clk";
|
||||
clocks = <&clock_audio_rx_1 0>,
|
||||
<&clock_audio_rx_2 0>;
|
||||
qcom,rx-swr-gpios = <&rx_swr_gpios>;
|
||||
qcom,rx_mclk_mode_muxsel = <0xA5640D8>;
|
||||
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
swr1: rx_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <2>;
|
||||
qcom,swrm-hctl-reg = <0x0A6A9098>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0xA610000 0x0>;
|
||||
interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "swr_master_irq";
|
||||
qcom,swr-num-ports = <6>;
|
||||
qcom,swr-port-mapping = <1 HPH_L 0x1>,
|
||||
<1 HPH_R 0x2>, <2 CLSH 0x1>,
|
||||
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
|
||||
<4 LO 0x1>, <5 DSD_L 0x1>,
|
||||
<5 DSD_R 0x2>, <6 PCM_OUT1 0x01>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
wcd937x_rx_slave: wcd937x-rx-slave {
|
||||
compatible = "qcom,wcd937x-slave";
|
||||
reg = <0x0A 0x01170224>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wcd937x_codec: wcd937x-codec {
|
||||
compatible = "qcom,wcd937x-codec";
|
||||
qcom,split-codec = <1>;
|
||||
qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
|
||||
<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
|
||||
<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
|
||||
<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
|
||||
<4 DSD_R 0x2 0 DSD_R>;
|
||||
qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>,
|
||||
<1 ADC2 0x1 0 SWRM_TX2_CH1>,
|
||||
<1 ADC3 0x2 0 SWRM_TX2_CH2>,
|
||||
<2 DMIC0 0x1 0 SWRM_TX1_CH4>,
|
||||
<2 DMIC1 0x2 0 SWRM_TX2_CH1>,
|
||||
<2 MBHC 0x4 0 SWRM_TX2_CH2>,
|
||||
<3 DMIC2 0x1 0 SWRM_TX2_CH3>,
|
||||
<3 DMIC3 0x2 0 SWRM_TX2_CH4>,
|
||||
<3 DMIC4 0x4 0 SWRM_TX3_CH1>,
|
||||
<3 DMIC5 0x8 0 SWRM_TX3_CH2>;
|
||||
|
||||
qcom,wcd-rst-gpio-node = <&wcd937x_rst_gpio>;
|
||||
qcom,rx-slave = <&wcd937x_rx_slave>;
|
||||
qcom,tx-slave = <&wcd937x_tx_slave>;
|
||||
|
||||
cdc-vdd-rxtx-supply = <&L11A>;
|
||||
qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
|
||||
qcom,cdc-vdd-rxtx-current = <30000>;
|
||||
|
||||
cdc-vddpx-supply = <&L11A>;
|
||||
qcom,cdc-vddpx-voltage = <1800000 1800000>;
|
||||
qcom,cdc-vddpx-current = <30000>;
|
||||
|
||||
cdc-vdd-buck-supply = <&L14A>;
|
||||
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
|
||||
qcom,cdc-vdd-buck-current = <650000>;
|
||||
|
||||
cdc-vdd-mic-bias-supply = <&BOB>;
|
||||
qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
|
||||
qcom,cdc-vdd-mic-bias-current = <45000>;
|
||||
|
||||
qcom,cdc-micbias1-mv = <2800>;
|
||||
qcom,cdc-micbias2-mv = <2800>;
|
||||
qcom,cdc-micbias3-mv = <2800>;
|
||||
|
||||
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
|
||||
"cdc-vddpx",
|
||||
"cdc-vdd-mic-bias";
|
||||
qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
|
||||
};
|
||||
};
|
||||
|
||||
&holi_snd {
|
||||
qcom,model = "holi-9370_aw87xxx-snd-card";
|
||||
qcom,wcn-btfm = <1>;
|
||||
qcom,tdm-max-slots = <4>;
|
||||
qcom,mi2s-audio-intf = <0>;
|
||||
|
||||
qcom,audio-routing =
|
||||
"AMIC1", "Analog Mic1",
|
||||
"Analog Mic1", "MIC BIAS1",
|
||||
"AMIC2", "Analog Mic2",
|
||||
"Analog Mic2", "MIC BIAS2",
|
||||
"AMIC3", "Analog Mic3",
|
||||
"Analog Mic3", "MIC BIAS3",
|
||||
"Analog Mic4", "MIC BIAS3",
|
||||
"TX DMIC0", "Digital Mic0",
|
||||
"TX DMIC0", "MIC BIAS1",
|
||||
"TX DMIC1", "Digital Mic1",
|
||||
"TX DMIC1", "MIC BIAS1",
|
||||
"TX DMIC2", "Digital Mic2",
|
||||
"TX DMIC2", "MIC BIAS3",
|
||||
"TX DMIC3", "Digital Mic3",
|
||||
"TX DMIC3", "MIC BIAS3",
|
||||
"IN1_HPHL", "HPHL_OUT",
|
||||
"IN2_HPHR", "HPHR_OUT",
|
||||
"IN3_AUX", "AUX_OUT",
|
||||
"RX_TX DEC0_INP", "TX DEC0 MUX",
|
||||
"RX_TX DEC1_INP", "TX DEC1 MUX",
|
||||
"RX_TX DEC2_INP", "TX DEC2 MUX",
|
||||
"RX_TX DEC3_INP", "TX DEC3 MUX",
|
||||
"TX SWR_INPUT", "WCD_TX_OUTPUT",
|
||||
"VA SWR_INPUT", "VA_SWR_CLK",
|
||||
"VA SWR_INPUT", "WCD_TX_OUTPUT",
|
||||
"VA_AIF1 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF2 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF3 CAP", "VA_SWR_CLK",
|
||||
"VA DMIC0", "Digital Mic0",
|
||||
"VA DMIC1", "Digital Mic1",
|
||||
"VA DMIC2", "Digital Mic2",
|
||||
"VA DMIC3", "Digital Mic3",
|
||||
"VA DMIC4", "Digital Mic4",
|
||||
"VA DMIC5", "Digital Mic5",
|
||||
"VA DMIC0", "VA MIC BIAS1",
|
||||
"VA DMIC1", "VA MIC BIAS1",
|
||||
"VA DMIC2", "VA MIC BIAS3",
|
||||
"VA DMIC3", "VA MIC BIAS3";
|
||||
qcom,msm-mbhc-hphl-swh = <1>;
|
||||
qcom,msm-mbhc-gnd-swh = <1>;
|
||||
asoc-codec = <&stub_codec>, <&bolero>,
|
||||
<&wcd937x_codec>;
|
||||
asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
|
||||
"wcd937x_codec";
|
||||
qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&lpi_tlmm>,
|
||||
<&bolero>;
|
||||
qcom,msm-mbhc-hs-mic-max-threshold-mv = <2700>;
|
||||
qcom,msm-mbhc-hs-mic-min-threshold-mv = <116>;
|
||||
};
|
||||
|
||||
&qupv3_se7_i2c {
|
||||
status = "ok"
|
||||
aw887xx_smartpa_0: aw87xxx_pa@58 {
|
||||
compatible = "awinic,aw87xxx_pa";
|
||||
reg = <0x58>;
|
||||
dev_index = < 0 >;
|
||||
esd-enable = "true";
|
||||
aw-rx-topo-id = <0x1000ff00>;
|
||||
aw-rx-port-id = <0xB030>;
|
||||
status = "okay";
|
||||
};
|
||||
aw887xx_smartpa_1: aw87xxx_pa@59 {
|
||||
compatible = "awinic,aw87xxx_pa";
|
||||
reg = <0x59>;
|
||||
dev_index = < 1 >;
|
||||
esd-enable = "true";
|
||||
aw-rx-topo-id = <0x1000ff00>;
|
||||
aw-rx-port-id = <0xB030>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&va_cdc_dma_0_tx {
|
||||
qcom,msm-dai-is-island-supported = <1>;
|
||||
};
|
||||
|
||||
&soc {
|
||||
wcd937x_rst_gpio: msm_cdc_pinctrl@32 {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&wcd937x_reset_active>;
|
||||
pinctrl-1 = <&wcd937x_reset_sleep>;
|
||||
};
|
||||
|
||||
clock_audio_rx_1: rx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30E>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_rx_2: rx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30F>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_1: tx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30C>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_2: tx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30D>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_1: va_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30B>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_2: va_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x310>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&adsp_loader {
|
||||
nvmem-cells = <&adsp_variant>;
|
||||
nvmem-cell-names = "adsp_variant";
|
||||
adsp-fw-names = "adsp2";
|
||||
adsp-fw-bit-values = <0x1>;
|
||||
};
|
||||
622
qcom/holi-penangb-common-jp-overlay.dtsi
Normal file
622
qcom/holi-penangb-common-jp-overlay.dtsi
Normal file
|
|
@ -0,0 +1,622 @@
|
|||
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include "holi-audio-penang-overlay.dtsi"
|
||||
#include "holi-nopmi-moto-common-overlay.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include "holi-pmic-overlay-pm6125.dtsi"
|
||||
#include "holi-thermal-overlay-pm6125.dtsi"
|
||||
#include "display/holi-sde-display-mtp-pm6125.dtsi"
|
||||
#include "penang-fps-overlay.dtsi"
|
||||
#include "penang-display.dtsi"
|
||||
#include "penang-touchscreen.dtsi"
|
||||
#include "penang-fmr-overlay.dtsi"
|
||||
#include "camera/holi-camera-sensor-mot-penang-jp-overlay.dtsi"
|
||||
#include "discrete_charging_penang.dtsi"
|
||||
#include "moto_therm_sys_temp.dtsi"
|
||||
|
||||
&wcd937x_codec {
|
||||
cdc-vdd-rxtx-supply = <&L9A>;
|
||||
cdc-vddpx-supply = <&L9A>;
|
||||
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
|
||||
"cdc-vddpx";
|
||||
/*
|
||||
* Overriding cdc-vdd-mic-bias-supply to dummy value
|
||||
* to avoid compilation errors as BOB is not definied
|
||||
* for pm6125
|
||||
*/
|
||||
cdc-vdd-mic-bias-supply = <>;
|
||||
};
|
||||
|
||||
&holi_snd {
|
||||
qcom,msm-hs-linein-threshold = <4000>;
|
||||
};
|
||||
|
||||
/* Dummy LDO reference */
|
||||
&sdhc_1 {
|
||||
status = "disabled";
|
||||
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sdc1_on>;
|
||||
pinctrl-1 = <&sdc1_off>;
|
||||
|
||||
vdd-supply = <&L24A>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 570000>;
|
||||
|
||||
vdd-io-supply = <&L11A>;
|
||||
qcom,vdd-io-always-on;
|
||||
qcom,vdd-io-lpm-sup;
|
||||
qcom,vdd-io-voltage-level = <1800000 1800000>;
|
||||
qcom,vdd-io-current-level = <0 325000>;
|
||||
};
|
||||
|
||||
&sdhc_2 {
|
||||
status = "ok"
|
||||
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sdc2_on>;
|
||||
pinctrl-1 = <&sdc2_off>;
|
||||
|
||||
vdd-supply = <&L22A>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 800000>;
|
||||
|
||||
vdd-io-supply = <&L5A>;
|
||||
qcom,vdd-io-voltage-level = <1800000 2960000>;
|
||||
qcom,vdd-io-current-level = <0 22000>;
|
||||
|
||||
cd-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&ufsphy_mem {
|
||||
compatible = "qcom,ufs-phy-qmp-v3";
|
||||
|
||||
vdda-phy-supply = <&L7A>;
|
||||
vdda-pll-supply = <&L4A>;
|
||||
vdda-phy-max-microamp = <62900>;
|
||||
vdda-pll-max-microamp = <18300>;
|
||||
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
&ufshc_mem {
|
||||
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
|
||||
vdd-hba-fixed-regulator;
|
||||
|
||||
vcc-supply = <&L24A>;
|
||||
vcc-voltage-level = <2950000 2960000>;
|
||||
vcc-max-microamp = <800000>;
|
||||
|
||||
vccq2-supply = <&L11A>;
|
||||
vccq2-max-microamp = <800000>;
|
||||
vccq2-voltage-level = <1800000 1800000>;
|
||||
|
||||
qcom,vddp-ref-clk-supply = <&L4A>;
|
||||
qcom,vddp-ref-clk-max-microamp = <100>;
|
||||
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
|
||||
&tlmm {
|
||||
|
||||
nfc {
|
||||
nfc_int_active: nfc_int_active {
|
||||
/* active state */
|
||||
mux {
|
||||
/* GPIO 9: NFC Read Interrupt */
|
||||
pins = "gpio9";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio9";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_int_suspend: nfc_int_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
/* GPIO 9: NFC Read Interrupt */
|
||||
pins = "gpio9";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio9";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_enable_active: nfc_enable_active {
|
||||
mux {
|
||||
/* 48: Enable, 8: Firmware*/
|
||||
pins = "gpio48";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio48";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_enable_suspend: nfc_enable_suspend {
|
||||
mux {
|
||||
/* 48: Enable, 8: Firmware */
|
||||
pins = "gpio48";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio48";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
nfc_clk_req_active: nfc_clk_req_active {
|
||||
/* active state */
|
||||
mux {
|
||||
/* GPIO 7: NFC CLK Req*/
|
||||
pins = "gpio7";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio7";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_clk_req_suspend: nfc_clk_req_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
/* GPIO 7: NFC CLK Req */
|
||||
pins = "gpi7";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio7";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmk8350_vadc {
|
||||
pmk8350_qtm_n_therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
label = "pmk8350_qtm_n_therm";
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
qcom,pre-scaling = <1 1>;
|
||||
};
|
||||
pmk8350_qtm_e_therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
label = "pmk8350_qtm_e_therm";
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
qcom,pre-scaling = <1 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pmk8350_adc_tm {
|
||||
io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>,
|
||||
<&pmk8350_vadc PMK8350_ADC7_AMUX_THM2_100K_PU>,
|
||||
<&pmk8350_vadc PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
|
||||
qtm_n__therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
};
|
||||
qtm_e_therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se7_i2c {
|
||||
status = "ok"
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
nq@28 {
|
||||
compatible = "qcom,sn-nci";
|
||||
reg = <0x28>;
|
||||
qcom,sn-irq = <&tlmm 9 0x00>;
|
||||
qcom,sn-ven = <&tlmm 48 0x00>;
|
||||
qcom,sn-firm = <&tlmm 8 0x00>;
|
||||
qcom,sn-clkreq = <&tlmm 7 0x00>;
|
||||
qcom,sn-vdd-1p8-supply = <&L9A>;
|
||||
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
|
||||
qcom,sn-vdd-1p8-current = <157000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <9 0>;
|
||||
interrupt-names = "nfc_irq";
|
||||
pinctrl-names = "nfc_active", "nfc_suspend";
|
||||
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
|
||||
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
|
||||
&pm8008_8 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pm8008_9 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&soc {
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
label = "gpio-keys";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&key_vol_up_default>;
|
||||
|
||||
vol_up {
|
||||
label = "volume_up";
|
||||
gpios = <&pmr735a_gpios 1 GPIO_ACTIVE_LOW>;
|
||||
linux,input-type = <1>;
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <15>;
|
||||
linux,can-disable;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_vib {
|
||||
compatible = "moto,vibrator-ldo";
|
||||
moto,vib-ldo-gpio = <&tlmm 101 0x0>;
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
mcd {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&mot_batterydata {
|
||||
df-serialnum = "SB18C77591";
|
||||
qcom,batt-id-range-pct = <15>;
|
||||
#include "qg-batterydata-jk50-atl-5000mah.dtsi"
|
||||
#include "qg-batterydata-jk50-scud-5000mah.dtsi"
|
||||
};
|
||||
|
||||
&thermal_zones {
|
||||
sdm-skin-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
rear-cam-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
camera-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
quiet-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
pa-therm0-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
pa-therm1-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
xo-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msm_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm_iio ADC5_GPIO1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cam_flash_therm {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO3_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pa_therm2 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO4_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pa_therm1 {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
quiet_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
xo_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
chg_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
conn_therm {
|
||||
polling-delay-passive = <1000>;
|
||||
polling-delay = <1000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm_iio ADC5_GPIO2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
qtm_n_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
qtm_e_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&qupv3_se8_i2c {
|
||||
|
||||
status = "ok"
|
||||
|
||||
sx937x@2c {
|
||||
compatible = "Semtech,sx937x";
|
||||
reg = <0x2c>;
|
||||
pinctrl-names = "default","sleep";
|
||||
pinctrl-0 = <&sar_int_default>;
|
||||
pinctrl-1 = <&sar_int_sleep>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <24 0x02>;
|
||||
interrupt-names = "sx937x_irq";
|
||||
Semtech,nirq-gpio = <&tlmm 24 0x02>;
|
||||
//please fix me
|
||||
cap_vdd-supply = <&L9A>;
|
||||
/*use PH4/5/6 as the reference sensor
|
||||
set it to 0xff if the ref-phases-x is not used*/
|
||||
Semtech,ref-phases-a = <5>;
|
||||
Semtech,ref-phases-b = <6>;
|
||||
Semtech,ref-phases-c = <0xff>;
|
||||
Semtech,button-flag = <0x1f>;
|
||||
Semtech,reg-num = <64>;
|
||||
Semtech,reg-init = <
|
||||
0x4004 0x70
|
||||
0x4008 0x8
|
||||
0x8020 0x32
|
||||
0x8028 0x1088E
|
||||
0x8034 0x486E
|
||||
0x8040 0x1088E
|
||||
0x804C 0x4E96
|
||||
0x8058 0x446E
|
||||
0x8064 0x88E
|
||||
0x8070 0x86E
|
||||
0x807C 0x85E
|
||||
0x8030 0xFFF9FD
|
||||
0x803C 0xFEF9FF
|
||||
0x8048 0xFFD9FF
|
||||
0x8054 0xFFF97F
|
||||
0x8060 0xBFF9FF
|
||||
0x806C 0xFFF9EF
|
||||
0x8078 0xF7F9FF
|
||||
0x8084 0xFFFFFF
|
||||
0x8098 0x3F2C
|
||||
0x80B8 0x3620
|
||||
0x80D8 0x3821
|
||||
0x80F8 0x2B24
|
||||
0x8118 0x263C
|
||||
0x8138 0xC8
|
||||
0x8158 0xC8
|
||||
0x8178 0xC8
|
||||
0x80A0 0x222200E1
|
||||
0x80C0 0x141400E2
|
||||
0x80E0 0x232300E1
|
||||
0x8100 0x202000E0
|
||||
0x8120 0x2F2F00E2
|
||||
0x8140 0x0
|
||||
0x8160 0x0
|
||||
0x8180 0x0
|
||||
0x8188 0x8000015
|
||||
0x818C 0x8000016
|
||||
0x8190 0x0
|
||||
0x8194 0x0
|
||||
0x8090 0x54C45000
|
||||
0x80B0 0x2AE27000
|
||||
0x80D0 0x54D45000
|
||||
0x80F0 0x2AE27000
|
||||
0x8110 0x2AE27000
|
||||
0x8130 0x2AD67000
|
||||
0x8150 0x2AD67000
|
||||
0x8170 0x2AD66000
|
||||
0x8088 0x300000
|
||||
0x80A8 0x300000
|
||||
0x80C8 0x300000
|
||||
0x80E8 0x300000
|
||||
0x8108 0x300000
|
||||
0x8128 0x300000
|
||||
0x8148 0x300000
|
||||
0x8168 0x300000
|
||||
0x808C 0x60200018
|
||||
0x80AC 0x60200018
|
||||
0x80CC 0x60200018
|
||||
0x80EC 0x60200018
|
||||
0x810C 0x60200018
|
||||
0x812C 0x60200018
|
||||
0x814C 0x60200018
|
||||
0x816C 0x60200018
|
||||
0x8024 0x7F7F
|
||||
>;
|
||||
status = "ok"
|
||||
};
|
||||
};
|
||||
|
||||
&qusb_phy0 {
|
||||
qcom,qusb-phy-init-seq =
|
||||
/* <value reg_offset> */
|
||||
<0x23 0x210 /* PWR_CTRL1 */
|
||||
0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
|
||||
0x7c 0x18c /* PLL_CLOCK_INVERTERS */
|
||||
0x80 0x2c /* PLL_CMODE */
|
||||
0x0a 0x184 /* PLL_LOCK_DELAY */
|
||||
0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
|
||||
0x40 0x194 /* PLL_BIAS_CONTROL_1 */
|
||||
0x16 0x198 /* PLL_BIAS_CONTROL_2 */
|
||||
0x21 0x214 /* PWR_CTRL2 */
|
||||
0x08 0x220 /* IMP_CTRL1 */
|
||||
0x58 0x224 /* IMP_CTRL2 */
|
||||
0x37 0x240 /* TUNE1 */
|
||||
0x29 0x244 /* TUNE2 */
|
||||
0xca 0x248 /* TUNE3 */
|
||||
0x04 0x24c /* TUNE4 */
|
||||
0x03 0x250 /* TUNE5 */
|
||||
0x30 0x23c /* CHG_CTRL2 */
|
||||
0x22 0x210>; /* PWR_CTRL1 */
|
||||
|
||||
qcom,qusb-phy-host-init-seq =
|
||||
/* <value reg_offset> */
|
||||
<0x23 0x210 /* PWR_CTRL1 */
|
||||
0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
|
||||
0x7c 0x18c /* PLL_CLOCK_INVERTERS */
|
||||
0x80 0x2c /* PLL_CMODE */
|
||||
0x0a 0x184 /* PLL_LOCK_DELAY */
|
||||
0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
|
||||
0x40 0x194 /* PLL_BIAS_CONTROL_1 */
|
||||
0x16 0x198 /* PLL_BIAS_CONTROL_2 */
|
||||
0x21 0x214 /* PWR_CTRL2 */
|
||||
0x08 0x220 /* IMP_CTRL1 */
|
||||
0x58 0x224 /* IMP_CTRL2 */
|
||||
0x37 0x240 /* TUNE1 */
|
||||
0x2a 0x244 /* TUNE2 */
|
||||
0xca 0x248 /* TUNE3 */
|
||||
0x04 0x24c /* TUNE4 */
|
||||
0x03 0x250 /* TUNE5 */
|
||||
0x30 0x23c /* CHG_CTRL2 */
|
||||
0x22 0x210>; /* PWR_CTRL1 */
|
||||
};
|
||||
622
qcom/holi-penangb-common-overlay.dtsi
Normal file
622
qcom/holi-penangb-common-overlay.dtsi
Normal file
|
|
@ -0,0 +1,622 @@
|
|||
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include "holi-audio-penang-overlay.dtsi"
|
||||
#include "holi-nopmi-moto-common-overlay.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include "holi-pmic-overlay-pm6125.dtsi"
|
||||
#include "holi-thermal-overlay-pm6125.dtsi"
|
||||
#include "display/holi-sde-display-mtp-pm6125.dtsi"
|
||||
#include "penang-fps-overlay.dtsi"
|
||||
#include "penang-display.dtsi"
|
||||
#include "penang-touchscreen.dtsi"
|
||||
#include "penang-fmr-overlay.dtsi"
|
||||
#include "camera/holi-camera-sensor-mot-penang-overlay.dtsi"
|
||||
#include "discrete_charging_penang.dtsi"
|
||||
#include "moto_therm_sys_temp.dtsi"
|
||||
|
||||
&wcd937x_codec {
|
||||
cdc-vdd-rxtx-supply = <&L9A>;
|
||||
cdc-vddpx-supply = <&L9A>;
|
||||
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
|
||||
"cdc-vddpx";
|
||||
/*
|
||||
* Overriding cdc-vdd-mic-bias-supply to dummy value
|
||||
* to avoid compilation errors as BOB is not definied
|
||||
* for pm6125
|
||||
*/
|
||||
cdc-vdd-mic-bias-supply = <>;
|
||||
};
|
||||
|
||||
&holi_snd {
|
||||
qcom,msm-hs-linein-threshold = <4000>;
|
||||
};
|
||||
|
||||
/* Dummy LDO reference */
|
||||
&sdhc_1 {
|
||||
status = "disabled";
|
||||
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sdc1_on>;
|
||||
pinctrl-1 = <&sdc1_off>;
|
||||
|
||||
vdd-supply = <&L24A>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 570000>;
|
||||
|
||||
vdd-io-supply = <&L11A>;
|
||||
qcom,vdd-io-always-on;
|
||||
qcom,vdd-io-lpm-sup;
|
||||
qcom,vdd-io-voltage-level = <1800000 1800000>;
|
||||
qcom,vdd-io-current-level = <0 325000>;
|
||||
};
|
||||
|
||||
&sdhc_2 {
|
||||
status = "ok"
|
||||
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sdc2_on>;
|
||||
pinctrl-1 = <&sdc2_off>;
|
||||
|
||||
vdd-supply = <&L22A>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 800000>;
|
||||
|
||||
vdd-io-supply = <&L5A>;
|
||||
qcom,vdd-io-voltage-level = <1800000 2960000>;
|
||||
qcom,vdd-io-current-level = <0 22000>;
|
||||
|
||||
cd-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&ufsphy_mem {
|
||||
compatible = "qcom,ufs-phy-qmp-v3";
|
||||
|
||||
vdda-phy-supply = <&L7A>;
|
||||
vdda-pll-supply = <&L4A>;
|
||||
vdda-phy-max-microamp = <62900>;
|
||||
vdda-pll-max-microamp = <18300>;
|
||||
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
&ufshc_mem {
|
||||
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
|
||||
vdd-hba-fixed-regulator;
|
||||
|
||||
vcc-supply = <&L24A>;
|
||||
vcc-voltage-level = <2950000 2960000>;
|
||||
vcc-max-microamp = <800000>;
|
||||
|
||||
vccq2-supply = <&L11A>;
|
||||
vccq2-max-microamp = <800000>;
|
||||
vccq2-voltage-level = <1800000 1800000>;
|
||||
|
||||
qcom,vddp-ref-clk-supply = <&L4A>;
|
||||
qcom,vddp-ref-clk-max-microamp = <100>;
|
||||
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
|
||||
&tlmm {
|
||||
|
||||
nfc {
|
||||
nfc_int_active: nfc_int_active {
|
||||
/* active state */
|
||||
mux {
|
||||
/* GPIO 9: NFC Read Interrupt */
|
||||
pins = "gpio9";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio9";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_int_suspend: nfc_int_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
/* GPIO 9: NFC Read Interrupt */
|
||||
pins = "gpio9";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio9";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_enable_active: nfc_enable_active {
|
||||
mux {
|
||||
/* 48: Enable, 8: Firmware*/
|
||||
pins = "gpio48";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio48";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_enable_suspend: nfc_enable_suspend {
|
||||
mux {
|
||||
/* 48: Enable, 8: Firmware */
|
||||
pins = "gpio48";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio48";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
nfc_clk_req_active: nfc_clk_req_active {
|
||||
/* active state */
|
||||
mux {
|
||||
/* GPIO 7: NFC CLK Req*/
|
||||
pins = "gpio7";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio7";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
nfc_clk_req_suspend: nfc_clk_req_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
/* GPIO 7: NFC CLK Req */
|
||||
pins = "gpi7";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio7";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmk8350_vadc {
|
||||
pmk8350_qtm_n_therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
label = "pmk8350_qtm_n_therm";
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
qcom,pre-scaling = <1 1>;
|
||||
};
|
||||
pmk8350_qtm_e_therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
label = "pmk8350_qtm_e_therm";
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
qcom,pre-scaling = <1 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pmk8350_adc_tm {
|
||||
io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>,
|
||||
<&pmk8350_vadc PMK8350_ADC7_AMUX_THM2_100K_PU>,
|
||||
<&pmk8350_vadc PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
|
||||
qtm_n__therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
};
|
||||
qtm_e_therm {
|
||||
reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se7_i2c {
|
||||
status = "ok"
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
nq@28 {
|
||||
compatible = "qcom,sn-nci";
|
||||
reg = <0x28>;
|
||||
qcom,sn-irq = <&tlmm 9 0x00>;
|
||||
qcom,sn-ven = <&tlmm 48 0x00>;
|
||||
qcom,sn-firm = <&tlmm 8 0x00>;
|
||||
qcom,sn-clkreq = <&tlmm 7 0x00>;
|
||||
qcom,sn-vdd-1p8-supply = <&L9A>;
|
||||
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
|
||||
qcom,sn-vdd-1p8-current = <157000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <9 0>;
|
||||
interrupt-names = "nfc_irq";
|
||||
pinctrl-names = "nfc_active", "nfc_suspend";
|
||||
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
|
||||
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
|
||||
&pm8008_8 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pm8008_9 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&soc {
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
label = "gpio-keys";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&key_vol_up_default>;
|
||||
|
||||
vol_up {
|
||||
label = "volume_up";
|
||||
gpios = <&pmr735a_gpios 1 GPIO_ACTIVE_LOW>;
|
||||
linux,input-type = <1>;
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
gpio-key,wakeup;
|
||||
debounce-interval = <15>;
|
||||
linux,can-disable;
|
||||
};
|
||||
};
|
||||
|
||||
ldo_vib {
|
||||
compatible = "moto,vibrator-ldo";
|
||||
moto,vib-ldo-gpio = <&tlmm 101 0x0>;
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
mcd {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&mot_batterydata {
|
||||
df-serialnum = "SB18C77591";
|
||||
qcom,batt-id-range-pct = <15>;
|
||||
#include "qg-batterydata-jk50-atl-5000mah.dtsi"
|
||||
#include "qg-batterydata-jk50-scud-5000mah.dtsi"
|
||||
};
|
||||
|
||||
&thermal_zones {
|
||||
sdm-skin-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
rear-cam-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
camera-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
quiet-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
pa-therm0-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
pa-therm1-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
xo-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msm_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm_iio ADC5_GPIO1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cam_flash_therm {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO3_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pa_therm2 {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO4_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pa_therm1 {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
quiet_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
xo_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
chg_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
qtm_n_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
qtm_e_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM4_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&qupv3_se8_i2c {
|
||||
|
||||
status = "ok"
|
||||
|
||||
sx937x@2c {
|
||||
compatible = "Semtech,sx937x";
|
||||
reg = <0x2c>;
|
||||
pinctrl-names = "default","sleep";
|
||||
pinctrl-0 = <&sar_int_default>;
|
||||
pinctrl-1 = <&sar_int_sleep>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <24 0x02>;
|
||||
interrupt-names = "sx937x_irq";
|
||||
Semtech,nirq-gpio = <&tlmm 24 0x02>;
|
||||
//please fix me
|
||||
cap_vdd-supply = <&L9A>;
|
||||
/*use PH4/5/6 as the reference sensor
|
||||
set it to 0xff if the ref-phases-x is not used*/
|
||||
Semtech,ref-phases-a = <5>;
|
||||
Semtech,ref-phases-b = <6>;
|
||||
Semtech,ref-phases-c = <0xff>;
|
||||
Semtech,button-flag = <0x1f>;
|
||||
Semtech,reg-num = <64>;
|
||||
Semtech,reg-init = <
|
||||
0x4004 0x70
|
||||
0x4008 0x8
|
||||
0x8020 0x32
|
||||
0x8028 0x1088E
|
||||
0x8034 0x486E
|
||||
0x8040 0x1088E
|
||||
0x804C 0x4E96
|
||||
0x8058 0x446E
|
||||
0x8064 0x88E
|
||||
0x8070 0x86E
|
||||
0x807C 0x85E
|
||||
0x8030 0xFFF9FD
|
||||
0x803C 0xFEF9FF
|
||||
0x8048 0xFFD9FF
|
||||
0x8054 0xFFF97F
|
||||
0x8060 0xBFF9FF
|
||||
0x806C 0xFFF9EF
|
||||
0x8078 0xF7F9FF
|
||||
0x8084 0xFFFFFF
|
||||
0x8098 0x3F2C
|
||||
0x80B8 0x3620
|
||||
0x80D8 0x3821
|
||||
0x80F8 0x2B24
|
||||
0x8118 0x263C
|
||||
0x8138 0xC8
|
||||
0x8158 0xC8
|
||||
0x8178 0xC8
|
||||
0x80A0 0x222200E1
|
||||
0x80C0 0x141400E2
|
||||
0x80E0 0x232300E1
|
||||
0x8100 0x202000E0
|
||||
0x8120 0x2F2F00E2
|
||||
0x8140 0x0
|
||||
0x8160 0x0
|
||||
0x8180 0x0
|
||||
0x8188 0x8000015
|
||||
0x818C 0x8000016
|
||||
0x8190 0x0
|
||||
0x8194 0x0
|
||||
0x8090 0x54C45000
|
||||
0x80B0 0x2AE27000
|
||||
0x80D0 0x54D45000
|
||||
0x80F0 0x2AE27000
|
||||
0x8110 0x2AE27000
|
||||
0x8130 0x2AD67000
|
||||
0x8150 0x2AD67000
|
||||
0x8170 0x2AD66000
|
||||
0x8088 0x300000
|
||||
0x80A8 0x300000
|
||||
0x80C8 0x300000
|
||||
0x80E8 0x300000
|
||||
0x8108 0x300000
|
||||
0x8128 0x300000
|
||||
0x8148 0x300000
|
||||
0x8168 0x300000
|
||||
0x808C 0x60200018
|
||||
0x80AC 0x60200018
|
||||
0x80CC 0x60200018
|
||||
0x80EC 0x60200018
|
||||
0x810C 0x60200018
|
||||
0x812C 0x60200018
|
||||
0x814C 0x60200018
|
||||
0x816C 0x60200018
|
||||
0x8024 0x7F7F
|
||||
>;
|
||||
status = "ok"
|
||||
};
|
||||
};
|
||||
|
||||
&qusb_phy0 {
|
||||
qcom,qusb-phy-init-seq =
|
||||
/* <value reg_offset> */
|
||||
<0x23 0x210 /* PWR_CTRL1 */
|
||||
0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
|
||||
0x7c 0x18c /* PLL_CLOCK_INVERTERS */
|
||||
0x80 0x2c /* PLL_CMODE */
|
||||
0x0a 0x184 /* PLL_LOCK_DELAY */
|
||||
0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
|
||||
0x40 0x194 /* PLL_BIAS_CONTROL_1 */
|
||||
0x16 0x198 /* PLL_BIAS_CONTROL_2 */
|
||||
0x21 0x214 /* PWR_CTRL2 */
|
||||
0x08 0x220 /* IMP_CTRL1 */
|
||||
0x58 0x224 /* IMP_CTRL2 */
|
||||
0x37 0x240 /* TUNE1 */
|
||||
0x29 0x244 /* TUNE2 */
|
||||
0xca 0x248 /* TUNE3 */
|
||||
0x04 0x24c /* TUNE4 */
|
||||
0x03 0x250 /* TUNE5 */
|
||||
0x30 0x23c /* CHG_CTRL2 */
|
||||
0x22 0x210>; /* PWR_CTRL1 */
|
||||
|
||||
qcom,qusb-phy-host-init-seq =
|
||||
/* <value reg_offset> */
|
||||
<0x23 0x210 /* PWR_CTRL1 */
|
||||
0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
|
||||
0x7c 0x18c /* PLL_CLOCK_INVERTERS */
|
||||
0x80 0x2c /* PLL_CMODE */
|
||||
0x0a 0x184 /* PLL_LOCK_DELAY */
|
||||
0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
|
||||
0x40 0x194 /* PLL_BIAS_CONTROL_1 */
|
||||
0x16 0x198 /* PLL_BIAS_CONTROL_2 */
|
||||
0x21 0x214 /* PWR_CTRL2 */
|
||||
0x08 0x220 /* IMP_CTRL1 */
|
||||
0x58 0x224 /* IMP_CTRL2 */
|
||||
0x37 0x240 /* TUNE1 */
|
||||
0x2a 0x244 /* TUNE2 */
|
||||
0xca 0x248 /* TUNE3 */
|
||||
0x04 0x24c /* TUNE4 */
|
||||
0x03 0x250 /* TUNE5 */
|
||||
0x30 0x23c /* CHG_CTRL2 */
|
||||
0x22 0x210>; /* PWR_CTRL1 */
|
||||
};
|
||||
78
qcom/holi-penangb-dvt2-jp-overlay.dts
Normal file
78
qcom/holi-penangb-dvt2-jp-overlay.dts
Normal file
|
|
@ -0,0 +1,78 @@
|
|||
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "holi-penang-common-jp-overlay.dtsi"
|
||||
|
||||
/ {
|
||||
model = "penang";
|
||||
compatible = "qcom,holi-penang", "qcom,holi-moto", "qcom,holi";
|
||||
qcom,msm-id = <454 0x10000>, <472 0x10000>;
|
||||
qcom,board-id = <(6<<8) 0xB200>;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
|
||||
nfc {
|
||||
sn110_enable_active: sn110_enable_active {
|
||||
mux {
|
||||
/* 6: Enable, 8: Firmware*/
|
||||
pins = "gpio6";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio6";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
sn110_enable_suspend: sn110_enable_suspend {
|
||||
mux {
|
||||
/* 6: Enable, 8: Firmware */
|
||||
pins = "gpio6";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio6";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se7_i2c {
|
||||
status = "ok"
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
nq@28 {
|
||||
compatible = "qcom,sn-nci";
|
||||
reg = <0x28>;
|
||||
qcom,sn-irq = <&tlmm 9 0x00>;
|
||||
qcom,sn-ven = <&tlmm 6 0x00>;
|
||||
qcom,sn-firm = <&tlmm 8 0x00>;
|
||||
qcom,sn-clkreq = <&tlmm 7 0x00>;
|
||||
qcom,sn-vdd-1p8-supply = <&L9A>;
|
||||
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
|
||||
qcom,sn-vdd-1p8-current = <157000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <9 0>;
|
||||
interrupt-names = "nfc_irq";
|
||||
pinctrl-names = "nfc_active", "nfc_suspend";
|
||||
pinctrl-0 = <&nfc_int_active &sn110_enable_active>;
|
||||
pinctrl-1 = <&nfc_int_suspend &sn110_enable_suspend>;
|
||||
};
|
||||
};
|
||||
83
qcom/holi-penangb-dvt2-sb-overlay.dts
Normal file
83
qcom/holi-penangb-dvt2-sb-overlay.dts
Normal file
|
|
@ -0,0 +1,83 @@
|
|||
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "holi-penang-common-jp-overlay.dtsi"
|
||||
|
||||
/ {
|
||||
model = "penang";
|
||||
compatible = "qcom,holi-penang", "qcom,holi-moto", "qcom,holi";
|
||||
qcom,msm-id = <454 0x10000>, <472 0x10000>;
|
||||
qcom,board-id = <(7<<8) 0xB200>;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
|
||||
nfc {
|
||||
sn110_enable_active: sn110_enable_active {
|
||||
mux {
|
||||
/* 6: Enable, 8: Firmware*/
|
||||
pins = "gpio6";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio6";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
sn110_enable_suspend: sn110_enable_suspend {
|
||||
mux {
|
||||
/* 6: Enable, 8: Firmware */
|
||||
pins = "gpio6";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio6";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se7_i2c {
|
||||
status = "ok"
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
nq@28 {
|
||||
compatible = "qcom,sn-nci";
|
||||
reg = <0x28>;
|
||||
qcom,sn-irq = <&tlmm 9 0x00>;
|
||||
qcom,sn-ven = <&tlmm 6 0x00>;
|
||||
qcom,sn-firm = <&tlmm 8 0x00>;
|
||||
qcom,sn-clkreq = <&tlmm 7 0x00>;
|
||||
qcom,sn-vdd-1p8-supply = <&L9A>;
|
||||
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
|
||||
qcom,sn-vdd-1p8-current = <157000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <9 0>;
|
||||
interrupt-names = "nfc_irq";
|
||||
pinctrl-names = "nfc_active", "nfc_suspend";
|
||||
pinctrl-0 = <&nfc_int_active &sn110_enable_active>;
|
||||
pinctrl-1 = <&nfc_int_suspend &sn110_enable_suspend>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmi_discrete_charger {
|
||||
mmi,usb-mosfet-supported;
|
||||
mmi,mos-en-gpio = <&tlmm 58 0>;
|
||||
};
|
||||
24
qcom/holi-penangb-evt1-overlay.dts
Normal file
24
qcom/holi-penangb-evt1-overlay.dts
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "holi-penang-common-overlay.dtsi"
|
||||
|
||||
/ {
|
||||
model = "penang";
|
||||
compatible = "qcom,holi-penang", "qcom,holi-moto", "qcom,holi";
|
||||
qcom,msm-id = <454 0x10000>, <472 0x10000>;
|
||||
qcom,board-id = <0x47 0xA100>;
|
||||
};
|
||||
|
||||
265
qcom/penangb-display.dtsi
Normal file
265
qcom/penangb-display.dtsi
Normal file
|
|
@ -0,0 +1,265 @@
|
|||
#include "dsi-panel-mot-dummy-qhd-video.dtsi"
|
||||
#include "dsi-panel-mot-djn-nt36528-653-720x1600-video.dtsi"
|
||||
#include "dsi-panel-mot-csot-ft8057-653-720x1600-video.dtsi"
|
||||
|
||||
&display_panel_avdd {
|
||||
/delete-property/ gpio;
|
||||
/delete-property/ pinctrl-0;
|
||||
};
|
||||
|
||||
&mdss_dsi_phy0 {
|
||||
qcom,platform-strength-ctrl = [55 03 30 30
|
||||
55 03 30 30
|
||||
55 03 30 30
|
||||
55 03 30 30
|
||||
55 00 30 30];
|
||||
};
|
||||
|
||||
|
||||
&tlmm {
|
||||
lcd_panel_avdd_default: lcd_panel_avdd_default {
|
||||
mux {
|
||||
pins = "gpio84";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio84";
|
||||
drive-strength = <8>;
|
||||
bias-disable = <0>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_panel_avee_default: lcd_panel_avee_default {
|
||||
mux {
|
||||
pins = "gpio85";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio85";
|
||||
drive-strength = <8>;
|
||||
bias-disable = <0>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&soc {
|
||||
lcd_panel_avdd: lcd_gpio_regulator@1 {
|
||||
compatible = "qti-regulator-fixed";
|
||||
regulator-name = "lcd_panel_avdd";
|
||||
regulator-min-microvolt = <5500000>;
|
||||
regulator-max-microvolt = <5500000>;
|
||||
regulator-enable-ramp-delay = <233>;
|
||||
gpio = <&tlmm 84 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
proxy-supply = <&lcd_panel_avdd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_panel_avdd_default>;
|
||||
};
|
||||
|
||||
lcd_panel_avee: lcd_gpio_regulator@2 {
|
||||
compatible = "qti-regulator-fixed";
|
||||
regulator-name = "lcd_panel_avee";
|
||||
regulator-min-microvolt = <5500000>;
|
||||
regulator-max-microvolt = <5500000>;
|
||||
regulator-enable-ramp-delay = <233>;
|
||||
gpio = <&tlmm 85 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
proxy-supply = <&lcd_panel_avee>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_panel_avee_default>;
|
||||
};
|
||||
|
||||
dsi_panel_pwr_supply_ext_bias: dsi_panel_pwr_supply_ext_bias {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qcom,panel-supply-entry@0 {
|
||||
reg = <0>;
|
||||
qcom,supply-name = "vddio";
|
||||
qcom,supply-min-voltage = <1800000>;
|
||||
qcom,supply-max-voltage = <1800000>;
|
||||
qcom,supply-enable-load = <32000>;
|
||||
qcom,supply-disable-load = <80>;
|
||||
qcom,supply-pre-off-sleep = <2>;
|
||||
};
|
||||
|
||||
qcom,panel-supply-entry@1 {
|
||||
reg = <1>;
|
||||
qcom,supply-name = "lab";
|
||||
qcom,supply-min-voltage = <5500000>;
|
||||
qcom,supply-max-voltage = <5500000>;
|
||||
qcom,supply-enable-load = <100000>;
|
||||
qcom,supply-disable-load = <100>;
|
||||
qcom,supply-pre-on-sleep = <3>;
|
||||
qcom,supply-post-on-sleep = <1>;
|
||||
};
|
||||
|
||||
qcom,panel-supply-entry@2 {
|
||||
reg = <2>;
|
||||
qcom,supply-name = "ibb";
|
||||
qcom,supply-min-voltage = <5500000>;
|
||||
qcom,supply-max-voltage = <5500000>;
|
||||
qcom,supply-enable-load = <100000>;
|
||||
qcom,supply-disable-load = <100>;
|
||||
qcom,supply-pre-off-sleep = <3>;
|
||||
qcom,supply-post-on-sleep = <3>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
&sde_dsi {
|
||||
/delete-property/ lab-supply;
|
||||
/delete-property/ ibb-supply;
|
||||
/delete-property/ vddio-supply;
|
||||
/delete-property/ qcom,dsi-default-panel;
|
||||
/delete-property/ avdd-supply;
|
||||
|
||||
lab-supply = <&lcd_panel_avdd>;
|
||||
ibb-supply = <&lcd_panel_avee>;
|
||||
vddio-supply = <&L13A>;
|
||||
|
||||
qcom,dsi-default-panel = <&dsi_nt36528_djn_video>;
|
||||
};
|
||||
|
||||
&dsi_nt36528_djn_video {
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_ext_bias>;
|
||||
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,bklt-dcs-2bytes-enabled;
|
||||
|
||||
qcom,mdss-dsi-bl-min-level = <13>;
|
||||
qcom,mdss-dsi-bl-max-level = <1650>;
|
||||
qcom,mdss-dsi-bl-default-level = <745>;
|
||||
qcom,mdss-brightness-max-level = <1650>;
|
||||
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
qcom,mdss-dsi-no-panel-on-read-support;
|
||||
qcom,mdss-dsi-panel-supplier = "tm";
|
||||
|
||||
qcom,suspend-ulps-enabled;
|
||||
|
||||
qcom,tp_state_check_enable;
|
||||
qcom,platform-need-execute-shutdown;
|
||||
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
qcom,dsi-supported-dfps-list = <60 90 120>;
|
||||
|
||||
//qcom,mdss-dsi-hbm-type = "lcd-dcs-gpio";
|
||||
//qcom,platform-hbm-en-gpio = <&tlmm 50 0>;
|
||||
qcom,mdss-dsi-panel-hbm-is-51cmd;
|
||||
qcom,mdss-dsi-hbm-type = "lcd-dcs-wled";
|
||||
qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 07 FF];
|
||||
qcom,mdss-dsi-hbm-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 06 66];
|
||||
qcom,mdss-dsi-hbm-off-command-state = "dsi_lp_mode";
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
qcom,mdss-dsi-t-clk-post = <0x1A>;
|
||||
qcom,mdss-dsi-t-clk-pre = <0x21>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-drive-strength = <0x8C>;
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 27 25 0A
|
||||
0B 0A 02 04 00];
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_ft8057_csot_video {
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_ext_bias>;
|
||||
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,bklt-dcs-2bytes-enabled;
|
||||
|
||||
qcom,mdss-dsi-bl-min-level = <13>;
|
||||
qcom,mdss-dsi-bl-max-level = <1650>;
|
||||
qcom,mdss-dsi-bl-default-level = <745>;
|
||||
qcom,mdss-brightness-max-level = <1650>;
|
||||
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a
|
||||
06 01 00 01 00 00 01 0b
|
||||
06 01 00 01 00 00 01 0D];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>,<0x00>,<0x01>;
|
||||
qcom,mdss-dsi-panel-on-check-value = <0x9c>,<0x00>,<0x01>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1 1 1>;
|
||||
qcom,mdss-dsi-no-panel-on-read-support;
|
||||
qcom,mdss-dsi-panel-supplier = "tm";
|
||||
|
||||
qcom,suspend-ulps-enabled;
|
||||
|
||||
qcom,tp_state_check_enable;
|
||||
qcom,platform-need-execute-shutdown;
|
||||
|
||||
qcom,mdss-dsi-pan-enable-dynamic-fps;
|
||||
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
|
||||
qcom,dsi-supported-dfps-list = <60 90 120>;
|
||||
|
||||
//qcom,mdss-dsi-hbm-type = "lcd-dcs-gpio";
|
||||
//qcom,platform-hbm-en-gpio = <&tlmm 50 0>;
|
||||
qcom,mdss-dsi-panel-hbm-is-51cmd;
|
||||
qcom,mdss-dsi-hbm-type = "lcd-dcs-wled";
|
||||
qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 FF 0E];
|
||||
qcom,mdss-dsi-hbm-on-command-state = "dsi_lp_mode";
|
||||
qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 cc 0c];
|
||||
qcom,mdss-dsi-hbm-off-command-state = "dsi_lp_mode";
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
qcom,mdss-dsi-t-clk-post = <0x0E>;
|
||||
qcom,mdss-dsi-t-clk-pre = <0x1E>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-drive-strength = <0x8C>;
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 24 09 09 1A 18 09
|
||||
09 09 02 04 00];
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mot_dummy_vid_qhd {
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dummy";
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
qcom,mdss-dsi-t-clk-post = <0x09>;
|
||||
qcom,mdss-dsi-t-clk-pre = <0x15>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 0B 02 02 1C 1C 03
|
||||
02 01 02 04 00];
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
5
qcom/penangb-fmr-overlay.dtsi
Normal file
5
qcom/penangb-fmr-overlay.dtsi
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
&tlmm {
|
||||
};
|
||||
|
||||
&soc {
|
||||
};
|
||||
124
qcom/penangb-fps-overlay.dtsi
Normal file
124
qcom/penangb-fps-overlay.dtsi
Normal file
|
|
@ -0,0 +1,124 @@
|
|||
&tlmm {
|
||||
|
||||
fps_int_active: fps_int_active {
|
||||
/* active state */
|
||||
mux {
|
||||
pins = "gpio17";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio17";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
fps_int_suspend: fps_int_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
pins = "gpio17";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio17";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
fps_rst_high: fps_rst_high {
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <8>;
|
||||
output-high;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
fps_rst_low: fps_rst_low {
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <8>;
|
||||
output-low;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
fps_ldo3_en_active: fps_ldo3_en_active {
|
||||
/* active state */
|
||||
mux {
|
||||
pins = "gpio87";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio87";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
fps_ldo3_en_suspend: fps_ldo3_en_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
pins = "gpio87";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio87";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&soc {
|
||||
fpc: fpc_fpc1020 {
|
||||
compatible = "fpc,fpc1020";
|
||||
status = "ok"
|
||||
irq = <&tlmm 17 0>;
|
||||
rst = <&tlmm 18 0>;
|
||||
fp-gpio-ven = <&tlmm 87 0>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <17 0>;
|
||||
pinctrl-names = "default", "suspend";
|
||||
pinctrl-0 = <&fps_int_active>;
|
||||
pinctrl-1 = < &fps_int_suspend>;
|
||||
};
|
||||
//chipone side fps
|
||||
fingerprint: chipone7318 {
|
||||
compatible = "qcom,fingerprint-gpio";
|
||||
status = "ok"
|
||||
reg = <0>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <17 0x0>;
|
||||
fp-gpio-int = <&tlmm 17 0x0>;
|
||||
fp-gpio-reset = <&tlmm 18 0x0>;
|
||||
fp-gpio-power = <&tlmm 87 0x0>;
|
||||
pinctrl-names = "fps_rst_active","fps_rst_suspend","fps_int_active","fps_ido1p8_en_active","fps_ido1p8_en_suspend";
|
||||
|
||||
pinctrl-0 = <&fps_rst_high>;
|
||||
pinctrl-1 = <&fps_rst_low>;
|
||||
pinctrl-2 = <&fps_int_active>;
|
||||
pinctrl-3 = <&fps_ldo3_en_active>;
|
||||
pinctrl-4 = <&fps_ldo3_en_suspend>;
|
||||
};
|
||||
};
|
||||
|
||||
13
qcom/penangb-sensors.dtsi
Executable file
13
qcom/penangb-sensors.dtsi
Executable file
|
|
@ -0,0 +1,13 @@
|
|||
/*
|
||||
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
138
qcom/penangb-touchscreen.dtsi
Executable file
138
qcom/penangb-touchscreen.dtsi
Executable file
|
|
@ -0,0 +1,138 @@
|
|||
/*
|
||||
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
&qupv3_se0_i2c {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&qupv3_se0_spi_pins {
|
||||
qupv3_se0_spi_active: qupv3_se0_spi_active {
|
||||
mux {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
function = "qup00";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
drive-strength = <6>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
|
||||
mux {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0", "gpio1", "gpio2";
|
||||
drive-strength = <6>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "qup00";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
drive-strength = <6>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se0_spi_cs_sleep: qupv3_se0_spi_cs_sleep {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
drive-strength = <6>;
|
||||
bias-bus-hold;
|
||||
};
|
||||
};
|
||||
|
||||
touch_reset_mux {
|
||||
touch_reset_active: touch_reset_active {
|
||||
mux {
|
||||
pins = "gpio21";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio21";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
touch_reset_suspend: touch_reset_suspend {
|
||||
mux {
|
||||
pins = "gpio21";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio21";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se0_spi {
|
||||
status = "ok"
|
||||
pinctrl-0 = <&qupv3_se0_spi_active &qupv3_se0_spi_cs_active>;
|
||||
pinctrl-1 = <&qupv3_se0_spi_sleep &qupv3_se0_spi_cs_sleep>;
|
||||
focaltech@38{
|
||||
compatible = "focaltech,fts";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <9600000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <22 0x2008>;
|
||||
focaltech,reset-gpio = <&tlmm 21 0x00>;
|
||||
focaltech,irq-gpio = <&tlmm 22 0x2008>;
|
||||
focaltech,max-touch-number = <10>;
|
||||
focaltech,display-coords = <0 0 720 1600>;
|
||||
focaltech,report_gesture_key;
|
||||
focaltech,panel-supplier = "csot";
|
||||
pinctrl-names = "pmx_ts_active", "pmx_ts_suspend",
|
||||
"pmx_ts_release";
|
||||
pinctrl-0 = <&touch_reset_active>;
|
||||
pinctrl-1 = <&touch_reset_suspend>;
|
||||
pinctrl-2 = <&pmx_ts_release>;
|
||||
panel = <&dsi_ft8057_csot_video>;
|
||||
};
|
||||
novatek@0{
|
||||
compatible = "novatek,NVT-ts-spi";
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <9600000>; /* 4800000,9600000,15000000,19200000 */
|
||||
novatek,reset-gpio = <&tlmm 21 0x00>;
|
||||
novatek,irq-gpio = <&tlmm 22 0x2001>;
|
||||
novatek,def-max-resolution = <720 1600>;
|
||||
novatek,swrst-n8-addr = <0x03F0FE>;
|
||||
novatek,spi-rd-fast-addr = <0x03F310>;
|
||||
novatek,report_gesture_key;
|
||||
novatek,usb_charger;
|
||||
novatek,panel-supplier = "djn";
|
||||
panel = <&dsi_nt36528_djn_video>;
|
||||
status = "ok"
|
||||
};
|
||||
};
|
||||
179
qcom/rt1711h-penangb.dtsi
Normal file
179
qcom/rt1711h-penangb.dtsi
Normal file
|
|
@ -0,0 +1,179 @@
|
|||
/*
|
||||
* Copyright (c) 2020 Richtek Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include <dt-bindings/iio/qti_power_supply_iio.h>
|
||||
|
||||
&qupv3_se8_i2c {
|
||||
status = "okay";
|
||||
rt1711h@4e {
|
||||
compatible = "richtek,rt1711h";
|
||||
reg = <0x4e>;
|
||||
status = "okay";
|
||||
tcpc-dual,supported_modes = <0>; /* 0: dfp/ufp, */
|
||||
/* 1: dfp, 2: ufp */
|
||||
rt-tcpc,name = "type_c_port0"; /* tcpc_device's name */
|
||||
rt-tcpc,role_def = <5>; /* 0: Unknown, 1: SNK, 2: SRC */
|
||||
/* 3: DRP, 4: Try.SRC, 5: Try.SNK */
|
||||
rt-tcpc,rp_level = <0>; /* 0: Default, 1: 1.5, 2: 3.0 */
|
||||
rt-tcpc,vconn_supply = <1>; /* 0: Never, 1: Always, */
|
||||
/* 2: EMarkOnly, 3: StartOnly */
|
||||
rt1711pd,intr_gpio = <&tlmm 60 0x0>;
|
||||
rt1711pd,intr_gpio_num = <60>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rt1711h_int_n>;
|
||||
pd-data {
|
||||
pd,vid = <0x29cf>;
|
||||
pd,pid = <0x1711>;
|
||||
pd,source-cap-ext = <0x171129cf 0x00000000 0x00000000
|
||||
0x00000000 0x00000000 0x02000000>;
|
||||
pd,mfrs = "RichtekTCPC";
|
||||
|
||||
/*
|
||||
* VSAFE5V = 0, MAX_POWER = 1, CUSTOM = 2,
|
||||
* MAX_POWER_LV = 0x21, MAX_POWER_LVIC = 0x31
|
||||
* MAX_POWER_HV = 0x41, MAX_POWER_HVIC = 0x51
|
||||
*/
|
||||
pd,charging_policy= <0x31>;
|
||||
|
||||
/*
|
||||
* Fixed 5V, 500 mA <0x00019032>
|
||||
* Fixed 5V, 1A <0x00019064>
|
||||
* Fixed 5V, 2A <0x000190c8>
|
||||
* Fixed 5V, 3A <0x0001912c>
|
||||
* Fixed 9V, 500 mA <0x0002d032>
|
||||
* Fixed 9V, 1A <0x0002d064>
|
||||
* Fixed 9V, 2A <0x0002d0c8>
|
||||
* Fixed 9V, 3A <0x0002d12c>
|
||||
* Variable 5-9V, 1A <0x8642d064>
|
||||
* Variable 5-9V, 2A <0x8642d0c8>
|
||||
* Variable 5-9V, 3A <0x8642d12c>
|
||||
* PPS 3V~5.9V, 3A <0xC0761E3C>
|
||||
*/
|
||||
pd,source-pdo-size = <1>;
|
||||
pd,source-pdo-data = <0x00019032>;
|
||||
pd,sink-pdo-size = <1>;
|
||||
pd,sink-pdo-data = <0x0001912c>;
|
||||
|
||||
/*
|
||||
* No DP, host + device
|
||||
* pd,id-vdo-size = <6>;
|
||||
* pd,id-vdo-data = <0xd14029cf 0x0 0x17110000
|
||||
0x41800000 0x0 0x21800000>;
|
||||
* With DP
|
||||
* pd,id-vdo-size = <6>;
|
||||
* pd,id-vdo-data = <0xd54029cf 0x0 0x17110000
|
||||
0x41800000 0x0 0x21800000>;
|
||||
*/
|
||||
|
||||
pd,id-vdo-size = <6>;
|
||||
pd,id-vdo-data = <0xd14029cf 0x0 0x17110000
|
||||
0x41800000 0x0 0x21800000>;
|
||||
|
||||
bat,nr = <1>;
|
||||
pd,country_nr = <0>;
|
||||
|
||||
bat-info0 {
|
||||
bat,vid = <0x29cf>;
|
||||
bat,pid = <0x1711>;
|
||||
bat,mfrs = "bat1";
|
||||
bat,design_cap = <3000>;
|
||||
};
|
||||
|
||||
//bat-info1 {
|
||||
// bat,vid = <0x8abc>;
|
||||
// bat,pid = <0x5234>;
|
||||
// bat,mfrs = "bat2";
|
||||
// bat,design_cap = <4000>;
|
||||
//};
|
||||
|
||||
//country0 {
|
||||
// pd,country_code = <0x5457>;
|
||||
// pd,country_len = <2>; /* max len = 26 */
|
||||
// pd,country_data = <0xff 0xff>;
|
||||
//};
|
||||
|
||||
//country1 {
|
||||
// pd,country_code = <0x5553>;
|
||||
// pd,country_len = <3>; /* max len = 26 */
|
||||
// pd,country_data = <0xf1 0xf2 0xf3>;
|
||||
//};
|
||||
};
|
||||
dpm_caps {
|
||||
local_dr_power;
|
||||
local_dr_data;
|
||||
//local_ext_power;
|
||||
local_usb_comm;
|
||||
//local_usb_suspend;
|
||||
//local_high_cap;
|
||||
//local_give_back;
|
||||
local_no_suspend;
|
||||
local_vconn_supply;
|
||||
|
||||
//attemp_discover_cable_dfp;
|
||||
attemp_enter_dp_mode;
|
||||
attemp_discover_cable;
|
||||
attemp_discover_id;
|
||||
|
||||
/* 0: disable, 1: prefer_snk, 2: prefer_src */
|
||||
pr_check = <0>;
|
||||
//pr_reject_as_source;
|
||||
//pr_reject_as_sink;
|
||||
//pr_check_gp_source;
|
||||
//pr_check_gp_sink;
|
||||
|
||||
/* 0: disable, 1: prefer_ufp, 2: prefer_dfp */
|
||||
dr_check = <0>;
|
||||
//dr_reject_as_dfp;
|
||||
//dr_reject_as_ufp;
|
||||
};
|
||||
displayport {
|
||||
/* connection type = "both", "ufp_d", "dfp_d" */
|
||||
1st_connection = "dfp_d";
|
||||
2nd_connection = "dfp_d";
|
||||
signal,dp_v13;
|
||||
//signal,dp_gen2;
|
||||
//usbr20_not_used;
|
||||
typec,receptacle;
|
||||
ufp_d {
|
||||
//pin_assignment,mode_a;
|
||||
//pin_assignment,mode_b;
|
||||
//pin_assignment,mode_c;
|
||||
//pin_assignment,mode_d;
|
||||
//pin_assignment,mode_e;
|
||||
};
|
||||
dfp_d {
|
||||
//pin_assignment,mode_a;
|
||||
//pin_assignment,mode_b;
|
||||
pin_assignment,mode_c;
|
||||
pin_assignment,mode_d;
|
||||
pin_assignment,mode_e;
|
||||
//pin_assignment,mode_f;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
rt1711h_int_n: rt1711h_int_n {
|
||||
mux {
|
||||
pins = "gpio60";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio60";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
50
qcom/sgm7220-penangb.dtsi
Normal file
50
qcom/sgm7220-penangb.dtsi
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
* Copyright (c) 2021 motorola Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR tcpcA PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
&qupv3_se8_i2c {
|
||||
status = "okay";
|
||||
sgm7220: sgm7220@47 {
|
||||
compatible = "sgm,usb_type_c_sgm7220";
|
||||
reg = <0x47>;
|
||||
status = "okay";
|
||||
tcpc-dual,supported_modes = <0>; /* 0: dfp/ufp, */
|
||||
/* 1: dfp, 2: ufp */
|
||||
sgm7220-tcpc,name = "type_c_port0"; /* tcpc_device's name */
|
||||
sgm7220-tcpc,role_def = <5>; /* 0: Unknown, 1: SNK, 2: SRC */
|
||||
/* 3: DRP, 4: Try.SRC, 5: Try.SNK */
|
||||
sgm7220-tcpc,rp_level = <0>; /* 0: Default, 1: 1.5, 2: 3.0 */
|
||||
sgm7220-tcpc,vconn_supply = <0>; /* 0: Never, 1: Always, */
|
||||
/* 2: EMarkOnly, 3: StartOnly */
|
||||
sgm7220,intr_gpio = <&tlmm 60 0x0>;
|
||||
sgm7220,intr_gpio_num = <60>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sgm7220_int_n>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&tlmm {
|
||||
sgm7220_int_n: sgm7220_int_n {
|
||||
mux {
|
||||
pins = "gpio60";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio60";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in a new issue