From 0e17de4e8d1791eee6c469a5447bcdd6850d32c0 Mon Sep 17 00:00:00 2001 From: Amit Mehta Date: Wed, 9 Oct 2024 02:56:23 -0700 Subject: [PATCH] fw-api: Add REO2SW1 ring status address to peach and kiwi Add REO2SW1 ring status address to peach and kiwi Change-Id: I54ea9c8eebbc90f5ce58bb888d4053433f043b0d CRs-Fixed: 3948871 --- hw/kiwi/v1/wcss_seq_hwioreg_umac.h | 7 ++++++- hw/kiwi/v2/wcss_seq_hwioreg_umac.h | 7 ++++++- hw/peach/v1/wcss_seq_hwioreg_umac.h | 7 ++++++- hw/peach/v2/wcss_seq_hwioreg_umac.h | 5 +++++ 4 files changed, 23 insertions(+), 3 deletions(-) diff --git a/hw/kiwi/v1/wcss_seq_hwioreg_umac.h b/hw/kiwi/v1/wcss_seq_hwioreg_umac.h index 69dac92cb19e..03a0e8f9dc2d 100644 --- a/hw/kiwi/v1/wcss_seq_hwioreg_umac.h +++ b/hw/kiwi/v1/wcss_seq_hwioreg_umac.h @@ -1,6 +1,6 @@ /* - * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021,2024 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the @@ -386,6 +386,11 @@ #define HWIO_WBM_R2_WBM2SW1_RELEASE_RING_HP_ADDR(x) ((x) + 0x30d0) #define HWIO_WBM_R0_WBM2SW0_RELEASE_RING_BASE_MSB_RING_SIZE_BMSK 0xfffff00 #define HWIO_WBM_R0_WBM2SW0_RELEASE_RING_BASE_MSB_RING_SIZE_SHFT 8 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) ((x) + 0x3b0) +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 16 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT 0 #define HWIO_REO_R0_REO2SW1_RING_MSI2_BASE_LSB_ADDR(x) ((x) + 0x3fc) #define HWIO_REO_R0_REO2SW1_RING_MSI2_BASE_MSB_ADDR(x) ((x) + 0x400) #define HWIO_REO_R0_REO2SW1_RING_MSI2_DATA_ADDR(x) ((x) + 0x404) diff --git a/hw/kiwi/v2/wcss_seq_hwioreg_umac.h b/hw/kiwi/v2/wcss_seq_hwioreg_umac.h index f594c525deed..11cb09569e7d 100644 --- a/hw/kiwi/v2/wcss_seq_hwioreg_umac.h +++ b/hw/kiwi/v2/wcss_seq_hwioreg_umac.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the @@ -224,6 +224,11 @@ #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_BMSK 0xfffff00 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_SHFT 8 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x) ((x) + 0x4ec) +#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) ((x) + 0x4f0) +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 16 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT 0 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x) ((x) + 0x4f4) #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x) ((x) + 0x4f8) #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x) ((x) + 0x4fc) diff --git a/hw/peach/v1/wcss_seq_hwioreg_umac.h b/hw/peach/v1/wcss_seq_hwioreg_umac.h index 70f00a564205..b56832a90289 100644 --- a/hw/peach/v1/wcss_seq_hwioreg_umac.h +++ b/hw/peach/v1/wcss_seq_hwioreg_umac.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -794,6 +794,11 @@ #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_BMSK 0xfffff00 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_SHFT 8 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x) ((x) + 0x508) +#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) ((x) + 0x50c) +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 16 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT 0 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x) ((x) + 0x510) #define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_BMSK 0x8000000 #define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_SHFT 27 diff --git a/hw/peach/v2/wcss_seq_hwioreg_umac.h b/hw/peach/v2/wcss_seq_hwioreg_umac.h index 4bfd1cc75984..a70dea57d36a 100644 --- a/hw/peach/v2/wcss_seq_hwioreg_umac.h +++ b/hw/peach/v2/wcss_seq_hwioreg_umac.h @@ -797,6 +797,11 @@ #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x) ((x) + 0x510) #define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_BMSK 0x8000000 #define HWIO_REO_R0_REO2SW1_RING_MISC_TRANSACTION_TYPE_SHFT 27 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x) ((x) + 0x50c) +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_AVAIL_WORDS_SHFT 16 +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff +#define HWIO_REO_R0_REO2SW1_RING_STATUS_NUM_VALID_WORDS_SHFT 0 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x) ((x) + 0x514) #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x) ((x) + 0x518) #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x) ((x) + 0x524)