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ARM: dts: msm: Correct GCC clocks for UART instances

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This change will map Correct GCC clocks for UART nodes

Change-Id: I4fdf9000369eca411fd05329760939d2503bd720
This commit is contained in:
Chandana Kishori Chiluveru 2020-11-03 23:08:08 +05:30
commit 0e305683df
1 changed files with 5 additions and 5 deletions
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10
qcom/sdxlemur-blsp.dtsi
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@ -385,7 +385,7 @@
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_UART1_APPS_CLK>;
<&gcc GCC_BLSP1_UART2_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart2a_tx_sleep>,
<&blsp1_uart2a_rxcts_sleep>, <&blsp1_uart2a_rfr_sleep>;
@ -421,7 +421,7 @@
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_UART1_APPS_CLK>;
<&gcc GCC_BLSP1_UART2_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart2b_tx_sleep>,<&blsp1_uart2b_rx_sleep>,
<&blsp1_uart2b_cts_sleep>, <&blsp1_uart2b_rfr_sleep>;
@ -457,7 +457,7 @@
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_UART1_APPS_CLK>;
<&gcc GCC_BLSP1_UART3_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart3_tx_sleep>,
<&blsp1_uart3_rxcts_sleep>, <&blsp1_uart3_rfr_sleep>;
@ -493,7 +493,7 @@
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_UART1_APPS_CLK>;
<&gcc GCC_BLSP1_UART4_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart4a_tx_sleep>,
<&blsp1_uart4a_rxcts_sleep>, <&blsp1_uart4a_rfr_sleep>;
@ -529,7 +529,7 @@
clock-names = "iface_clk", "core_clk";
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_UART1_APPS_CLK>;
<&gcc GCC_BLSP1_UART4_APPS_CLK>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart4b_tx_sleep>,
<&blsp1_uart4b_rxcts_sleep>, <&blsp1_uart4b_rfr_sleep>;