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ACPICA: Store GPE register enable masks upfront
It is reported that ACPI interrupts do not work any more on Dell Latitude D600 after commitc50f13c672(ACPICA: Save current masks of enabled GPEs after enable register writes). The problem turns out to be related to the fact that the enable_mask and enable_for_run GPE bit masks are not in sync (in the absence of any system suspend/resume events) for at least one GPE register on that machine. Address this problem by writing the enable_for_run mask into enable_mask as soon as enable_for_run is updated instead of doing that only after the subsequent register write has succeeded. For consistency, update acpi_hw_gpe_enable_write() to store the bit mask to be written into the GPE register in enable_mask unconditionally before the write. Since the ACPI_GPE_SAVE_MASK flag is not necessary any more after that, drop it along with the symbols depending on it. Reported-and-tested-by: Jim Bos <[email protected]> Fixes:c50f13c672(ACPICA: Save current masks of enabled GPEs after enable register writes) Cc: 3.19+ <[email protected]> # 3.19+ Signed-off-by: Rafael J. Wysocki <[email protected]>
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3 changed files with 7 additions and 13 deletions
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@ -759,10 +759,6 @@ typedef u32 acpi_event_status;
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#define ACPI_GPE_ENABLE 0
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#define ACPI_GPE_DISABLE 1
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#define ACPI_GPE_CONDITIONAL_ENABLE 2
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#define ACPI_GPE_SAVE_MASK 4
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#define ACPI_GPE_ENABLE_SAVE (ACPI_GPE_ENABLE | ACPI_GPE_SAVE_MASK)
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#define ACPI_GPE_DISABLE_SAVE (ACPI_GPE_DISABLE | ACPI_GPE_SAVE_MASK)
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/*
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* GPE info flags - Per GPE
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