From 0fab1bc2a2803fbb4e348d06fb473ff883870a7a Mon Sep 17 00:00:00 2001 From: Sarthak Garg Date: Fri, 3 Sep 2021 14:36:47 +0530 Subject: [PATCH] ARM: dts: msm: Restore SDCC registers once Resuming from CX/XO Defines the restore-after-cx-collapse property for SDCC controller. This basically lets the driver know that software needs to save the SDCC register contents before the CX/XO event and restore the SDCC register contents after coming out of CX/XO event. SDCC controller is not supporting retention of CX PC hence this change is needed. Change-Id: I719e7de2143edc457e706a66279bde816296ec73 --- qcom/sdxlemur-mtp-mbb-emmc.dtsi | 1 - qcom/sdxlemur.dtsi | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/sdxlemur-mtp-mbb-emmc.dtsi b/qcom/sdxlemur-mtp-mbb-emmc.dtsi index 6a400fbe2c40..b86320708b1f 100644 --- a/qcom/sdxlemur-mtp-mbb-emmc.dtsi +++ b/qcom/sdxlemur-mtp-mbb-emmc.dtsi @@ -14,7 +14,6 @@ reg = <0x08804000 0x1000>, <0x08805000 0x1000>; reg-names = "hc_mem", "cqhci_mem"; - qcom,restore-after-cx-collapse; mmc-ddr-1_8v; mmc-hs200-1_8v; diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi index 28c93114d8e3..12f065e72085 100644 --- a/qcom/sdxlemur.dtsi +++ b/qcom/sdxlemur.dtsi @@ -580,6 +580,7 @@ clock-names = "core", "iface"; bus-width = <4>; + qcom,restore-after-cx-collapse; /* DLL HSR settings. Refer go/hsr - DLL settings */ qcom,dll-hsr-list = <0x0007642c 0x0 0x10 0x2C010800 0x80040868>;