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arm64: Add workaround for Cavium erratum 27456

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On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
instructions may cause the icache to become corrupted if it contains
data for a non-current ASID.

This patch implements the workaround (which invalidates the local
icache when switching the mm) by using code patching.

Signed-off-by: Andrew Pinski <[email protected]>
Signed-off-by: David Daney <[email protected]>
Reviewed-by: Will Deacon <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
This commit is contained in:
Andrew Pinski 2016-02-24 17:44:57 -08:00 • committed by Catalin Marinas
commit 104a0c02e8
5 changed files with 35 additions and 1 deletions
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1
Documentation/arm64/silicon-errata.txt
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@ -56,3 +56,4 @@ stable kernels.
| | | | |
| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |