From 680139da53e0d9b31c51e934ef98886224a2a5e3 Mon Sep 17 00:00:00 2001 From: Avinash Philip Date: Sun, 14 Jun 2020 15:13:02 +0530 Subject: [PATCH 1/2] dt-bindings: msm: llcc: Add support for QDSS clock Add support for qdss clock for enabling llcc performance monitor module functionality. Change-Id: I17508083ebb6744ca0cad01ea6d23fbb3ec72369 --- bindings/arm/msm/qcom,llcc.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/bindings/arm/msm/qcom,llcc.txt b/bindings/arm/msm/qcom,llcc.txt index 5666382c2a6a..4e9c4d83be5b 100644 --- a/bindings/arm/msm/qcom,llcc.txt +++ b/bindings/arm/msm/qcom,llcc.txt @@ -33,6 +33,18 @@ Properties: It's used for llcc cache single and double bit error detection and reporting. +- clocks: + Usage: required + Value type: + Definition: List of phandles and clock specifier pairs for the llcc perfmon + trace feature support. + +- clock-names: + Usage: required + Value type: + Definition: List of clock input name strings sorted in the same + order as the clocks property. Definition must have + "qdss_clk" Example: cache-controller@1100000 { @@ -40,4 +52,6 @@ Example: reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; reg-names = "llcc_base", "llcc_broadcast_base"; interrupts = ; + clocks = <&clock_aop QDSS_CLK>; + clock-names = "qdss_clk"; }; From 516044be3ced6a6b622ba39f9afcbd9005c58787 Mon Sep 17 00:00:00 2001 From: Avinash Philip Date: Sun, 14 Jun 2020 15:13:51 +0530 Subject: [PATCH 2/2] ARM: dts: msm: qdss clock support for llcc lahaina Add qdss clock support for llcc perfmon module functionality in lahaina. Change-Id: I9b6d1a9bad4d03d33f443a41d0cd20707a339755 --- qcom/lahaina.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index 9286ecb492af..12c500ae2956 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -2670,6 +2670,8 @@ reg = <0x9200000 0x1d0000> , <0x9600000 0x50000>; reg-names = "llcc_base", "llcc_broadcast_base"; cap-based-alloc-and-pwr-collapse; + clocks = <&clock_aop QDSS_CLK>; + clock-names = "qdss_clk"; }; qcom_scm {