mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
UniPhier ARM SoC fixes for v4.9
- Add "select ARCH_HAS_RESET_CONTROLLER" in Kconfig - Rename wrongly-named mioctrl to sdctrl -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYC3TPAAoJED2LAQed4NsGBWQP/1YQ452mR1/5aO4HtlxapkKD Pn2GUPxxdnEJgCeUCQJbZJLZQKG8NfXvzRDuyRFlpUGvtHXB79W/zF7Qbh0XJQh4 flnNhPio6aeeyj6Mu9f2fZTzymxF7KeTgk2OAJjzi7BzRvOyrFQkkl6dquxmxfVz 0DO7VXiTewLtGTClesYXdj4Tr5zlR0PeyjBCw9nf3guy4RiQXXt5KXQvOXjHzFFl FZJcAN6hdJ2yh1LHyipXb4WnNl7YUro+OanesUU0Hg1wfCw4hmcjD4/BgO2y82kT ORTeN6Vrbvn8uBq/qxtJK/gzD/Kk/cyTQIe5pf9oW1WoZpyDS6PvLKErlv/+OkzX fsDG67ZaOn3lnGkP7R938gfjAefppWoxQSUMTiVWFjKO7TPSh3KjDAV2zRXr4Qfc +C/iRAHSMLB3JWZgYMKMy2N1QepqEynUeq2yWGd1FU/PbAjd/lb0fvWQR6eyySim JCby/nL6zJaxv1OLbRo4yeUN3LBGxEDsFCbO5z9ilZ9LTfPwiquUfIN/PDDigADY kqQJ+Mx1/5QhB9IH0fnzmMIQ+LNgZgxgahU1ZD3+q0HTlyb4lplJipQDwgo+k8k+ L6/LMa2VNk/Mj7klNb8QNTI2o5d8mHc+AJ7EWgwDA9RR9TfXJT2VE95IFdAfB893 jWqA+1RKB2dsyPwr4E9B =ucuF -----END PGP SIGNATURE----- Merge tag 'uniphier-fixes-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into fixes UniPhier ARM SoC fixes for v4.9 - Add "select ARCH_HAS_RESET_CONTROLLER" in Kconfig - Rename wrongly-named mioctrl to sdctrl * tag 'uniphier-fixes-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: change MIO node to SD control node ARM: dts: uniphier: change MIO node to SD control node reset: uniphier: rename MIO reset to SD reset for Pro5, PXs2, LD20 SoCs arm64: uniphier: select ARCH_HAS_RESET_CONTROLLER ARM: uniphier: select ARCH_HAS_RESET_CONTROLLER Signed-off-by: Olof Johansson <[email protected]>
This commit is contained in:
commit
10e15a639c
7 changed files with 51 additions and 49 deletions
|
|
@ -190,6 +190,7 @@ config ARCH_THUNDER
|
|||
|
||||
config ARCH_UNIPHIER
|
||||
bool "Socionext UniPhier SoC Family"
|
||||
select ARCH_HAS_RESET_CONTROLLER
|
||||
select PINCTRL
|
||||
help
|
||||
This enables support for Socionext UniPhier SoC family.
|
||||
|
|
|
|||
|
|
@ -257,18 +257,18 @@
|
|||
reg = <0x59801000 0x400>;
|
||||
};
|
||||
|
||||
mioctrl@59810000 {
|
||||
compatible = "socionext,uniphier-mioctrl",
|
||||
sdctrl@59810000 {
|
||||
compatible = "socionext,uniphier-ld20-sdctrl",
|
||||
"simple-mfd", "syscon";
|
||||
reg = <0x59810000 0x800>;
|
||||
|
||||
mio_clk: clock {
|
||||
compatible = "socionext,uniphier-ld20-mio-clock";
|
||||
sd_clk: clock {
|
||||
compatible = "socionext,uniphier-ld20-sd-clock";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
mio_rst: reset {
|
||||
compatible = "socionext,uniphier-ld20-mio-reset";
|
||||
sd_rst: reset {
|
||||
compatible = "socionext,uniphier-ld20-sd-reset";
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue