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pinctrl: sunxi: H3 requires irq_read_needs_mux
It seems that on H3, just like on A10, when GPIOs are configured as external interrupt data registers does not contain their value. When value is read, GPIO function must be temporary switched to input for reads. Signed-off-by: Krzysztof Adamski <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]> Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
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@ -492,6 +492,7 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
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.pins = sun8i_h3_pins,
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.npins = ARRAY_SIZE(sun8i_h3_pins),
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.irq_banks = 2,
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.irq_read_needs_mux = true
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};
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static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
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