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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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NXP/FSL SoC driver updates for v5.3
DPAA2 Console driver - Add driver to export two char devices to dump logs for MC and AIOP DPAA2 DPIO driver - Add support for memory backed QBMan portals - Increase the timeout period to prevent false error - Add APIs to retrieve QBMan portal probing status DPAA Qman driver - Only make liodn fixup on powerpc SoCs with PAMU iommu -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlzjAJMACgkQhtxQDvus FVQzBg/+Jmi8XNWxxIT+2MOKnEKZMiWwo9X+g4e3ZpwtoLujb9PaIAu3bY9Svhpj w2v6xUE8fNH1rlRcRQLLxW+v7ziruCx4iM2D6BKw1xgf8eu0ob4R1b+0bTgfSa9S xmHrNwgaTers7dB57ehYOq6PlExz0/wjU5hkPjhWMUkvA6RNAxDiZbexF0q21CYE T3dNA2v6sBuWqbtl6dzx+N884P7gLTuHMDJfcdFPTu+4I5YGJBnG6ZoM6YSLP5Pf i/sh57E7T3Zo4T0ysDDIndf1IssTOmmSxy+eTV1oCWBBSdD3m/zzb8Qw5ohMyGOI AMhrkMYOGKpwShCbtzKvfz4DYQhTj9YjTqO+G+EMuVEiPIvN+jkevsdub4+0q7BL q3Lo1T36JQ4RriI6m/csZIWju1LRNW0TQw8vLOAoOaLCOWEpNgGPxYFmqFiDqoNN 8PKC3BkH9BRJo8s9phMqWiqFb7RYegiGUsCrfIDU4x2uyyWAW2uAYQxFOfW+Mc+h 7/IonbApaS7uspn+CZFGp4TtXcbakbNoWgETf+b7zKJGrDqgWi2ErLHWxt1J3n54 waJnGlMlrafGdXqBVZNvuAvqmHD0BNzkck4c3ht+z4M96fw0K38EgWVgKfayElaK EiX/55HmejQ6aoqNvrv7NZrg/2o5Vcly7C9RtPj3aHMbIdyiQ7k= =C+f6 -----END PGP SIGNATURE----- Merge tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.3 DPAA2 Console driver - Add driver to export two char devices to dump logs for MC and AIOP DPAA2 DPIO driver - Add support for memory backed QBMan portals - Increase the timeout period to prevent false error - Add APIs to retrieve QBMan portal probing status DPAA Qman driver - Only make liodn fixup on powerpc SoCs with PAMU iommu * tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qbman_portals: add APIs to retrieve the probing status soc: fsl: qman: fixup liodns only on ppc targets soc: fsl: dpio: Add support for memory backed QBMan portals bus: mc-bus: Add support for mapping shareable portals soc: fsl: dpio: Increase timeout for QBMan Management Commands soc: fsl: add DPAA2 console support Documentation: DT: Add entry for DPAA2 console soc: fsl: guts: Add definition for LX2160A Signed-off-by: Olof Johansson <[email protected]>
This commit is contained in:
commit
1126037393
18 changed files with 618 additions and 51 deletions
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@ -443,11 +443,31 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io,
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struct fsl_mc_command cmd = { 0 };
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struct dprc_cmd_get_obj_region *cmd_params;
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struct dprc_rsp_get_obj_region *rsp_params;
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u16 major_ver, minor_ver;
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int err;
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/* prepare command */
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cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG,
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cmd_flags, token);
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err = dprc_get_api_version(mc_io, 0,
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&major_ver,
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&minor_ver);
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if (err)
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return err;
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/**
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* MC API version 6.3 introduced a new field to the region
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* descriptor: base_address. If the older API is in use then the base
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* address is set to zero to indicate it needs to be obtained elsewhere
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* (typically the device tree).
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*/
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if (major_ver > 6 || (major_ver == 6 && minor_ver >= 3))
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cmd.header =
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mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG_V2,
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cmd_flags, token);
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else
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cmd.header =
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mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG,
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cmd_flags, token);
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cmd_params = (struct dprc_cmd_get_obj_region *)cmd.params;
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cmd_params->obj_id = cpu_to_le32(obj_id);
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cmd_params->region_index = region_index;
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@ -461,8 +481,12 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io,
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/* retrieve response parameters */
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rsp_params = (struct dprc_rsp_get_obj_region *)cmd.params;
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region_desc->base_offset = le64_to_cpu(rsp_params->base_addr);
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region_desc->base_offset = le64_to_cpu(rsp_params->base_offset);
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region_desc->size = le32_to_cpu(rsp_params->size);
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if (major_ver > 6 || (major_ver == 6 && minor_ver >= 3))
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region_desc->base_address = le64_to_cpu(rsp_params->base_addr);
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else
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region_desc->base_address = 0;
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return 0;
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}
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@ -487,10 +487,19 @@ static int fsl_mc_device_get_mmio_regions(struct fsl_mc_device *mc_dev,
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"dprc_get_obj_region() failed: %d\n", error);
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goto error_cleanup_regions;
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}
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error = translate_mc_addr(mc_dev, mc_region_type,
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/*
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* Older MC only returned region offset and no base address
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* If base address is in the region_desc use it otherwise
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* revert to old mechanism
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*/
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if (region_desc.base_address)
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regions[i].start = region_desc.base_address +
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region_desc.base_offset;
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else
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error = translate_mc_addr(mc_dev, mc_region_type,
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region_desc.base_offset,
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®ions[i].start);
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if (error < 0) {
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dev_err(parent_dev,
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"Invalid MC offset: %#x (for %s.%d\'s region %d)\n",
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@ -504,6 +513,8 @@ static int fsl_mc_device_get_mmio_regions(struct fsl_mc_device *mc_dev,
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regions[i].flags = IORESOURCE_IO;
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if (region_desc.flags & DPRC_REGION_CACHEABLE)
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regions[i].flags |= IORESOURCE_CACHEABLE;
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if (region_desc.flags & DPRC_REGION_SHAREABLE)
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regions[i].flags |= IORESOURCE_MEM;
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}
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mc_dev->regions = regions;
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@ -79,9 +79,11 @@ int dpmcp_reset(struct fsl_mc_io *mc_io,
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/* DPRC command versioning */
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#define DPRC_CMD_BASE_VERSION 1
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#define DPRC_CMD_2ND_VERSION 2
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#define DPRC_CMD_ID_OFFSET 4
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#define DPRC_CMD(id) (((id) << DPRC_CMD_ID_OFFSET) | DPRC_CMD_BASE_VERSION)
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#define DPRC_CMD_V2(id) (((id) << DPRC_CMD_ID_OFFSET) | DPRC_CMD_2ND_VERSION)
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/* DPRC command IDs */
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#define DPRC_CMDID_CLOSE DPRC_CMD(0x800)
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@ -100,6 +102,7 @@ int dpmcp_reset(struct fsl_mc_io *mc_io,
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#define DPRC_CMDID_GET_OBJ_COUNT DPRC_CMD(0x159)
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#define DPRC_CMDID_GET_OBJ DPRC_CMD(0x15A)
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#define DPRC_CMDID_GET_OBJ_REG DPRC_CMD(0x15E)
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#define DPRC_CMDID_GET_OBJ_REG_V2 DPRC_CMD_V2(0x15E)
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#define DPRC_CMDID_SET_OBJ_IRQ DPRC_CMD(0x15F)
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struct dprc_cmd_open {
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@ -199,9 +202,16 @@ struct dprc_rsp_get_obj_region {
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/* response word 0 */
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__le64 pad;
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/* response word 1 */
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__le64 base_addr;
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__le64 base_offset;
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/* response word 2 */
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__le32 size;
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__le32 pad2;
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/* response word 3 */
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__le32 flags;
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__le32 pad3;
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/* response word 4 */
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/* base_addr may be zero if older MC firmware is used */
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__le64 base_addr;
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};
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struct dprc_cmd_set_obj_irq {
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@ -334,6 +344,7 @@ int dprc_set_obj_irq(struct fsl_mc_io *mc_io,
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/* Region flags */
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/* Cacheable - Indicates that region should be mapped as cacheable */
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#define DPRC_REGION_CACHEABLE 0x00000001
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#define DPRC_REGION_SHAREABLE 0x00000002
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/**
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* enum dprc_region_type - Region type
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@ -342,7 +353,8 @@ int dprc_set_obj_irq(struct fsl_mc_io *mc_io,
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*/
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enum dprc_region_type {
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DPRC_REGION_TYPE_MC_PORTAL,
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DPRC_REGION_TYPE_QBMAN_PORTAL
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DPRC_REGION_TYPE_QBMAN_PORTAL,
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DPRC_REGION_TYPE_QBMAN_MEM_BACKED_PORTAL
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};
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/**
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@ -360,6 +372,7 @@ struct dprc_region_desc {
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u32 size;
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u32 flags;
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enum dprc_region_type type;
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u64 base_address;
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};
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int dprc_get_obj_region(struct fsl_mc_io *mc_io,
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