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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: soc: soc-specific updates
Most notable here is probably the addition of basic support for the BCM2835, an SoC used in some of the Roku 2 players as well as the much-hyped Raspberry Pi, cleaned up and contributed by Stephen Warren. It's still early days on mainline support, with just the basics working. But it has to start somewhere! Beyond that there's some conversions of clock infrastructure on tegra to common clock, misc updates for several other platforms, and OMAP now has its own bus (under drivers/bus) to manage its devices through. This branch adds two new directories outside of arch/arm: drivers/irqchip for new irq controllers, and drivers/bus for the above OMAP bus. It's expected that some of the other platforms will migrate parts of their platforms to those directories over time as well. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaO2SAAoJEIwa5zzehBx3TBIQAJYc+vpAqiv8MLQ1XV3cLiIP X57fxM9u1A+uXpXsiCTGR+ga8W4a5tlfGMXDBnl/K2bnFs2x11b9NkFLDJ7mdkih J4c/iOWT/mT5suLnnybyg6ZGaxGkAKou2AumiSmkazmq5hGG67hkpAOqFEfDK0J2 Au7/6VN6GZXgiwt8nYaAB/qR5NVcww4m/6GQ2looaWgRLT/wgC3W2ZKvw6zEdl2J OxOpwf2ujG/75zLQaxTeZ5rKnGtAXH4v0KhY9CWQacQPi4L2MVCrvUrDB4j0as4H Wmsu7g6fZA9Vlf1aW/mlDY1ftozfbDaKORoYVS+CsWhm1oiQI5t+sAWRTkbbS85t pobgKfFdvNsl9kS1zRdEddK2tyotwtXh2jz+P/s1l95hfqZ8IdVBJNMlcrHRINOI 2iQXFfGRhCCqMcfFiGXJ43tYja/aCsaIc4M5TrEma57czZT5jK8HSLh0ZUmFYDoe /TfUegVhFASmkNTk7dVZgZ2UoQVkv4lWs+xuf8YgX3UalWgl/YIRRFl4NnylGlEc jjrX3MjXATqXzLPEZaf8dRZHIpB6FYmZq1QqaoefcUQ46gBOueThElZP3sNWR8a2 MOtknauLfLwQbrcH5CmqKpIpXTB4LKgbf/omH2jQlxBhQ5t7PXHVD1NFsbZbwM8J RVCZb4PwqEwOt/wibTrk =BCp4 -----END PGP SIGNATURE----- Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc-specific updates from Olof Johansson: "Most notable here is probably the addition of basic support for the BCM2835, an SoC used in some of the Roku 2 players as well as the much-hyped Raspberry Pi, cleaned up and contributed by Stephen Warren. It's still early days on mainline support, with just the basics working. But it has to start somewhere! Beyond that there's some conversions of clock infrastructure on tegra to common clock, misc updates for several other platforms, and OMAP now has its own bus (under drivers/bus) to manage its devices through. This branch adds two new directories outside of arch/arm: drivers/irqchip for new irq controllers, and drivers/bus for the above OMAP bus. It's expected that some of the other platforms will migrate parts of their platforms to those directories over time as well." Fix up trivial conflicts with the clk infrastructure changes. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (62 commits) ARM: shmobile: add new __iomem annotation for new code ARM: LPC32xx: Support GPI 28 ARM: LPC32xx: Platform update for devicetree completion of spi-pl022 ARM: LPC32xx: Board cleanup irqchip: fill in empty Kconfig ARM: SAMSUNG: Add check for NULL in clock interface ARM: EXYNOS: Put PCM, Slimbus, Spdif clocks to off state ARM: EXYNOS: Add bus clock for FIMD ARM: SAMSUNG: Fix HDMI related warnings ARM: S3C24XX: Add .get_rate callback for "camif-upll" clock ARM: EXYNOS: Fix incorrect help text ARM: EXYNOS: Turn off clocks for NAND, OneNAND and TSI controllers ARM: OMAP: AM33xx hwmod: fixup SPI after platform_data move MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture ARM: bcm2835: instantiate console UART ARM: bcm2835: add stub clock driver ARM: bcm2835: add system timer ARM: bcm2835: add interrupt controller driver ARM: add infra-structure for BCM2835 and Raspberry Pi ARM: tegra20: add CPU hotplug support ...
This commit is contained in:
Linus Torvalds
commit
11801e9de2
86 changed files with 10543 additions and 5039 deletions
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@ -13,4 +13,6 @@ obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
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obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
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obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
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obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
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obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
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obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
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161
drivers/clocksource/bcm2835_timer.c
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161
drivers/clocksource/bcm2835_timer.c
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@ -0,0 +1,161 @@
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/*
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* Copyright 2012 Simon Arlott
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/bcm2835_timer.h>
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#include <linux/bitops.h>
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#include <linux/clockchips.h>
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#include <linux/clocksource.h>
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#include <linux/interrupt.h>
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#include <linux/irqreturn.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <asm/sched_clock.h>
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#include <asm/irq.h>
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#define REG_CONTROL 0x00
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#define REG_COUNTER_LO 0x04
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#define REG_COUNTER_HI 0x08
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#define REG_COMPARE(n) (0x0c + (n) * 4)
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#define MAX_TIMER 3
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#define DEFAULT_TIMER 3
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struct bcm2835_timer {
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void __iomem *control;
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void __iomem *compare;
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int match_mask;
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struct clock_event_device evt;
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struct irqaction act;
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};
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static void __iomem *system_clock __read_mostly;
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static u32 notrace bcm2835_sched_read(void)
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{
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return readl_relaxed(system_clock);
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}
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static void bcm2835_time_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt_dev)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_RESUME:
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break;
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default:
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WARN(1, "%s: unhandled event mode %d\n", __func__, mode);
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break;
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}
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}
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static int bcm2835_time_set_next_event(unsigned long event,
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struct clock_event_device *evt_dev)
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{
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struct bcm2835_timer *timer = container_of(evt_dev,
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struct bcm2835_timer, evt);
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writel_relaxed(readl_relaxed(system_clock) + event,
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timer->compare);
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return 0;
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}
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static irqreturn_t bcm2835_time_interrupt(int irq, void *dev_id)
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{
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struct bcm2835_timer *timer = dev_id;
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void (*event_handler)(struct clock_event_device *);
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if (readl_relaxed(timer->control) & timer->match_mask) {
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writel_relaxed(timer->match_mask, timer->control);
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event_handler = ACCESS_ONCE(timer->evt.event_handler);
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if (event_handler)
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event_handler(&timer->evt);
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return IRQ_HANDLED;
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} else {
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return IRQ_NONE;
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}
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}
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static struct of_device_id bcm2835_time_match[] __initconst = {
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{ .compatible = "brcm,bcm2835-system-timer" },
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{}
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};
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static void __init bcm2835_time_init(void)
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{
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struct device_node *node;
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void __iomem *base;
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u32 freq;
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int irq;
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struct bcm2835_timer *timer;
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node = of_find_matching_node(NULL, bcm2835_time_match);
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if (!node)
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panic("No bcm2835 timer node");
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base = of_iomap(node, 0);
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if (!base)
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panic("Can't remap registers");
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if (of_property_read_u32(node, "clock-frequency", &freq))
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panic("Can't read clock-frequency");
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system_clock = base + REG_COUNTER_LO;
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setup_sched_clock(bcm2835_sched_read, 32, freq);
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clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
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freq, 300, 32, clocksource_mmio_readl_up);
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irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
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if (irq <= 0)
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panic("Can't parse IRQ");
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timer = kzalloc(sizeof(*timer), GFP_KERNEL);
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if (!timer)
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panic("Can't allocate timer struct\n");
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timer->control = base + REG_CONTROL;
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timer->compare = base + REG_COMPARE(DEFAULT_TIMER);
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timer->match_mask = BIT(DEFAULT_TIMER);
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timer->evt.name = node->name;
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timer->evt.rating = 300;
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timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
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timer->evt.set_mode = bcm2835_time_set_mode;
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timer->evt.set_next_event = bcm2835_time_set_next_event;
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timer->evt.cpumask = cpumask_of(0);
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timer->act.name = node->name;
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timer->act.flags = IRQF_TIMER | IRQF_SHARED;
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timer->act.dev_id = timer;
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timer->act.handler = bcm2835_time_interrupt;
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if (setup_irq(irq, &timer->act))
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panic("Can't set up timer IRQ\n");
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clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
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pr_info("bcm2835: system timer (irq = %d)\n", irq);
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}
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struct sys_timer bcm2835_timer = {
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.init = bcm2835_time_init,
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};
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