From 11877cd88d3eed51450f0db840feedea4696a6f2 Mon Sep 17 00:00:00 2001
From: Raghavendra Rao Ananta <rananta@quicinc.com>
Date: Mon, 27 Jan 2020 09:20:06 -0800
Subject: [PATCH] ARM: dts: msm: Update the arch_timer frequency

Update the arch_timer frequency to 19.2 MHz, now that the device
boots up on a real hardware (instead of an emulation platform).
Leave the 96KHz still intact for emulation platforms.

Change-Id: I3745395b88d8aa9d1b0047b4eca7c85db4ec7a13
---
 qcom/lahaina-rumi.dtsi | 4 ++++
 qcom/lahaina.dtsi      | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/qcom/lahaina-rumi.dtsi b/qcom/lahaina-rumi.dtsi
index 35a5b6e51454..4b2723c2e4e7 100644
--- a/qcom/lahaina-rumi.dtsi
+++ b/qcom/lahaina-rumi.dtsi
@@ -1,6 +1,10 @@
 #include "lahaina-pmic-overlay.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 
+&arch_timer {
+	clock-frequency = <96000>;
+};
+
 &spmi_debug_bus {
 	status = "ok";
 };
diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index e2c1b4a82e04..5902fe8be704 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -508,7 +508,7 @@
 			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 			     <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
-		clock-frequency = <96000>;
+		clock-frequency = <19200000>;
 	};
 
 	memtimer: timer@17c20000 {