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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Third Round of Renesas ARM Based SoC DT Updates for v3.14
* r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCSs - Add SSI, QSPI and MSIOF clocks in device tree r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards - Remove reference DTS - Specify external clock frequency in DT - Sync non-reference DTS with referene DTS - Add clocks to DTS * r8a7740 (R-Mobile A1) based Armadillo board - Add gpio-keys device - Add PWM backlight enable GPIO - Add PWM backlight power supply * r8a73a0 (SH-Mobile AG5), r8a7740 (R-Mobile A1) and r8a73a4 (SH-Mobile APE6) SoCs - Specify PFC interrupts in DT -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSuZPxAAoJENfPZGlqN0++G1cP/j2A/bL1NA1MeYSYmTeaW50X vbEseiL4vbme3TJ6c+yJMd8ayV2V3W+fzua+s4R6+9Q1oyfCwigbS+lfrjx6e2+Q KanklWZOJyj6NerSoHtF4e9ayE+YN4IuMR0fLKr7W4cqn3+EHuBMAxOhd70JxYfD tEI9t9fJEjMTDFQlzlkDGyYJX5ryg3jXs3WC96pqHafdHlznSsS2l+aANKWBDrjO hPeqWygK2Wz56ifO5A2/N8skGtHTaqDVGdhXSqa6vcH1wWdM9yK8cnpE7ktwrFyo dOD2uu1mmNv4NiaW5fyKNKjdde3YRY/wJ7S0CSuYdShnbEaIQbyqPDMUmZErEF2j 9S/GXPnyVjmDeaQ8cnhr8+NIsn/hM72mOaQB/jyrF979dlCkYov3pr+5TiupKXCG hqOaHG8OtlusG0p19oO8DWgzHZsgrYwwBdaDSRF/NCilk5wOgQg2gf8sWr6W/Kiz 8TFZvS99tlzhAXUthhINf4cHg1otAuMt4xKiDlpy2dzd1LGaHRxtCFFecF3b6PIF zTa2rjdUV8mNXB4jhG7EdoLqMamuHifIY9TngQg+f1CjQH0BkR4BgOYY6FnlHI36 NGjRqUJBY0tDBRL3yER0s9QIPhtZgkYGO3PrniGlT9575VNK1CuwW4JwNBkwZyPC xVbIpoJqG5cXMN4ENLFe =NpbK -----END PGP SIGNATURE----- Merge tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt From Simon Horman: Third Round of Renesas ARM Based SoC DT Updates for v3.14 * r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCSs - Add SSI, QSPI and MSIOF clocks in device tree r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards - Remove reference DTS - Specify external clock frequency in DT - Sync non-reference DTS with referene DTS - Add clocks to DTS * r8a7740 (R-Mobile A1) based Armadillo board - Add gpio-keys device - Add PWM backlight enable GPIO - Add PWM backlight power supply * r8a73a0 (SH-Mobile AG5), r8a7740 (R-Mobile A1) and r8a73a4 (SH-Mobile APE6) SoCs - Specify PFC interrupts in DT * tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (72 commits) ARM: shmobile: r8a7791: Add SSI clocks in device tree ARM: shmobile: r8a7790: Add SSI clocks in device tree ARM: shmobile: r8a7791: Add QSPI module clock in device tree ARM: shmobile: r8a7790: Add QSPI module clock in device tree ARM: shmobile: r8a7791: Add MSIOF clocks in device tree ARM: shmobile: r8a7790: Add MSIOF clocks in device tree ARM: shmobile: Remove Koelsch reference DTS ARM: shmobile: Remove Lager reference DTS ARM: shmobile: koelsch: Specify external clock frequency in DT ARM: shmobile: lager: Specify external clock frequency in DT ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS ARM: shmobile: Sync Lager DTS with Lager reference DTS ARM: shmobile: r8a7791: Add clocks ARM: shmobile: r8a7790: Reference clocks ARM: shmobile: r8a7790: Add clocks ARM: shmobile: armadillo: dts: Add gpio-keys device ARM: shmobile: sh73a0: Specify PFC interrupts in DT ARM: shmobile: r8a7740: Specify PFC interrupts in DT ARM: shmobile: r8a73a4: Specify PFC interrupts in DT ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO ... Signed-off-by: Olof Johansson <[email protected]>
This commit is contained in:
Olof Johansson
commit
11b35a3525
59 changed files with 5356 additions and 331 deletions
120
include/dt-bindings/clock/r8a7790-clock.h
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120
include/dt-bindings/clock/r8a7790-clock.h
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/*
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* Copyright 2013 Ideas On Board SPRL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
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#define __DT_BINDINGS_CLOCK_R8A7790_H__
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/* CPG */
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#define R8A7790_CLK_MAIN 0
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#define R8A7790_CLK_PLL0 1
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#define R8A7790_CLK_PLL1 2
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#define R8A7790_CLK_PLL3 3
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#define R8A7790_CLK_LB 4
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#define R8A7790_CLK_QSPI 5
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#define R8A7790_CLK_SDH 6
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#define R8A7790_CLK_SD0 7
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#define R8A7790_CLK_SD1 8
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#define R8A7790_CLK_Z 9
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/* MSTP0 */
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#define R8A7790_CLK_MSIOF0 0
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/* MSTP1 */
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#define R8A7790_CLK_TMU1 11
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#define R8A7790_CLK_TMU3 21
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#define R8A7790_CLK_TMU2 22
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#define R8A7790_CLK_CMT0 24
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#define R8A7790_CLK_TMU0 25
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#define R8A7790_CLK_VSP1_DU1 27
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#define R8A7790_CLK_VSP1_DU0 28
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#define R8A7790_CLK_VSP1_RT 30
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#define R8A7790_CLK_VSP1_SY 31
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/* MSTP2 */
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#define R8A7790_CLK_SCIFA2 2
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#define R8A7790_CLK_SCIFA1 3
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#define R8A7790_CLK_SCIFA0 4
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#define R8A7790_CLK_MSIOF2 5
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#define R8A7790_CLK_SCIFB0 6
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#define R8A7790_CLK_SCIFB1 7
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#define R8A7790_CLK_MSIOF1 8
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#define R8A7790_CLK_MSIOF3 15
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#define R8A7790_CLK_SCIFB2 16
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#define R8A7790_CLK_SYS_DMAC0 18
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#define R8A7790_CLK_SYS_DMAC1 19
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/* MSTP3 */
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#define R8A7790_CLK_TPU0 4
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#define R8A7790_CLK_MMCIF1 5
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#define R8A7790_CLK_SDHI3 11
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#define R8A7790_CLK_SDHI2 12
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#define R8A7790_CLK_SDHI1 13
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#define R8A7790_CLK_SDHI0 14
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#define R8A7790_CLK_MMCIF0 15
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#define R8A7790_CLK_SSUSB 28
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#define R8A7790_CLK_CMT1 29
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#define R8A7790_CLK_USBDMAC0 30
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#define R8A7790_CLK_USBDMAC1 31
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/* MSTP5 */
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#define R8A7790_CLK_THERMAL 22
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#define R8A7790_CLK_PWM 23
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/* MSTP7 */
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#define R8A7790_CLK_EHCI 3
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#define R8A7790_CLK_HSUSB 4
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#define R8A7790_CLK_HSCIF1 16
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#define R8A7790_CLK_HSCIF0 17
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#define R8A7790_CLK_SCIF1 20
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#define R8A7790_CLK_SCIF0 21
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#define R8A7790_CLK_DU2 22
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#define R8A7790_CLK_DU1 23
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#define R8A7790_CLK_DU0 24
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#define R8A7790_CLK_LVDS1 25
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#define R8A7790_CLK_LVDS0 26
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/* MSTP8 */
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#define R8A7790_CLK_VIN3 8
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#define R8A7790_CLK_VIN2 9
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#define R8A7790_CLK_VIN1 10
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#define R8A7790_CLK_VIN0 11
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#define R8A7790_CLK_ETHER 13
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#define R8A7790_CLK_SATA1 14
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#define R8A7790_CLK_SATA0 15
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/* MSTP9 */
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#define R8A7790_CLK_GPIO5 7
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#define R8A7790_CLK_GPIO4 8
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#define R8A7790_CLK_GPIO3 9
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#define R8A7790_CLK_GPIO2 10
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#define R8A7790_CLK_GPIO1 11
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#define R8A7790_CLK_GPIO0 12
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#define R8A7790_CLK_RCAN1 15
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#define R8A7790_CLK_RCAN0 16
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#define R8A7790_CLK_QSPI_MOD 17
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#define R8A7790_CLK_IICDVFS 26
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#define R8A7790_CLK_I2C3 28
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#define R8A7790_CLK_I2C2 29
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#define R8A7790_CLK_I2C1 30
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#define R8A7790_CLK_I2C0 31
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/* MSTP10 */
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#define R8A7790_CLK_SSI 5
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#define R8A7790_CLK_SSI9 6
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#define R8A7790_CLK_SSI8 7
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#define R8A7790_CLK_SSI7 8
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#define R8A7790_CLK_SSI6 9
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#define R8A7790_CLK_SSI5 10
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#define R8A7790_CLK_SSI4 11
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#define R8A7790_CLK_SSI3 12
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#define R8A7790_CLK_SSI2 13
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#define R8A7790_CLK_SSI1 14
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#define R8A7790_CLK_SSI0 15
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#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
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124
include/dt-bindings/clock/r8a7791-clock.h
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124
include/dt-bindings/clock/r8a7791-clock.h
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/*
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* Copyright 2013 Ideas On Board SPRL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
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#define __DT_BINDINGS_CLOCK_R8A7791_H__
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/* CPG */
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#define R8A7791_CLK_MAIN 0
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#define R8A7791_CLK_PLL0 1
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#define R8A7791_CLK_PLL1 2
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#define R8A7791_CLK_PLL3 3
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#define R8A7791_CLK_LB 4
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#define R8A7791_CLK_QSPI 5
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#define R8A7791_CLK_SDH 6
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#define R8A7791_CLK_SD0 7
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#define R8A7791_CLK_Z 8
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/* MSTP0 */
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#define R8A7791_CLK_MSIOF0 0
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/* MSTP1 */
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#define R8A7791_CLK_TMU1 11
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#define R8A7791_CLK_TMU3 21
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#define R8A7791_CLK_TMU2 22
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#define R8A7791_CLK_CMT0 24
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#define R8A7791_CLK_TMU0 25
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#define R8A7791_CLK_VSP1_DU1 27
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#define R8A7791_CLK_VSP1_DU0 28
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#define R8A7791_CLK_VSP1_SY 31
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/* MSTP2 */
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#define R8A7791_CLK_SCIFA2 2
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#define R8A7791_CLK_SCIFA1 3
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#define R8A7791_CLK_SCIFA0 4
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#define R8A7791_CLK_MSIOF2 5
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#define R8A7791_CLK_SCIFB0 6
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#define R8A7791_CLK_SCIFB1 7
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#define R8A7791_CLK_MSIOF1 8
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#define R8A7791_CLK_SCIFB2 16
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#define R8A7791_CLK_DMAC 18
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/* MSTP3 */
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#define R8A7791_CLK_TPU0 4
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#define R8A7791_CLK_SDHI2 11
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#define R8A7791_CLK_SDHI1 12
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#define R8A7791_CLK_SDHI0 14
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#define R8A7791_CLK_MMCIF0 15
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#define R8A7791_CLK_SSUSB 28
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#define R8A7791_CLK_CMT1 29
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#define R8A7791_CLK_USBDMAC0 30
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#define R8A7791_CLK_USBDMAC1 31
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/* MSTP5 */
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#define R8A7791_CLK_THERMAL 22
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#define R8A7791_CLK_PWM 23
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/* MSTP7 */
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#define R8A7791_CLK_HSUSB 4
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#define R8A7791_CLK_HSCIF2 13
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#define R8A7791_CLK_SCIF5 14
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#define R8A7791_CLK_SCIF4 15
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#define R8A7791_CLK_HSCIF1 16
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#define R8A7791_CLK_HSCIF0 17
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#define R8A7791_CLK_SCIF3 18
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#define R8A7791_CLK_SCIF2 19
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#define R8A7791_CLK_SCIF1 20
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#define R8A7791_CLK_SCIF0 21
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#define R8A7791_CLK_DU1 23
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#define R8A7791_CLK_DU0 24
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#define R8A7791_CLK_LVDS0 26
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/* MSTP8 */
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#define R8A7791_CLK_VIN2 9
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#define R8A7791_CLK_VIN1 10
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#define R8A7791_CLK_VIN0 11
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#define R8A7791_CLK_ETHER 13
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#define R8A7791_CLK_SATA1 14
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#define R8A7791_CLK_SATA0 15
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/* MSTP9 */
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#define R8A7791_CLK_GPIO7 4
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#define R8A7791_CLK_GPIO6 5
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#define R8A7791_CLK_GPIO5 7
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#define R8A7791_CLK_GPIO4 8
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#define R8A7791_CLK_GPIO3 9
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#define R8A7791_CLK_GPIO2 10
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#define R8A7791_CLK_GPIO1 11
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#define R8A7791_CLK_GPIO0 12
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#define R8A7791_CLK_RCAN1 15
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#define R8A7791_CLK_RCAN0 16
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#define R8A7791_CLK_QSPI_MOD 17
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#define R8A7791_CLK_I2C5 25
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#define R8A7791_CLK_IICDVFS 26
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#define R8A7791_CLK_I2C4 27
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#define R8A7791_CLK_I2C3 28
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#define R8A7791_CLK_I2C2 29
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#define R8A7791_CLK_I2C1 30
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#define R8A7791_CLK_I2C0 31
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/* MSTP10 */
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#define R8A7791_CLK_SSI 5
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#define R8A7791_CLK_SSI9 6
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#define R8A7791_CLK_SSI8 7
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#define R8A7791_CLK_SSI7 8
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#define R8A7791_CLK_SSI6 9
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#define R8A7791_CLK_SSI5 10
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#define R8A7791_CLK_SSI4 11
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#define R8A7791_CLK_SSI3 12
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#define R8A7791_CLK_SSI2 13
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#define R8A7791_CLK_SSI1 14
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#define R8A7791_CLK_SSI0 15
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/* MSTP11 */
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#define R8A7791_CLK_SCIFA3 6
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#define R8A7791_CLK_SCIFA4 7
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#define R8A7791_CLK_SCIFA5 8
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#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
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