Merge with Linus' kernel.

This commit is contained in:
Russell King 2006-01-07 14:40:05 +00:00 • committed by Russell King
commit 123656d4cc
2145 changed files with 159776 additions and 65186 deletions

View file

@ -216,4 +216,5 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
#define smp_mb__before_atomic_inc() smp_mb()
#define smp_mb__after_atomic_inc() smp_mb()
#include <asm-generic/atomic.h>
#endif /* _ALPHA_ATOMIC_H */

View file

@ -321,6 +321,7 @@ static inline int fls(int word)
#else
#define fls generic_fls
#endif
#define fls64 generic_fls64
/* Compute powers of two for the given integer. */
static inline long floor_log2(unsigned long word)

View file

@ -16,7 +16,7 @@
#define dma_free_coherent(dev, size, va, addr) \
pci_free_consistent(alpha_gendev_to_pci(dev), size, va, addr)
#define dma_map_page(dev, page, off, size, dir) \
pci_map_single(alpha_gendev_to_pci(dev), page, off, size, dir)
pci_map_page(alpha_gendev_to_pci(dev), page, off, size, dir)
#define dma_unmap_page(dev, addr, size, dir) \
pci_unmap_page(alpha_gendev_to_pci(dev), addr, size, dir)
#define dma_map_sg(dev, sg, nents, dir) \

View file

@ -13,6 +13,8 @@ typedef struct {
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
void ack_bad_irq(unsigned int irq);
#define HARDIRQ_BITS 12
/*

View file

@ -42,6 +42,7 @@
#define MADV_WILLNEED 3 /* will need these pages */
#define MADV_SPACEAVAIL 5 /* ensure resources are available */
#define MADV_DONTNEED 6 /* don't need these pages */
#define MADV_REMOVE 7 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -0,0 +1,18 @@
#ifndef ASMARM_ARCH_OHCI_H
#define ASMARM_ARCH_OHCI_H
struct device;
struct pxaohci_platform_data {
int (*init)(struct device *);
void (*exit)(struct device *);
int port_mode;
#define PMM_NPS_MODE 1
#define PMM_GLOBAL_MODE 2
#define PMM_PERPORT_MODE 3
};
extern void pxa_set_ohci_info(struct pxaohci_platform_data *info);
#endif

View file

@ -205,5 +205,6 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif
#endif

View file

@ -332,6 +332,7 @@ static inline unsigned long __ffs(unsigned long word)
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
/*
* ffs: find first bit set. This is defined the same way as
@ -351,6 +352,7 @@ static inline unsigned long __ffs(unsigned long word)
#define fls(x) \
( __builtin_constant_p(x) ? generic_fls(x) : \
({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
#define fls64(x) generic_fls64(x)
#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
#define __ffs(x) (ffs(x) - 1)
#define ffz(x) __ffs( ~(x) )

View file

@ -35,6 +35,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -118,5 +118,6 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif
#endif

View file

@ -259,6 +259,7 @@ static inline unsigned long __ffs(unsigned long word)
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
/*
* ffs: find first bit set. This is defined the same way as

View file

@ -35,6 +35,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -156,4 +156,5 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif

View file

@ -240,6 +240,7 @@ static inline int test_bit(int nr, const volatile unsigned long *addr)
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
/*
* hweightN - returns the hamming weight of a N-bit word

View file

@ -37,6 +37,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -426,4 +426,5 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
})
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
#include <asm-generic/atomic.h>
#endif /* _ASM_ATOMIC_H */

View file

@ -228,6 +228,7 @@ found_middle:
\
bit ? 33 - bit : bit; \
})
#define fls64(x) generic_fls64(x)
/*
* Every architecture must define this function. It's the fastest

View file

@ -7,47 +7,7 @@
#include <asm/errno.h>
#include <asm/uaccess.h>
static inline int
futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
{
int op = (encoded_op >> 28) & 7;
int cmp = (encoded_op >> 24) & 15;
int oparg = (encoded_op << 8) >> 20;
int cmparg = (encoded_op << 20) >> 20;
int oldval = 0, ret;
if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
oparg = 1 << oparg;
if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
return -EFAULT;
inc_preempt_count();
switch (op) {
case FUTEX_OP_SET:
case FUTEX_OP_ADD:
case FUTEX_OP_OR:
case FUTEX_OP_ANDN:
case FUTEX_OP_XOR:
default:
ret = -ENOSYS;
}
dec_preempt_count();
if (!ret) {
switch (cmp) {
case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
default: ret = -ENOSYS;
}
}
return ret;
}
extern int futex_atomic_op_inuser(int encoded_op, int __user *uaddr);
#endif
#endif

View file

@ -35,6 +35,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -151,7 +151,6 @@ typedef struct sigaltstack {
size_t ss_size;
} stack_t;
extern int do_signal(struct pt_regs *regs, sigset_t *oldset);
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
#ifdef __KERNEL__

View file

@ -0,0 +1,116 @@
#ifndef _ASM_GENERIC_ATOMIC_H
#define _ASM_GENERIC_ATOMIC_H
/*
* Copyright (C) 2005 Silicon Graphics, Inc.
* Christoph Lameter <clameter@sgi.com>
*
* Allows to provide arch independent atomic definitions without the need to
* edit all arch specific atomic.h files.
*/
/*
* Suppport for atomic_long_t
*
* Casts for parameters are avoided for existing atomic functions in order to
* avoid issues with cast-as-lval under gcc 4.x and other limitations that the
* macros of a platform may have.
*/
#if BITS_PER_LONG == 64
typedef atomic64_t atomic_long_t;
#define ATOMIC_LONG_INIT(i) ATOMIC64_INIT(i)
static inline long atomic_long_read(atomic_long_t *l)
{
atomic64_t *v = (atomic64_t *)l;
return (long)atomic64_read(v);
}
static inline void atomic_long_set(atomic_long_t *l, long i)
{
atomic64_t *v = (atomic64_t *)l;
atomic_set(v, i);
}
static inline void atomic_long_inc(atomic_long_t *l)
{
atomic64_t *v = (atomic64_t *)l;
atomic64_inc(v);
}
static inline void atomic_long_dec(atomic_long_t *l)
{
atomic64_t *v = (atomic64_t *)l;
atomic64_dec(v);
}
static inline void atomic_long_add(long i, atomic_long_t *l)
{
atomic64_t *v = (atomic64_t *)l;
atomic64_add(i, v);
}
static inline void atomic_long_sub(long i, atomic_long_t *l)
{
atomic64_t *v = (atomic64_t *)l;
atomic64_sub(i, v);
}
#else
typedef atomic_t atomic_long_t;
#define ATOMIC_LONG_INIT(i) ATOMIC_INIT(i)
static inline long atomic_long_read(atomic_long_t *l)
{
atomic_t *v = (atomic_t *)l;
return (long)atomic_read(v);
}
static inline void atomic_long_set(atomic_long_t *l, long i)
{
atomic_t *v = (atomic_t *)l;
atomic_set(v, i);
}
static inline void atomic_long_inc(atomic_long_t *l)
{
atomic_t *v = (atomic_t *)l;
atomic_inc(v);
}
static inline void atomic_long_dec(atomic_long_t *l)
{
atomic_t *v = (atomic_t *)l;
atomic_dec(v);
}
static inline void atomic_long_add(long i, atomic_long_t *l)
{
atomic_t *v = (atomic_t *)l;
atomic_add(i, v);
}
static inline void atomic_long_sub(long i, atomic_long_t *l)
{
atomic_t *v = (atomic_t *)l;
atomic_sub(i, v);
}
#endif
#endif

View file

@ -56,6 +56,7 @@ extern __inline__ int test_bit(int nr, const unsigned long * addr)
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#ifdef __KERNEL__

View file

@ -10,6 +10,8 @@
#define ALIGN_FUNCTION() . = ALIGN(8)
#define RODATA \
. = ALIGN(4096); \
__start_rodata = .; \
.rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \
*(.rodata) *(.rodata.*) \
*(__vermagic) /* Kernel version magic */ \
@ -74,6 +76,8 @@
__ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) { \
*(__ksymtab_strings) \
} \
__end_rodata = .; \
. = ALIGN(4096); \
\
/* Built-in module parameters. */ \
__param : AT(ADDR(__param) - LOAD_OFFSET) { \

View file

@ -137,4 +137,5 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* __ARCH_H8300_ATOMIC __ */

View file

@ -406,5 +406,6 @@ found_middle:
#endif /* __KERNEL__ */
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#endif /* _H8300_BITOPS_H */

View file

@ -61,11 +61,6 @@ static __inline__ int irq_canonicalize(int irq)
extern void enable_irq(unsigned int);
extern void disable_irq(unsigned int);
/*
* Some drivers want these entry points
*/
#define enable_irq_nosync(x) enable_irq(x)
#define disable_irq_nosync(x) disable_irq(x)
struct irqaction;

View file

@ -35,6 +35,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -254,4 +254,5 @@ __asm__ __volatile__(LOCK "orl %0,%1" \
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif

View file

@ -332,9 +332,9 @@ static inline unsigned long __ffs(unsigned long word)
* Returns the bit-number of the first set bit, not the number of the byte
* containing a bit.
*/
static inline int find_first_bit(const unsigned long *addr, unsigned size)
static inline unsigned find_first_bit(const unsigned long *addr, unsigned size)
{
int x = 0;
unsigned x = 0;
while (x < size) {
unsigned long val = *addr++;
@ -367,11 +367,7 @@ static inline unsigned long ffz(unsigned long word)
return word;
}
/*
* fls: find last bit set.
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#ifdef __KERNEL__
@ -413,6 +409,23 @@ static inline int ffs(int x)
return r+1;
}
/**
* fls - find last bit set
* @x: the word to search
*
* This is defined the same way as ffs.
*/
static inline int fls(int x)
{
int r;
__asm__("bsrl %1,%0\n\t"
"jnz 1f\n\t"
"movl $-1,%0\n"
"1:" : "=r" (r) : "rm" (x));
return r+1;
}
/**
* hweightN - returns the hamming weight of a N-bit word
* @x: the word to weigh

View file

@ -8,9 +8,6 @@
* <rreilova@ececs.uc.edu>
* - Channing Corn (tests & fixes),
* - Andrew D. Balsa (code cleanup).
*
* Pentium III FXSR, SSE support
* Gareth Hughes <gareth@valinux.com>, May 2000
*/
/*
@ -76,25 +73,7 @@ static void __init check_fpu(void)
return;
}
/* Enable FXSR and company _before_ testing for FP problems. */
/*
* Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
*/
if (offsetof(struct task_struct, thread.i387.fxsave) & 15) {
extern void __buggy_fxsr_alignment(void);
__buggy_fxsr_alignment();
}
if (cpu_has_fxsr) {
printk(KERN_INFO "Enabling fast FPU save and restore... ");
set_in_cr4(X86_CR4_OSFXSR);
printk("done.\n");
}
if (cpu_has_xmm) {
printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
set_in_cr4(X86_CR4_OSXMMEXCPT);
printk("done.\n");
}
/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */
/* Test for the divl bug.. */
__asm__("fninit\n\t"
"fldl %1\n\t"

View file

@ -31,4 +31,8 @@ int change_page_attr(struct page *page, int numpages, pgprot_t prot);
void kernel_map_pages(struct page *page, int numpages, int enable);
#endif
#ifdef CONFIG_DEBUG_RODATA
void mark_rodata_ro(void);
#endif
#endif /* _I386_CACHEFLUSH_H */

View file

@ -15,9 +15,6 @@
#include <asm/mmu.h>
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
DECLARE_PER_CPU(struct desc_struct, cpu_gdt_table[GDT_ENTRIES]);
#define get_cpu_gdt_table(_cpu) (per_cpu(cpu_gdt_table,_cpu))
DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
@ -29,6 +26,11 @@ struct Xgt_desc_struct {
extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
{
return ((struct desc_struct *)cpu_gdt_descr[cpu].address);
}
#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))

View file

@ -1,17 +1,10 @@
#ifndef __ASM_MACH_APIC_H
#define __ASM_MACH_APIC_H
#include <asm/smp.h>
#define SEQUENTIAL_APICID
#ifdef SEQUENTIAL_APICID
#define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\
((phys_apic<<2) & (~0xf)) )
#elif CLUSTERED_APICID
#define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\
((phys_apic) & (~0xf)) )
#endif
#define NO_BALANCE_IRQ (1)
extern u8 bios_cpu_apicid[];
#define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu])
#define esr_disable (1)
static inline int apic_id_registered(void)
@ -19,7 +12,6 @@ static inline int apic_id_registered(void)
return (1);
}
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
/* Round robin the irqs amoung the online cpus */
static inline cpumask_t target_cpus(void)
{
@ -32,29 +24,34 @@ static inline cpumask_t target_cpus(void)
} while (cpu >= NR_CPUS);
return cpumask_of_cpu(cpu);
}
#define TARGET_CPUS (target_cpus())
#define INT_DELIVERY_MODE dest_Fixed
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0
#define TARGET_CPUS (target_cpus())
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define INT_DELIVERY_MODE (dest_Fixed)
#define INT_DEST_MODE (0) /* phys delivery to target proc */
#define NO_BALANCE_IRQ (0)
#define WAKE_SECONDARY_VIA_INIT
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
return 0;
return (0);
}
/* we don't use the phys_cpu_present_map to indicate apicid presence */
static inline unsigned long check_apicid_present(int bit)
static inline unsigned long check_apicid_present(int bit)
{
return 1;
return (1);
}
#define apicid_cluster(apicid) (apicid & 0xF0)
static inline unsigned long calculate_ldr(unsigned long old)
static inline unsigned long calculate_ldr(int cpu)
{
unsigned long id;
id = xapic_phys_to_log_apicid(hard_smp_processor_id());
return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id));
unsigned long val, id;
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
id = xapic_phys_to_log_apicid(cpu);
val |= SET_APIC_LOGICAL_ID(id);
return val;
}
/*
@ -67,37 +64,35 @@ static inline unsigned long calculate_ldr(unsigned long old)
static inline void init_apic_ldr(void)
{
unsigned long val;
int cpu = smp_processor_id();
apic_write_around(APIC_DFR, APIC_DFR_VALUE);
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
val = calculate_ldr(val);
val = calculate_ldr(cpu);
apic_write_around(APIC_LDR, val);
}
static inline void clustered_apic_check(void)
{
printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
"Cluster", nr_ioapics);
"Physflat", nr_ioapics);
}
static inline int multi_timer_check(int apic, int irq)
{
return 0;
return (0);
}
static inline int apicid_to_node(int logical_apicid)
{
return 0;
return (0);
}
extern u8 bios_cpu_apicid[];
static inline int cpu_present_to_apicid(int mps_cpu)
{
if (mps_cpu < NR_CPUS)
return (int)bios_cpu_apicid[mps_cpu];
else
return BAD_APICID;
return (int) bios_cpu_apicid[mps_cpu];
return BAD_APICID;
}
static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
@ -109,10 +104,10 @@ extern u8 cpu_2_logical_apicid[];
/* Mapping from cpu number to logical apicid */
static inline int cpu_to_logical_apicid(int cpu)
{
if (cpu >= NR_CPUS)
return BAD_APICID;
return (int)cpu_2_logical_apicid[cpu];
}
if (cpu >= NR_CPUS)
return BAD_APICID;
return cpu_physical_id(cpu);
}
static inline int mpc_apic_id(struct mpc_config_processor *m,
struct mpc_config_translation *translation_record)
@ -128,11 +123,9 @@ static inline int mpc_apic_id(struct mpc_config_processor *m,
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
{
/* For clustered we don't have a good way to do this yet - hack */
return physids_promote(0xFUL);
return physids_promote(0xFFL);
}
#define WAKE_SECONDARY_VIA_INIT
static inline void setup_portio_remap(void)
{
}

View file

@ -1,11 +1,11 @@
#ifndef __ASM_MACH_APICDEF_H
#define __ASM_MACH_APICDEF_H
#define APIC_ID_MASK (0x0F<<24)
#define APIC_ID_MASK (0xFF<<24)
static inline unsigned get_apic_id(unsigned long x)
{
return (((x)>>24)&0x0F);
return (((x)>>24)&0xFF);
}
#define GET_APIC_ID(x) get_apic_id(x)

View file

@ -35,6 +35,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -76,11 +76,6 @@ static inline int pfn_to_nid(unsigned long pfn)
* Following are macros that each numa implmentation must define.
*/
/*
* Given a kernel address, find the home node of the underlying memory.
*/
#define kvaddr_to_nid(kaddr) pfn_to_nid(__pa(kaddr) >> PAGE_SHIFT)
#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
#define node_end_pfn(nid) \
({ \

View file

@ -52,8 +52,10 @@ struct mod_arch_specific
#define MODULE_PROC_FAMILY "CYRIXIII "
#elif defined CONFIG_MVIAC3_2
#define MODULE_PROC_FAMILY "VIAC3-2 "
#elif CONFIG_MGEODEGX1
#elif defined CONFIG_MGEODEGX1
#define MODULE_PROC_FAMILY "GEODEGX1 "
#elif defined CONFIG_MGEODE_LX
#define MODULE_PROC_FAMILY "GEODE "
#else
#error unknown processor family
#endif

View file

@ -75,7 +75,7 @@ struct mpc_config_bus
{
unsigned char mpc_type;
unsigned char mpc_busid;
unsigned char mpc_bustype[6] __attribute((packed));
unsigned char mpc_bustype[6];
};
/* List of Bus Type string values, Intel MP Spec. */

View file

@ -91,6 +91,20 @@
#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
/* The PnP BIOS entries in the GDT */
#define GDT_ENTRY_PNPBIOS_CS32 (GDT_ENTRY_PNPBIOS_BASE + 0)
#define GDT_ENTRY_PNPBIOS_CS16 (GDT_ENTRY_PNPBIOS_BASE + 1)
#define GDT_ENTRY_PNPBIOS_DS (GDT_ENTRY_PNPBIOS_BASE + 2)
#define GDT_ENTRY_PNPBIOS_TS1 (GDT_ENTRY_PNPBIOS_BASE + 3)
#define GDT_ENTRY_PNPBIOS_TS2 (GDT_ENTRY_PNPBIOS_BASE + 4)
/* The PnP BIOS selectors */
#define PNP_CS32 (GDT_ENTRY_PNPBIOS_CS32 * 8) /* segment for calling fn */
#define PNP_CS16 (GDT_ENTRY_PNPBIOS_CS16 * 8) /* code segment for BIOS */
#define PNP_DS (GDT_ENTRY_PNPBIOS_DS * 8) /* data segment for BIOS */
#define PNP_TS1 (GDT_ENTRY_PNPBIOS_TS1 * 8) /* transfer data segment */
#define PNP_TS2 (GDT_ENTRY_PNPBIOS_TS2 * 8) /* another data segment */
/*
* The interrupt descriptor table has room for 256 idt's,
* the global descriptor table is dependent on the number

View file

@ -54,23 +54,7 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \
); } while(0)
#define set_base(ldt,base) _set_base( ((char *)&(ldt)) , (base) )
#define set_limit(ldt,limit) _set_limit( ((char *)&(ldt)) , ((limit)-1)>>12 )
static inline unsigned long _get_base(char * addr)
{
unsigned long __base;
__asm__("movb %3,%%dh\n\t"
"movb %2,%%dl\n\t"
"shll $16,%%edx\n\t"
"movw %1,%%dx"
:"=&d" (__base)
:"m" (*((addr)+2)),
"m" (*((addr)+4)),
"m" (*((addr)+7)));
return __base;
}
#define get_base(ldt) _get_base( ((char *)&(ldt)) )
#define set_limit(ldt,limit) _set_limit( ((char *)&(ldt)) , ((limit)-1) )
/*
* Load a segment. Fall back on loading the zero
@ -140,6 +124,19 @@ static inline unsigned long _get_base(char * addr)
:"=r" (__dummy)); \
__dummy; \
})
#define read_cr4_safe() ({ \
unsigned int __dummy; \
/* This could fault if %cr4 does not exist */ \
__asm__("1: movl %%cr4, %0 \n" \
"2: \n" \
".section __ex_table,\"a\" \n" \
".long 1b,2b \n" \
".previous \n" \
: "=r" (__dummy): "0" (0)); \
__dummy; \
})
#define write_cr4(x) \
__asm__ __volatile__("movl %0,%%cr4": :"r" (x));
#define stts() write_cr0(8 | read_cr0())

View file

@ -256,7 +256,7 @@
#define __NR_io_submit 248
#define __NR_io_cancel 249
#define __NR_fadvise64 250
#define __NR_set_zone_reclaim 251
/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
#define __NR_exit_group 252
#define __NR_lookup_dcookie 253
#define __NR_epoll_create 254

View file

@ -192,4 +192,5 @@ atomic64_add_negative (__s64 i, atomic64_t *v)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* _ASM_IA64_ATOMIC_H */

View file

@ -345,6 +345,7 @@ fls (int t)
x |= x >> 16;
return ia64_popcnt(x);
}
#define fls64(x) generic_fls64(x)
/*
* ffs: find first bit set. This is defined the same way as the libc and compiler builtin

View file

@ -43,6 +43,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -265,7 +265,7 @@
#define __NR_keyctl 1273
#define __NR_ioprio_set 1274
#define __NR_ioprio_get 1275
#define __NR_set_zone_reclaim 1276
/* 1276 is available for reuse (was briefly sys_set_zone_reclaim) */
#define __NR_inotify_init 1277
#define __NR_inotify_add_watch 1278
#define __NR_inotify_rm_watch 1279

View file

@ -52,7 +52,7 @@
or3 \reg, \reg, #low(\x)
.endm
#if !defined(CONFIG_CHIP_M32102)
#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
#define STI(reg) STI_M reg
.macro STI_M reg
setpsw #0x40 -> nop
@ -64,7 +64,7 @@
clrpsw #0x40 -> nop
; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
.endm
#else /* CONFIG_CHIP_M32102 */
#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
#define STI(reg) STI_M reg
.macro STI_M reg
mvfc \reg, psw
@ -191,12 +191,12 @@
and \reg, sp
.endm
#if !defined(CONFIG_CHIP_M32102)
#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
.macro SWITCH_TO_KERNEL_STACK
; switch to kernel stack (spi)
clrpsw #0x80 -> nop
.endm
#else /* CONFIG_CHIP_M32102 */
#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
.macro SWITCH_TO_KERNEL_STACK
push r0 ; save r0 for working
mvfc r0, psw
@ -218,7 +218,7 @@
.fillinsn
2:
.endm
#endif /* CONFIG_CHIP_M32102 */
#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
#endif /* __ASSEMBLY__ */

View file

@ -313,4 +313,5 @@ static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* _ASM_M32R_ATOMIC_H */

View file

@ -465,6 +465,7 @@ static __inline__ unsigned long __ffs(unsigned long word)
* fls: find last bit set.
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#ifdef __KERNEL__

View file

@ -7,7 +7,7 @@
extern void _flush_cache_all(void);
extern void _flush_cache_copyback_all(void);
#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP)
#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
#define flush_cache_all() do { } while (0)
#define flush_cache_mm(mm) do { } while (0)
#define flush_cache_range(vma, start, end) do { } while (0)

View file

@ -65,6 +65,22 @@
#define NR_IRQS \
(OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \
+ OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ)
#elif defined(CONFIG_PLAT_M32104UT)
/*
* IRQ definitions for M32104UT
* M32104 Chip: 64 interrupts
* ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
*/
#define M32104UT_NUM_CPU_IRQ (64)
#define M32104UT_NUM_PLD_IRQ (32)
#define M32104UT_IRQ_BASE 0
#define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE
#define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ)
#define NR_IRQS \
(M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ)
#else
#define NR_IRQS 64
#endif

View file

@ -11,7 +11,11 @@
/*======================================================================*
* Special Function Register
*======================================================================*/
#if !defined(CONFIG_CHIP_M32104)
#define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */
#else
#define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */
#endif
/*
* Clock and Power Management registers.
@ -100,7 +104,7 @@
#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
#ifdef CONFIG_CHIP_M32700
#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32104)
#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */
#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */
#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */
@ -113,7 +117,7 @@
#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */
#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */
#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */
#else /* not CONFIG_CHIP_M32700 */
#else /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */
#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
@ -126,7 +130,7 @@
#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
#endif /* not CONFIG_CHIP_M32700 */
#endif /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */
#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
@ -241,8 +245,24 @@
#define M32R_IRQ_MFT1 (17) /* MFT1 */
#define M32R_IRQ_MFT2 (18) /* MFT2 */
#define M32R_IRQ_MFT3 (19) /* MFT3 */
#define M32R_IRQ_MFT4 (20) /* MFT4 */
#define M32R_IRQ_MFT5 (21) /* MFT5 */
#ifdef CONFIG_CHIP_M32104
#define M32R_IRQ_MFTX0 (24) /* MFTX0 */
#define M32R_IRQ_MFTX1 (25) /* MFTX1 */
#define M32R_IRQ_DMA0 (32) /* DMA0 */
#define M32R_IRQ_DMA1 (33) /* DMA1 */
#define M32R_IRQ_DMA2 (34) /* DMA2 */
#define M32R_IRQ_DMA3 (35) /* DMA3 */
#define M32R_IRQ_SIO0_R (40) /* SIO0 send */
#define M32R_IRQ_SIO0_S (41) /* SIO0 receive */
#define M32R_IRQ_SIO1_R (42) /* SIO1 send */
#define M32R_IRQ_SIO1_S (43) /* SIO1 receive */
#define M32R_IRQ_SIO2_R (44) /* SIO2 send */
#define M32R_IRQ_SIO2_S (45) /* SIO2 receive */
#define M32R_IRQ_SIO3_R (46) /* SIO3 send */
#define M32R_IRQ_SIO3_S (47) /* SIO3 receive */
#define M32R_IRQ_ADC (56) /* ADC */
#define M32R_IRQ_PC (57) /* PC */
#else /* ! M32104 */
#define M32R_IRQ_DMA0 (32) /* DMA0 */
#define M32R_IRQ_DMA1 (33) /* DMA1 */
#define M32R_IRQ_SIO0_R (48) /* SIO0 send */
@ -255,6 +275,7 @@
#define M32R_IRQ_SIO3_S (55) /* SIO3 receive */
#define M32R_IRQ_SIO4_R (56) /* SIO4 send */
#define M32R_IRQ_SIO4_S (57) /* SIO4 receive */
#endif /* ! M32104 */
#ifdef CONFIG_SMP
#define M32R_IRQ_IPI0 (56)
@ -281,15 +302,12 @@
#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
#endif /* CONFIG_SMP */
#ifndef __ASSEMBLY__
/* For NETDEV WATCHDOG */
typedef struct {
unsigned long icucr; /* ICU Control Register */
} icu_data_t;
extern icu_data_t icu_data[];
#endif
#endif /* CONFIG_SMP */
#endif /* _M32102_H_ */

View file

@ -0,0 +1,163 @@
/*
* include/asm/m32104ut/m32104ut_pld.h
*
* Definitions for Programable Logic Device(PLD) on M32104UT board.
* Based on m32700ut_pld.h
*
* Copyright (c) 2002 Takeo Takahashi
* Copyright (c) 2005 Naoto Sugai
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file "COPYING" in the main directory of
* this archive for more details.
*/
#ifndef _M32104UT_M32104UT_PLD_H
#define _M32104UT_M32104UT_PLD_H
#include <linux/config.h>
#if defined(CONFIG_PLAT_M32104UT)
#define PLD_PLAT_BASE 0x02c00000
#else
#error "no platform configuration"
#endif
#ifndef __ASSEMBLY__
/*
* C functions use non-cache address.
*/
#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
#define __reg8 (volatile unsigned char *)
#define __reg16 (volatile unsigned short *)
#define __reg32 (volatile unsigned int *)
#else
#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
#define __reg8
#define __reg16
#define __reg32
#endif /* __ASSEMBLY__ */
/* CFC */
#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
/* MMC */
#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
/* ICU
* ICUISTS: status register
* ICUIREQ0: request register
* ICUIREQ1: request register
* ICUCR3: control register for CFIREQ# interrupt
* ICUCR4: control register for CFC Card insert interrupt
* ICUCR5: control register for CFC Card eject interrupt
* ICUCR6: control register for external interrupt
* ICUCR11: control register for MMC Card insert/eject interrupt
* ICUCR13: control register for SC error interrupt
* ICUCR14: control register for SC receive interrupt
* ICUCR15: control register for SC send interrupt
*/
#define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */
#define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */
#define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */
#define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */
#define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */
#define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
#define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */
#define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */
#define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */
#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
#define PLD_ICUISTS_VECB_MASK (0xf000)
#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
#define PLD_ICUISTS_ISN_MASK (0x07c0)
#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
#define PLD_ICUCR_IEN (0x1000)
#define PLD_ICUCR_IREQ (0x0100)
#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
#define PLD_ICUCR_ILEVEL0 (0x0000)
#define PLD_ICUCR_ILEVEL1 (0x0001)
#define PLD_ICUCR_ILEVEL2 (0x0002)
#define PLD_ICUCR_ILEVEL3 (0x0003)
#define PLD_ICUCR_ILEVEL4 (0x0004)
#define PLD_ICUCR_ILEVEL5 (0x0005)
#define PLD_ICUCR_ILEVEL6 (0x0006)
#define PLD_ICUCR_ILEVEL7 (0x0007)
/* Power Control of MMC and CF */
#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
#define PLD_CPCR_CDP 0x0001
/* LED Control
*
* 1: DIP swich side
* 2: Reset switch side
*/
#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
#define PLD_IOLED_1_ON 0x001
#define PLD_IOLED_1_OFF 0x000
#define PLD_IOLED_2_ON 0x002
#define PLD_IOLED_2_OFF 0x000
/* DIP Switch
* 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
* 1: -
* 2: -
* 3: -
*/
#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
#define PLD_IOSWSTS_IOSW2 0x0200
#define PLD_IOSWSTS_IOSW1 0x0100
#define PLD_IOSWSTS_IOWP0 0x0001
/* CRC */
#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
/* RTC */
#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
/* SIM Card */
#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
#endif /* _M32104UT_M32104UT_PLD_H */

View file

@ -14,7 +14,7 @@
#include <asm/m32r_mp_fpga.h>
#elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
|| defined(CONFIG_CHIP_OPSP)
|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
#include <asm/m32102.h>
#endif
@ -43,6 +43,10 @@
#include <asm/m32700ut/m32700ut_pld.h>
#endif
#if defined(CONFIG_PLAT_M32104UT)
#include <asm/m32104ut/m32104ut_pld.h>
#endif /* CONFIG_PLAT_M32104 */
/*
* M32R Register
*/
@ -122,7 +126,7 @@
#include <asm/page.h>
#ifdef CONFIG_MMU
#define NONCACHE_OFFSET __PAGE_OFFSET+0x20000000
#define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000)
#else
#define NONCACHE_OFFSET __PAGE_OFFSET
#endif /* CONFIG_MMU */

View file

@ -37,6 +37,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -69,12 +69,12 @@
} while(0)
/* Interrupt Control */
#if !defined(CONFIG_CHIP_M32102)
#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
#define local_irq_enable() \
__asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory")
#define local_irq_disable() \
__asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory")
#else /* CONFIG_CHIP_M32102 */
#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
static inline void local_irq_enable(void)
{
unsigned long tmpreg;
@ -96,7 +96,7 @@ static inline void local_irq_disable(void)
"mvtc %0, psw \n\t"
: "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory");
}
#endif /* CONFIG_CHIP_M32102 */
#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
#define local_save_flags(x) \
__asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */)
@ -105,13 +105,13 @@ static inline void local_irq_disable(void)
__asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \
: "r" (x) : "cbit", "memory")
#if !defined(CONFIG_CHIP_M32102)
#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
#define local_irq_save(x) \
__asm__ __volatile__( \
"mvfc %0, psw; \n\t" \
"clrpsw #0x40 -> nop; \n\t" \
: "=r" (x) : /* no input */ : "memory")
#else /* CONFIG_CHIP_M32102 */
#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
#define local_irq_save(x) \
({ \
unsigned long tmpreg; \
@ -124,7 +124,7 @@ static inline void local_irq_disable(void)
: "=r" (x), "=&r" (tmpreg) \
: : "cbit", "memory"); \
})
#endif /* CONFIG_CHIP_M32102 */
#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
#define irqs_disabled() \
({ \

View file

@ -319,7 +319,7 @@ type name(void) \
register long __scno __asm__ ("r7") = __NR_##name; \
register long __res __asm__("r0"); \
__asm__ __volatile__ (\
"trap #" SYSCALL_VECTOR \
"trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno) \
: "memory"); \
@ -332,7 +332,7 @@ type name(type1 arg1) \
register long __scno __asm__ ("r7") = __NR_##name; \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
"trap #" SYSCALL_VECTOR \
"trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res) \
: "memory"); \
@ -346,7 +346,7 @@ register long __scno __asm__ ("r7") = __NR_##name; \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
"trap #" SYSCALL_VECTOR \
"trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2) \
: "memory"); \
@ -361,7 +361,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
"trap #" SYSCALL_VECTOR \
"trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3) \
@ -378,7 +378,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
"trap #" SYSCALL_VECTOR \
"trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3), "r" (__arg4) \
@ -397,7 +397,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
"trap #" SYSCALL_VECTOR \
"trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3), "r" (__arg4), "r" (__arg5) \

View file

@ -157,4 +157,5 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* __ARCH_M68K_ATOMIC __ */

View file

@ -310,6 +310,7 @@ static inline int fls(int x)
return 32 - cnt;
}
#define fls64(x) generic_fls64(x)
/*
* Every architecture must define this function. It's the fastest

View file

@ -70,8 +70,6 @@ static __inline__ int irq_canonicalize(int irq)
extern void (*enable_irq)(unsigned int);
extern void (*disable_irq)(unsigned int);
#define disable_irq_nosync disable_irq
#define enable_irq_nosync enable_irq
struct pt_regs;

View file

@ -35,6 +35,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -143,4 +143,5 @@ static inline int atomic_sub_return(int i, atomic_t * v)
#define atomic_dec_return(v) atomic_sub_return(1,(v))
#define atomic_inc_return(v) atomic_add_return(1,(v))
#include <asm-generic/atomic.h>
#endif /* __ARCH_M68KNOMMU_ATOMIC __ */

View file

@ -499,5 +499,6 @@ found_middle:
* fls: find last bit set.
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#endif /* _M68KNOMMU_BITOPS_H */

View file

@ -84,10 +84,8 @@ extern void (*mach_disable_irq)(unsigned int);
/*
* Some drivers want these entry points
*/
#define enable_irq(x) (mach_enable_irq ? (*mach_enable_irq)(x) : 0)
#define disable_irq(x) (mach_disable_irq ? (*mach_disable_irq)(x) : 0)
#define enable_irq_nosync(x) enable_irq(x)
#define enable_irq(x) 0
#define disable_irq(x) do { } while (0)
#define disable_irq_nosync(x) disable_irq(x)
struct irqaction;

View file

@ -1 +0,0 @@
asm_offsets.h

View file

@ -713,4 +713,5 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
#define smp_mb__before_atomic_inc() smp_mb()
#define smp_mb__after_atomic_inc() smp_mb()
#include <asm-generic/atomic.h>
#endif /* _ASM_ATOMIC_H */

View file

@ -695,7 +695,7 @@ static inline unsigned long fls(unsigned long word)
return flz(~word) + 1;
}
#define fls64(x) generic_fls64(x)
/*
* find_next_zero_bit - find the first zero bit in a memory region

View file

@ -65,6 +65,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -1,979 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
*/
#ifndef _ASM_RISCOS_SYSCALL_H
#define _ASM_RISCOS_SYSCALL_H
/*
* The syscalls 0 - 3999 are reserved for a down to the root syscall
* compatibility with RISC/os and IRIX. We'll see how to deal with the
* various "real" BSD variants like Ultrix, NetBSD ...
*/
/*
* SVR4 syscalls are in the range from 1 to 999
*/
#define __NR_SVR4 0
#define __NR_SVR4_syscall (__NR_SVR4 + 0)
#define __NR_SVR4_exit (__NR_SVR4 + 1)
#define __NR_SVR4_fork (__NR_SVR4 + 2)
#define __NR_SVR4_read (__NR_SVR4 + 3)
#define __NR_SVR4_write (__NR_SVR4 + 4)
#define __NR_SVR4_open (__NR_SVR4 + 5)
#define __NR_SVR4_close (__NR_SVR4 + 6)
#define __NR_SVR4_wait (__NR_SVR4 + 7)
#define __NR_SVR4_creat (__NR_SVR4 + 8)
#define __NR_SVR4_link (__NR_SVR4 + 9)
#define __NR_SVR4_unlink (__NR_SVR4 + 10)
#define __NR_SVR4_exec (__NR_SVR4 + 11)
#define __NR_SVR4_chdir (__NR_SVR4 + 12)
#define __NR_SVR4_gtime (__NR_SVR4 + 13)
#define __NR_SVR4_mknod (__NR_SVR4 + 14)
#define __NR_SVR4_chmod (__NR_SVR4 + 15)
#define __NR_SVR4_chown (__NR_SVR4 + 16)
#define __NR_SVR4_sbreak (__NR_SVR4 + 17)
#define __NR_SVR4_stat (__NR_SVR4 + 18)
#define __NR_SVR4_lseek (__NR_SVR4 + 19)
#define __NR_SVR4_getpid (__NR_SVR4 + 20)
#define __NR_SVR4_mount (__NR_SVR4 + 21)
#define __NR_SVR4_umount (__NR_SVR4 + 22)
#define __NR_SVR4_setuid (__NR_SVR4 + 23)
#define __NR_SVR4_getuid (__NR_SVR4 + 24)
#define __NR_SVR4_stime (__NR_SVR4 + 25)
#define __NR_SVR4_ptrace (__NR_SVR4 + 26)
#define __NR_SVR4_alarm (__NR_SVR4 + 27)
#define __NR_SVR4_fstat (__NR_SVR4 + 28)
#define __NR_SVR4_pause (__NR_SVR4 + 29)
#define __NR_SVR4_utime (__NR_SVR4 + 30)
#define __NR_SVR4_stty (__NR_SVR4 + 31)
#define __NR_SVR4_gtty (__NR_SVR4 + 32)
#define __NR_SVR4_access (__NR_SVR4 + 33)
#define __NR_SVR4_nice (__NR_SVR4 + 34)
#define __NR_SVR4_statfs (__NR_SVR4 + 35)
#define __NR_SVR4_sync (__NR_SVR4 + 36)
#define __NR_SVR4_kill (__NR_SVR4 + 37)
#define __NR_SVR4_fstatfs (__NR_SVR4 + 38)
#define __NR_SVR4_setpgrp (__NR_SVR4 + 39)
#define __NR_SVR4_cxenix (__NR_SVR4 + 40)
#define __NR_SVR4_dup (__NR_SVR4 + 41)
#define __NR_SVR4_pipe (__NR_SVR4 + 42)
#define __NR_SVR4_times (__NR_SVR4 + 43)
#define __NR_SVR4_profil (__NR_SVR4 + 44)
#define __NR_SVR4_plock (__NR_SVR4 + 45)
#define __NR_SVR4_setgid (__NR_SVR4 + 46)
#define __NR_SVR4_getgid (__NR_SVR4 + 47)
#define __NR_SVR4_sig (__NR_SVR4 + 48)
#define __NR_SVR4_msgsys (__NR_SVR4 + 49)
#define __NR_SVR4_sysmips (__NR_SVR4 + 50)
#define __NR_SVR4_sysacct (__NR_SVR4 + 51)
#define __NR_SVR4_shmsys (__NR_SVR4 + 52)
#define __NR_SVR4_semsys (__NR_SVR4 + 53)
#define __NR_SVR4_ioctl (__NR_SVR4 + 54)
#define __NR_SVR4_uadmin (__NR_SVR4 + 55)
#define __NR_SVR4_exch (__NR_SVR4 + 56)
#define __NR_SVR4_utssys (__NR_SVR4 + 57)
#define __NR_SVR4_fsync (__NR_SVR4 + 58)
#define __NR_SVR4_exece (__NR_SVR4 + 59)
#define __NR_SVR4_umask (__NR_SVR4 + 60)
#define __NR_SVR4_chroot (__NR_SVR4 + 61)
#define __NR_SVR4_fcntl (__NR_SVR4 + 62)
#define __NR_SVR4_ulimit (__NR_SVR4 + 63)
#define __NR_SVR4_reserved1 (__NR_SVR4 + 64)
#define __NR_SVR4_reserved2 (__NR_SVR4 + 65)
#define __NR_SVR4_reserved3 (__NR_SVR4 + 66)
#define __NR_SVR4_reserved4 (__NR_SVR4 + 67)
#define __NR_SVR4_reserved5 (__NR_SVR4 + 68)
#define __NR_SVR4_reserved6 (__NR_SVR4 + 69)
#define __NR_SVR4_advfs (__NR_SVR4 + 70)
#define __NR_SVR4_unadvfs (__NR_SVR4 + 71)
#define __NR_SVR4_unused1 (__NR_SVR4 + 72)
#define __NR_SVR4_unused2 (__NR_SVR4 + 73)
#define __NR_SVR4_rfstart (__NR_SVR4 + 74)
#define __NR_SVR4_unused3 (__NR_SVR4 + 75)
#define __NR_SVR4_rdebug (__NR_SVR4 + 76)
#define __NR_SVR4_rfstop (__NR_SVR4 + 77)
#define __NR_SVR4_rfsys (__NR_SVR4 + 78)
#define __NR_SVR4_rmdir (__NR_SVR4 + 79)
#define __NR_SVR4_mkdir (__NR_SVR4 + 80)
#define __NR_SVR4_getdents (__NR_SVR4 + 81)
#define __NR_SVR4_libattach (__NR_SVR4 + 82)
#define __NR_SVR4_libdetach (__NR_SVR4 + 83)
#define __NR_SVR4_sysfs (__NR_SVR4 + 84)
#define __NR_SVR4_getmsg (__NR_SVR4 + 85)
#define __NR_SVR4_putmsg (__NR_SVR4 + 86)
#define __NR_SVR4_poll (__NR_SVR4 + 87)
#define __NR_SVR4_lstat (__NR_SVR4 + 88)
#define __NR_SVR4_symlink (__NR_SVR4 + 89)
#define __NR_SVR4_readlink (__NR_SVR4 + 90)
#define __NR_SVR4_setgroups (__NR_SVR4 + 91)
#define __NR_SVR4_getgroups (__NR_SVR4 + 92)
#define __NR_SVR4_fchmod (__NR_SVR4 + 93)
#define __NR_SVR4_fchown (__NR_SVR4 + 94)
#define __NR_SVR4_sigprocmask (__NR_SVR4 + 95)
#define __NR_SVR4_sigsuspend (__NR_SVR4 + 96)
#define __NR_SVR4_sigaltstack (__NR_SVR4 + 97)
#define __NR_SVR4_sigaction (__NR_SVR4 + 98)
#define __NR_SVR4_sigpending (__NR_SVR4 + 99)
#define __NR_SVR4_setcontext (__NR_SVR4 + 100)
#define __NR_SVR4_evsys (__NR_SVR4 + 101)
#define __NR_SVR4_evtrapret (__NR_SVR4 + 102)
#define __NR_SVR4_statvfs (__NR_SVR4 + 103)
#define __NR_SVR4_fstatvfs (__NR_SVR4 + 104)
#define __NR_SVR4_reserved7 (__NR_SVR4 + 105)
#define __NR_SVR4_nfssys (__NR_SVR4 + 106)
#define __NR_SVR4_waitid (__NR_SVR4 + 107)
#define __NR_SVR4_sigsendset (__NR_SVR4 + 108)
#define __NR_SVR4_hrtsys (__NR_SVR4 + 109)
#define __NR_SVR4_acancel (__NR_SVR4 + 110)
#define __NR_SVR4_async (__NR_SVR4 + 111)
#define __NR_SVR4_priocntlset (__NR_SVR4 + 112)
#define __NR_SVR4_pathconf (__NR_SVR4 + 113)
#define __NR_SVR4_mincore (__NR_SVR4 + 114)
#define __NR_SVR4_mmap (__NR_SVR4 + 115)
#define __NR_SVR4_mprotect (__NR_SVR4 + 116)
#define __NR_SVR4_munmap (__NR_SVR4 + 117)
#define __NR_SVR4_fpathconf (__NR_SVR4 + 118)
#define __NR_SVR4_vfork (__NR_SVR4 + 119)
#define __NR_SVR4_fchdir (__NR_SVR4 + 120)
#define __NR_SVR4_readv (__NR_SVR4 + 121)
#define __NR_SVR4_writev (__NR_SVR4 + 122)
#define __NR_SVR4_xstat (__NR_SVR4 + 123)
#define __NR_SVR4_lxstat (__NR_SVR4 + 124)
#define __NR_SVR4_fxstat (__NR_SVR4 + 125)
#define __NR_SVR4_xmknod (__NR_SVR4 + 126)
#define __NR_SVR4_clocal (__NR_SVR4 + 127)
#define __NR_SVR4_setrlimit (__NR_SVR4 + 128)
#define __NR_SVR4_getrlimit (__NR_SVR4 + 129)
#define __NR_SVR4_lchown (__NR_SVR4 + 130)
#define __NR_SVR4_memcntl (__NR_SVR4 + 131)
#define __NR_SVR4_getpmsg (__NR_SVR4 + 132)
#define __NR_SVR4_putpmsg (__NR_SVR4 + 133)
#define __NR_SVR4_rename (__NR_SVR4 + 134)
#define __NR_SVR4_nuname (__NR_SVR4 + 135)
#define __NR_SVR4_setegid (__NR_SVR4 + 136)
#define __NR_SVR4_sysconf (__NR_SVR4 + 137)
#define __NR_SVR4_adjtime (__NR_SVR4 + 138)
#define __NR_SVR4_sysinfo (__NR_SVR4 + 139)
#define __NR_SVR4_reserved8 (__NR_SVR4 + 140)
#define __NR_SVR4_seteuid (__NR_SVR4 + 141)
#define __NR_SVR4_PYRAMID_statis (__NR_SVR4 + 142)
#define __NR_SVR4_PYRAMID_tuning (__NR_SVR4 + 143)
#define __NR_SVR4_PYRAMID_forcerr (__NR_SVR4 + 144)
#define __NR_SVR4_PYRAMID_mpcntl (__NR_SVR4 + 145)
#define __NR_SVR4_reserved9 (__NR_SVR4 + 146)
#define __NR_SVR4_reserved10 (__NR_SVR4 + 147)
#define __NR_SVR4_reserved11 (__NR_SVR4 + 148)
#define __NR_SVR4_reserved12 (__NR_SVR4 + 149)
#define __NR_SVR4_reserved13 (__NR_SVR4 + 150)
#define __NR_SVR4_reserved14 (__NR_SVR4 + 151)
#define __NR_SVR4_reserved15 (__NR_SVR4 + 152)
#define __NR_SVR4_reserved16 (__NR_SVR4 + 153)
#define __NR_SVR4_reserved17 (__NR_SVR4 + 154)
#define __NR_SVR4_reserved18 (__NR_SVR4 + 155)
#define __NR_SVR4_reserved19 (__NR_SVR4 + 156)
#define __NR_SVR4_reserved20 (__NR_SVR4 + 157)
#define __NR_SVR4_reserved21 (__NR_SVR4 + 158)
#define __NR_SVR4_reserved22 (__NR_SVR4 + 159)
#define __NR_SVR4_reserved23 (__NR_SVR4 + 160)
#define __NR_SVR4_reserved24 (__NR_SVR4 + 161)
#define __NR_SVR4_reserved25 (__NR_SVR4 + 162)
#define __NR_SVR4_reserved26 (__NR_SVR4 + 163)
#define __NR_SVR4_reserved27 (__NR_SVR4 + 164)
#define __NR_SVR4_reserved28 (__NR_SVR4 + 165)
#define __NR_SVR4_reserved29 (__NR_SVR4 + 166)
#define __NR_SVR4_reserved30 (__NR_SVR4 + 167)
#define __NR_SVR4_reserved31 (__NR_SVR4 + 168)
#define __NR_SVR4_reserved32 (__NR_SVR4 + 169)
#define __NR_SVR4_reserved33 (__NR_SVR4 + 170)
#define __NR_SVR4_reserved34 (__NR_SVR4 + 171)
#define __NR_SVR4_reserved35 (__NR_SVR4 + 172)
#define __NR_SVR4_reserved36 (__NR_SVR4 + 173)
#define __NR_SVR4_reserved37 (__NR_SVR4 + 174)
#define __NR_SVR4_reserved38 (__NR_SVR4 + 175)
#define __NR_SVR4_reserved39 (__NR_SVR4 + 176)
#define __NR_SVR4_reserved40 (__NR_SVR4 + 177)
#define __NR_SVR4_reserved41 (__NR_SVR4 + 178)
#define __NR_SVR4_reserved42 (__NR_SVR4 + 179)
#define __NR_SVR4_reserved43 (__NR_SVR4 + 180)
#define __NR_SVR4_reserved44 (__NR_SVR4 + 181)
#define __NR_SVR4_reserved45 (__NR_SVR4 + 182)
#define __NR_SVR4_reserved46 (__NR_SVR4 + 183)
#define __NR_SVR4_reserved47 (__NR_SVR4 + 184)
#define __NR_SVR4_reserved48 (__NR_SVR4 + 185)
#define __NR_SVR4_reserved49 (__NR_SVR4 + 186)
#define __NR_SVR4_reserved50 (__NR_SVR4 + 187)
#define __NR_SVR4_reserved51 (__NR_SVR4 + 188)
#define __NR_SVR4_reserved52 (__NR_SVR4 + 189)
#define __NR_SVR4_reserved53 (__NR_SVR4 + 190)
#define __NR_SVR4_reserved54 (__NR_SVR4 + 191)
#define __NR_SVR4_reserved55 (__NR_SVR4 + 192)
#define __NR_SVR4_reserved56 (__NR_SVR4 + 193)
#define __NR_SVR4_reserved57 (__NR_SVR4 + 194)
#define __NR_SVR4_reserved58 (__NR_SVR4 + 195)
#define __NR_SVR4_reserved59 (__NR_SVR4 + 196)
#define __NR_SVR4_reserved60 (__NR_SVR4 + 197)
#define __NR_SVR4_reserved61 (__NR_SVR4 + 198)
#define __NR_SVR4_reserved62 (__NR_SVR4 + 199)
#define __NR_SVR4_reserved63 (__NR_SVR4 + 200)
#define __NR_SVR4_aread (__NR_SVR4 + 201)
#define __NR_SVR4_awrite (__NR_SVR4 + 202)
#define __NR_SVR4_listio (__NR_SVR4 + 203)
#define __NR_SVR4_mips_acancel (__NR_SVR4 + 204)
#define __NR_SVR4_astatus (__NR_SVR4 + 205)
#define __NR_SVR4_await (__NR_SVR4 + 206)
#define __NR_SVR4_areadv (__NR_SVR4 + 207)
#define __NR_SVR4_awritev (__NR_SVR4 + 208)
#define __NR_SVR4_MIPS_reserved1 (__NR_SVR4 + 209)
#define __NR_SVR4_MIPS_reserved2 (__NR_SVR4 + 210)
#define __NR_SVR4_MIPS_reserved3 (__NR_SVR4 + 211)
#define __NR_SVR4_MIPS_reserved4 (__NR_SVR4 + 212)
#define __NR_SVR4_MIPS_reserved5 (__NR_SVR4 + 213)
#define __NR_SVR4_MIPS_reserved6 (__NR_SVR4 + 214)
#define __NR_SVR4_MIPS_reserved7 (__NR_SVR4 + 215)
#define __NR_SVR4_MIPS_reserved8 (__NR_SVR4 + 216)
#define __NR_SVR4_MIPS_reserved9 (__NR_SVR4 + 217)
#define __NR_SVR4_MIPS_reserved10 (__NR_SVR4 + 218)
#define __NR_SVR4_MIPS_reserved11 (__NR_SVR4 + 219)
#define __NR_SVR4_MIPS_reserved12 (__NR_SVR4 + 220)
#define __NR_SVR4_CDC_reserved1 (__NR_SVR4 + 221)
#define __NR_SVR4_CDC_reserved2 (__NR_SVR4 + 222)
#define __NR_SVR4_CDC_reserved3 (__NR_SVR4 + 223)
#define __NR_SVR4_CDC_reserved4 (__NR_SVR4 + 224)
#define __NR_SVR4_CDC_reserved5 (__NR_SVR4 + 225)
#define __NR_SVR4_CDC_reserved6 (__NR_SVR4 + 226)
#define __NR_SVR4_CDC_reserved7 (__NR_SVR4 + 227)
#define __NR_SVR4_CDC_reserved8 (__NR_SVR4 + 228)
#define __NR_SVR4_CDC_reserved9 (__NR_SVR4 + 229)
#define __NR_SVR4_CDC_reserved10 (__NR_SVR4 + 230)
#define __NR_SVR4_CDC_reserved11 (__NR_SVR4 + 231)
#define __NR_SVR4_CDC_reserved12 (__NR_SVR4 + 232)
#define __NR_SVR4_CDC_reserved13 (__NR_SVR4 + 233)
#define __NR_SVR4_CDC_reserved14 (__NR_SVR4 + 234)
#define __NR_SVR4_CDC_reserved15 (__NR_SVR4 + 235)
#define __NR_SVR4_CDC_reserved16 (__NR_SVR4 + 236)
#define __NR_SVR4_CDC_reserved17 (__NR_SVR4 + 237)
#define __NR_SVR4_CDC_reserved18 (__NR_SVR4 + 238)
#define __NR_SVR4_CDC_reserved19 (__NR_SVR4 + 239)
#define __NR_SVR4_CDC_reserved20 (__NR_SVR4 + 240)
/*
* SYS V syscalls are in the range from 1000 to 1999
*/
#define __NR_SYSV 1000
#define __NR_SYSV_syscall (__NR_SYSV + 0)
#define __NR_SYSV_exit (__NR_SYSV + 1)
#define __NR_SYSV_fork (__NR_SYSV + 2)
#define __NR_SYSV_read (__NR_SYSV + 3)
#define __NR_SYSV_write (__NR_SYSV + 4)
#define __NR_SYSV_open (__NR_SYSV + 5)
#define __NR_SYSV_close (__NR_SYSV + 6)
#define __NR_SYSV_wait (__NR_SYSV + 7)
#define __NR_SYSV_creat (__NR_SYSV + 8)
#define __NR_SYSV_link (__NR_SYSV + 9)
#define __NR_SYSV_unlink (__NR_SYSV + 10)
#define __NR_SYSV_execv (__NR_SYSV + 11)
#define __NR_SYSV_chdir (__NR_SYSV + 12)
#define __NR_SYSV_time (__NR_SYSV + 13)
#define __NR_SYSV_mknod (__NR_SYSV + 14)
#define __NR_SYSV_chmod (__NR_SYSV + 15)
#define __NR_SYSV_chown (__NR_SYSV + 16)
#define __NR_SYSV_brk (__NR_SYSV + 17)
#define __NR_SYSV_stat (__NR_SYSV + 18)
#define __NR_SYSV_lseek (__NR_SYSV + 19)
#define __NR_SYSV_getpid (__NR_SYSV + 20)
#define __NR_SYSV_mount (__NR_SYSV + 21)
#define __NR_SYSV_umount (__NR_SYSV + 22)
#define __NR_SYSV_setuid (__NR_SYSV + 23)
#define __NR_SYSV_getuid (__NR_SYSV + 24)
#define __NR_SYSV_stime (__NR_SYSV + 25)
#define __NR_SYSV_ptrace (__NR_SYSV + 26)
#define __NR_SYSV_alarm (__NR_SYSV + 27)
#define __NR_SYSV_fstat (__NR_SYSV + 28)
#define __NR_SYSV_pause (__NR_SYSV + 29)
#define __NR_SYSV_utime (__NR_SYSV + 30)
#define __NR_SYSV_stty (__NR_SYSV + 31)
#define __NR_SYSV_gtty (__NR_SYSV + 32)
#define __NR_SYSV_access (__NR_SYSV + 33)
#define __NR_SYSV_nice (__NR_SYSV + 34)
#define __NR_SYSV_statfs (__NR_SYSV + 35)
#define __NR_SYSV_sync (__NR_SYSV + 36)
#define __NR_SYSV_kill (__NR_SYSV + 37)
#define __NR_SYSV_fstatfs (__NR_SYSV + 38)
#define __NR_SYSV_setpgrp (__NR_SYSV + 39)
#define __NR_SYSV_syssgi (__NR_SYSV + 40)
#define __NR_SYSV_dup (__NR_SYSV + 41)
#define __NR_SYSV_pipe (__NR_SYSV + 42)
#define __NR_SYSV_times (__NR_SYSV + 43)
#define __NR_SYSV_profil (__NR_SYSV + 44)
#define __NR_SYSV_plock (__NR_SYSV + 45)
#define __NR_SYSV_setgid (__NR_SYSV + 46)
#define __NR_SYSV_getgid (__NR_SYSV + 47)
#define __NR_SYSV_sig (__NR_SYSV + 48)
#define __NR_SYSV_msgsys (__NR_SYSV + 49)
#define __NR_SYSV_sysmips (__NR_SYSV + 50)
#define __NR_SYSV_acct (__NR_SYSV + 51)
#define __NR_SYSV_shmsys (__NR_SYSV + 52)
#define __NR_SYSV_semsys (__NR_SYSV + 53)
#define __NR_SYSV_ioctl (__NR_SYSV + 54)
#define __NR_SYSV_uadmin (__NR_SYSV + 55)
#define __NR_SYSV_sysmp (__NR_SYSV + 56)
#define __NR_SYSV_utssys (__NR_SYSV + 57)
#define __NR_SYSV_USG_reserved1 (__NR_SYSV + 58)
#define __NR_SYSV_execve (__NR_SYSV + 59)
#define __NR_SYSV_umask (__NR_SYSV + 60)
#define __NR_SYSV_chroot (__NR_SYSV + 61)
#define __NR_SYSV_fcntl (__NR_SYSV + 62)
#define __NR_SYSV_ulimit (__NR_SYSV + 63)
#define __NR_SYSV_SAFARI4_reserved1 (__NR_SYSV + 64)
#define __NR_SYSV_SAFARI4_reserved2 (__NR_SYSV + 65)
#define __NR_SYSV_SAFARI4_reserved3 (__NR_SYSV + 66)
#define __NR_SYSV_SAFARI4_reserved4 (__NR_SYSV + 67)
#define __NR_SYSV_SAFARI4_reserved5 (__NR_SYSV + 68)
#define __NR_SYSV_SAFARI4_reserved6 (__NR_SYSV + 69)
#define __NR_SYSV_advfs (__NR_SYSV + 70)
#define __NR_SYSV_unadvfs (__NR_SYSV + 71)
#define __NR_SYSV_rmount (__NR_SYSV + 72)
#define __NR_SYSV_rumount (__NR_SYSV + 73)
#define __NR_SYSV_rfstart (__NR_SYSV + 74)
#define __NR_SYSV_getrlimit64 (__NR_SYSV + 75)
#define __NR_SYSV_setrlimit64 (__NR_SYSV + 76)
#define __NR_SYSV_nanosleep (__NR_SYSV + 77)
#define __NR_SYSV_lseek64 (__NR_SYSV + 78)
#define __NR_SYSV_rmdir (__NR_SYSV + 79)
#define __NR_SYSV_mkdir (__NR_SYSV + 80)
#define __NR_SYSV_getdents (__NR_SYSV + 81)
#define __NR_SYSV_sginap (__NR_SYSV + 82)
#define __NR_SYSV_sgikopt (__NR_SYSV + 83)
#define __NR_SYSV_sysfs (__NR_SYSV + 84)
#define __NR_SYSV_getmsg (__NR_SYSV + 85)
#define __NR_SYSV_putmsg (__NR_SYSV + 86)
#define __NR_SYSV_poll (__NR_SYSV + 87)
#define __NR_SYSV_sigreturn (__NR_SYSV + 88)
#define __NR_SYSV_accept (__NR_SYSV + 89)
#define __NR_SYSV_bind (__NR_SYSV + 90)
#define __NR_SYSV_connect (__NR_SYSV + 91)
#define __NR_SYSV_gethostid (__NR_SYSV + 92)
#define __NR_SYSV_getpeername (__NR_SYSV + 93)
#define __NR_SYSV_getsockname (__NR_SYSV + 94)
#define __NR_SYSV_getsockopt (__NR_SYSV + 95)
#define __NR_SYSV_listen (__NR_SYSV + 96)
#define __NR_SYSV_recv (__NR_SYSV + 97)
#define __NR_SYSV_recvfrom (__NR_SYSV + 98)
#define __NR_SYSV_recvmsg (__NR_SYSV + 99)
#define __NR_SYSV_select (__NR_SYSV + 100)
#define __NR_SYSV_send (__NR_SYSV + 101)
#define __NR_SYSV_sendmsg (__NR_SYSV + 102)
#define __NR_SYSV_sendto (__NR_SYSV + 103)
#define __NR_SYSV_sethostid (__NR_SYSV + 104)
#define __NR_SYSV_setsockopt (__NR_SYSV + 105)
#define __NR_SYSV_shutdown (__NR_SYSV + 106)
#define __NR_SYSV_socket (__NR_SYSV + 107)
#define __NR_SYSV_gethostname (__NR_SYSV + 108)
#define __NR_SYSV_sethostname (__NR_SYSV + 109)
#define __NR_SYSV_getdomainname (__NR_SYSV + 110)
#define __NR_SYSV_setdomainname (__NR_SYSV + 111)
#define __NR_SYSV_truncate (__NR_SYSV + 112)
#define __NR_SYSV_ftruncate (__NR_SYSV + 113)
#define __NR_SYSV_rename (__NR_SYSV + 114)
#define __NR_SYSV_symlink (__NR_SYSV + 115)
#define __NR_SYSV_readlink (__NR_SYSV + 116)
#define __NR_SYSV_lstat (__NR_SYSV + 117)
#define __NR_SYSV_nfsmount (__NR_SYSV + 118)
#define __NR_SYSV_nfssvc (__NR_SYSV + 119)
#define __NR_SYSV_getfh (__NR_SYSV + 120)
#define __NR_SYSV_async_daemon (__NR_SYSV + 121)
#define __NR_SYSV_exportfs (__NR_SYSV + 122)
#define __NR_SYSV_setregid (__NR_SYSV + 123)
#define __NR_SYSV_setreuid (__NR_SYSV + 124)
#define __NR_SYSV_getitimer (__NR_SYSV + 125)
#define __NR_SYSV_setitimer (__NR_SYSV + 126)
#define __NR_SYSV_adjtime (__NR_SYSV + 127)
#define __NR_SYSV_BSD_getime (__NR_SYSV + 128)
#define __NR_SYSV_sproc (__NR_SYSV + 129)
#define __NR_SYSV_prctl (__NR_SYSV + 130)
#define __NR_SYSV_procblk (__NR_SYSV + 131)
#define __NR_SYSV_sprocsp (__NR_SYSV + 132)
#define __NR_SYSV_sgigsc (__NR_SYSV + 133)
#define __NR_SYSV_mmap (__NR_SYSV + 134)
#define __NR_SYSV_munmap (__NR_SYSV + 135)
#define __NR_SYSV_mprotect (__NR_SYSV + 136)
#define __NR_SYSV_msync (__NR_SYSV + 137)
#define __NR_SYSV_madvise (__NR_SYSV + 138)
#define __NR_SYSV_pagelock (__NR_SYSV + 139)
#define __NR_SYSV_getpagesize (__NR_SYSV + 140)
#define __NR_SYSV_quotactl (__NR_SYSV + 141)
#define __NR_SYSV_libdetach (__NR_SYSV + 142)
#define __NR_SYSV_BSDgetpgrp (__NR_SYSV + 143)
#define __NR_SYSV_BSDsetpgrp (__NR_SYSV + 144)
#define __NR_SYSV_vhangup (__NR_SYSV + 145)
#define __NR_SYSV_fsync (__NR_SYSV + 146)
#define __NR_SYSV_fchdir (__NR_SYSV + 147)
#define __NR_SYSV_getrlimit (__NR_SYSV + 148)
#define __NR_SYSV_setrlimit (__NR_SYSV + 149)
#define __NR_SYSV_cacheflush (__NR_SYSV + 150)
#define __NR_SYSV_cachectl (__NR_SYSV + 151)
#define __NR_SYSV_fchown (__NR_SYSV + 152)
#define __NR_SYSV_fchmod (__NR_SYSV + 153)
#define __NR_SYSV_wait3 (__NR_SYSV + 154)
#define __NR_SYSV_socketpair (__NR_SYSV + 155)
#define __NR_SYSV_sysinfo (__NR_SYSV + 156)
#define __NR_SYSV_nuname (__NR_SYSV + 157)
#define __NR_SYSV_xstat (__NR_SYSV + 158)
#define __NR_SYSV_lxstat (__NR_SYSV + 159)
#define __NR_SYSV_fxstat (__NR_SYSV + 160)
#define __NR_SYSV_xmknod (__NR_SYSV + 161)
#define __NR_SYSV_ksigaction (__NR_SYSV + 162)
#define __NR_SYSV_sigpending (__NR_SYSV + 163)
#define __NR_SYSV_sigprocmask (__NR_SYSV + 164)
#define __NR_SYSV_sigsuspend (__NR_SYSV + 165)
#define __NR_SYSV_sigpoll (__NR_SYSV + 166)
#define __NR_SYSV_swapctl (__NR_SYSV + 167)
#define __NR_SYSV_getcontext (__NR_SYSV + 168)
#define __NR_SYSV_setcontext (__NR_SYSV + 169)
#define __NR_SYSV_waitsys (__NR_SYSV + 170)
#define __NR_SYSV_sigstack (__NR_SYSV + 171)
#define __NR_SYSV_sigaltstack (__NR_SYSV + 172)
#define __NR_SYSV_sigsendset (__NR_SYSV + 173)
#define __NR_SYSV_statvfs (__NR_SYSV + 174)
#define __NR_SYSV_fstatvfs (__NR_SYSV + 175)
#define __NR_SYSV_getpmsg (__NR_SYSV + 176)
#define __NR_SYSV_putpmsg (__NR_SYSV + 177)
#define __NR_SYSV_lchown (__NR_SYSV + 178)
#define __NR_SYSV_priocntl (__NR_SYSV + 179)
#define __NR_SYSV_ksigqueue (__NR_SYSV + 180)
#define __NR_SYSV_readv (__NR_SYSV + 181)
#define __NR_SYSV_writev (__NR_SYSV + 182)
#define __NR_SYSV_truncate64 (__NR_SYSV + 183)
#define __NR_SYSV_ftruncate64 (__NR_SYSV + 184)
#define __NR_SYSV_mmap64 (__NR_SYSV + 185)
#define __NR_SYSV_dmi (__NR_SYSV + 186)
#define __NR_SYSV_pread (__NR_SYSV + 187)
#define __NR_SYSV_pwrite (__NR_SYSV + 188)
/*
* BSD 4.3 syscalls are in the range from 2000 to 2999
*/
#define __NR_BSD43 2000
#define __NR_BSD43_syscall (__NR_BSD43 + 0)
#define __NR_BSD43_exit (__NR_BSD43 + 1)
#define __NR_BSD43_fork (__NR_BSD43 + 2)
#define __NR_BSD43_read (__NR_BSD43 + 3)
#define __NR_BSD43_write (__NR_BSD43 + 4)
#define __NR_BSD43_open (__NR_BSD43 + 5)
#define __NR_BSD43_close (__NR_BSD43 + 6)
#define __NR_BSD43_wait (__NR_BSD43 + 7)
#define __NR_BSD43_creat (__NR_BSD43 + 8)
#define __NR_BSD43_link (__NR_BSD43 + 9)
#define __NR_BSD43_unlink (__NR_BSD43 + 10)
#define __NR_BSD43_exec (__NR_BSD43 + 11)
#define __NR_BSD43_chdir (__NR_BSD43 + 12)
#define __NR_BSD43_time (__NR_BSD43 + 13)
#define __NR_BSD43_mknod (__NR_BSD43 + 14)
#define __NR_BSD43_chmod (__NR_BSD43 + 15)
#define __NR_BSD43_chown (__NR_BSD43 + 16)
#define __NR_BSD43_sbreak (__NR_BSD43 + 17)
#define __NR_BSD43_oldstat (__NR_BSD43 + 18)
#define __NR_BSD43_lseek (__NR_BSD43 + 19)
#define __NR_BSD43_getpid (__NR_BSD43 + 20)
#define __NR_BSD43_oldmount (__NR_BSD43 + 21)
#define __NR_BSD43_umount (__NR_BSD43 + 22)
#define __NR_BSD43_setuid (__NR_BSD43 + 23)
#define __NR_BSD43_getuid (__NR_BSD43 + 24)
#define __NR_BSD43_stime (__NR_BSD43 + 25)
#define __NR_BSD43_ptrace (__NR_BSD43 + 26)
#define __NR_BSD43_alarm (__NR_BSD43 + 27)
#define __NR_BSD43_oldfstat (__NR_BSD43 + 28)
#define __NR_BSD43_pause (__NR_BSD43 + 29)
#define __NR_BSD43_utime (__NR_BSD43 + 30)
#define __NR_BSD43_stty (__NR_BSD43 + 31)
#define __NR_BSD43_gtty (__NR_BSD43 + 32)
#define __NR_BSD43_access (__NR_BSD43 + 33)
#define __NR_BSD43_nice (__NR_BSD43 + 34)
#define __NR_BSD43_ftime (__NR_BSD43 + 35)
#define __NR_BSD43_sync (__NR_BSD43 + 36)
#define __NR_BSD43_kill (__NR_BSD43 + 37)
#define __NR_BSD43_stat (__NR_BSD43 + 38)
#define __NR_BSD43_oldsetpgrp (__NR_BSD43 + 39)
#define __NR_BSD43_lstat (__NR_BSD43 + 40)
#define __NR_BSD43_dup (__NR_BSD43 + 41)
#define __NR_BSD43_pipe (__NR_BSD43 + 42)
#define __NR_BSD43_times (__NR_BSD43 + 43)
#define __NR_BSD43_profil (__NR_BSD43 + 44)
#define __NR_BSD43_msgsys (__NR_BSD43 + 45)
#define __NR_BSD43_setgid (__NR_BSD43 + 46)
#define __NR_BSD43_getgid (__NR_BSD43 + 47)
#define __NR_BSD43_ssig (__NR_BSD43 + 48)
#define __NR_BSD43_reserved1 (__NR_BSD43 + 49)
#define __NR_BSD43_reserved2 (__NR_BSD43 + 50)
#define __NR_BSD43_sysacct (__NR_BSD43 + 51)
#define __NR_BSD43_phys (__NR_BSD43 + 52)
#define __NR_BSD43_lock (__NR_BSD43 + 53)
#define __NR_BSD43_ioctl (__NR_BSD43 + 54)
#define __NR_BSD43_reboot (__NR_BSD43 + 55)
#define __NR_BSD43_mpxchan (__NR_BSD43 + 56)
#define __NR_BSD43_symlink (__NR_BSD43 + 57)
#define __NR_BSD43_readlink (__NR_BSD43 + 58)
#define __NR_BSD43_execve (__NR_BSD43 + 59)
#define __NR_BSD43_umask (__NR_BSD43 + 60)
#define __NR_BSD43_chroot (__NR_BSD43 + 61)
#define __NR_BSD43_fstat (__NR_BSD43 + 62)
#define __NR_BSD43_reserved3 (__NR_BSD43 + 63)
#define __NR_BSD43_getpagesize (__NR_BSD43 + 64)
#define __NR_BSD43_mremap (__NR_BSD43 + 65)
#define __NR_BSD43_vfork (__NR_BSD43 + 66)
#define __NR_BSD43_vread (__NR_BSD43 + 67)
#define __NR_BSD43_vwrite (__NR_BSD43 + 68)
#define __NR_BSD43_sbrk (__NR_BSD43 + 69)
#define __NR_BSD43_sstk (__NR_BSD43 + 70)
#define __NR_BSD43_mmap (__NR_BSD43 + 71)
#define __NR_BSD43_vadvise (__NR_BSD43 + 72)
#define __NR_BSD43_munmap (__NR_BSD43 + 73)
#define __NR_BSD43_mprotect (__NR_BSD43 + 74)
#define __NR_BSD43_madvise (__NR_BSD43 + 75)
#define __NR_BSD43_vhangup (__NR_BSD43 + 76)
#define __NR_BSD43_vlimit (__NR_BSD43 + 77)
#define __NR_BSD43_mincore (__NR_BSD43 + 78)
#define __NR_BSD43_getgroups (__NR_BSD43 + 79)
#define __NR_BSD43_setgroups (__NR_BSD43 + 80)
#define __NR_BSD43_getpgrp (__NR_BSD43 + 81)
#define __NR_BSD43_setpgrp (__NR_BSD43 + 82)
#define __NR_BSD43_setitimer (__NR_BSD43 + 83)
#define __NR_BSD43_wait3 (__NR_BSD43 + 84)
#define __NR_BSD43_swapon (__NR_BSD43 + 85)
#define __NR_BSD43_getitimer (__NR_BSD43 + 86)
#define __NR_BSD43_gethostname (__NR_BSD43 + 87)
#define __NR_BSD43_sethostname (__NR_BSD43 + 88)
#define __NR_BSD43_getdtablesize (__NR_BSD43 + 89)
#define __NR_BSD43_dup2 (__NR_BSD43 + 90)
#define __NR_BSD43_getdopt (__NR_BSD43 + 91)
#define __NR_BSD43_fcntl (__NR_BSD43 + 92)
#define __NR_BSD43_select (__NR_BSD43 + 93)
#define __NR_BSD43_setdopt (__NR_BSD43 + 94)
#define __NR_BSD43_fsync (__NR_BSD43 + 95)
#define __NR_BSD43_setpriority (__NR_BSD43 + 96)
#define __NR_BSD43_socket (__NR_BSD43 + 97)
#define __NR_BSD43_connect (__NR_BSD43 + 98)
#define __NR_BSD43_oldaccept (__NR_BSD43 + 99)
#define __NR_BSD43_getpriority (__NR_BSD43 + 100)
#define __NR_BSD43_send (__NR_BSD43 + 101)
#define __NR_BSD43_recv (__NR_BSD43 + 102)
#define __NR_BSD43_sigreturn (__NR_BSD43 + 103)
#define __NR_BSD43_bind (__NR_BSD43 + 104)
#define __NR_BSD43_setsockopt (__NR_BSD43 + 105)
#define __NR_BSD43_listen (__NR_BSD43 + 106)
#define __NR_BSD43_vtimes (__NR_BSD43 + 107)
#define __NR_BSD43_sigvec (__NR_BSD43 + 108)
#define __NR_BSD43_sigblock (__NR_BSD43 + 109)
#define __NR_BSD43_sigsetmask (__NR_BSD43 + 110)
#define __NR_BSD43_sigpause (__NR_BSD43 + 111)
#define __NR_BSD43_sigstack (__NR_BSD43 + 112)
#define __NR_BSD43_oldrecvmsg (__NR_BSD43 + 113)
#define __NR_BSD43_oldsendmsg (__NR_BSD43 + 114)
#define __NR_BSD43_vtrace (__NR_BSD43 + 115)
#define __NR_BSD43_gettimeofday (__NR_BSD43 + 116)
#define __NR_BSD43_getrusage (__NR_BSD43 + 117)
#define __NR_BSD43_getsockopt (__NR_BSD43 + 118)
#define __NR_BSD43_reserved4 (__NR_BSD43 + 119)
#define __NR_BSD43_readv (__NR_BSD43 + 120)
#define __NR_BSD43_writev (__NR_BSD43 + 121)
#define __NR_BSD43_settimeofday (__NR_BSD43 + 122)
#define __NR_BSD43_fchown (__NR_BSD43 + 123)
#define __NR_BSD43_fchmod (__NR_BSD43 + 124)
#define __NR_BSD43_oldrecvfrom (__NR_BSD43 + 125)
#define __NR_BSD43_setreuid (__NR_BSD43 + 126)
#define __NR_BSD43_setregid (__NR_BSD43 + 127)
#define __NR_BSD43_rename (__NR_BSD43 + 128)
#define __NR_BSD43_truncate (__NR_BSD43 + 129)
#define __NR_BSD43_ftruncate (__NR_BSD43 + 130)
#define __NR_BSD43_flock (__NR_BSD43 + 131)
#define __NR_BSD43_semsys (__NR_BSD43 + 132)
#define __NR_BSD43_sendto (__NR_BSD43 + 133)
#define __NR_BSD43_shutdown (__NR_BSD43 + 134)
#define __NR_BSD43_socketpair (__NR_BSD43 + 135)
#define __NR_BSD43_mkdir (__NR_BSD43 + 136)
#define __NR_BSD43_rmdir (__NR_BSD43 + 137)
#define __NR_BSD43_utimes (__NR_BSD43 + 138)
#define __NR_BSD43_sigcleanup (__NR_BSD43 + 139)
#define __NR_BSD43_adjtime (__NR_BSD43 + 140)
#define __NR_BSD43_oldgetpeername (__NR_BSD43 + 141)
#define __NR_BSD43_gethostid (__NR_BSD43 + 142)
#define __NR_BSD43_sethostid (__NR_BSD43 + 143)
#define __NR_BSD43_getrlimit (__NR_BSD43 + 144)
#define __NR_BSD43_setrlimit (__NR_BSD43 + 145)
#define __NR_BSD43_killpg (__NR_BSD43 + 146)
#define __NR_BSD43_shmsys (__NR_BSD43 + 147)
#define __NR_BSD43_quota (__NR_BSD43 + 148)
#define __NR_BSD43_qquota (__NR_BSD43 + 149)
#define __NR_BSD43_oldgetsockname (__NR_BSD43 + 150)
#define __NR_BSD43_sysmips (__NR_BSD43 + 151)
#define __NR_BSD43_cacheflush (__NR_BSD43 + 152)
#define __NR_BSD43_cachectl (__NR_BSD43 + 153)
#define __NR_BSD43_debug (__NR_BSD43 + 154)
#define __NR_BSD43_reserved5 (__NR_BSD43 + 155)
#define __NR_BSD43_reserved6 (__NR_BSD43 + 156)
#define __NR_BSD43_nfs_mount (__NR_BSD43 + 157)
#define __NR_BSD43_nfs_svc (__NR_BSD43 + 158)
#define __NR_BSD43_getdirentries (__NR_BSD43 + 159)
#define __NR_BSD43_statfs (__NR_BSD43 + 160)
#define __NR_BSD43_fstatfs (__NR_BSD43 + 161)
#define __NR_BSD43_unmount (__NR_BSD43 + 162)
#define __NR_BSD43_async_daemon (__NR_BSD43 + 163)
#define __NR_BSD43_nfs_getfh (__NR_BSD43 + 164)
#define __NR_BSD43_getdomainname (__NR_BSD43 + 165)
#define __NR_BSD43_setdomainname (__NR_BSD43 + 166)
#define __NR_BSD43_pcfs_mount (__NR_BSD43 + 167)
#define __NR_BSD43_quotactl (__NR_BSD43 + 168)
#define __NR_BSD43_oldexportfs (__NR_BSD43 + 169)
#define __NR_BSD43_smount (__NR_BSD43 + 170)
#define __NR_BSD43_mipshwconf (__NR_BSD43 + 171)
#define __NR_BSD43_exportfs (__NR_BSD43 + 172)
#define __NR_BSD43_nfsfh_open (__NR_BSD43 + 173)
#define __NR_BSD43_libattach (__NR_BSD43 + 174)
#define __NR_BSD43_libdetach (__NR_BSD43 + 175)
#define __NR_BSD43_accept (__NR_BSD43 + 176)
#define __NR_BSD43_reserved7 (__NR_BSD43 + 177)
#define __NR_BSD43_reserved8 (__NR_BSD43 + 178)
#define __NR_BSD43_recvmsg (__NR_BSD43 + 179)
#define __NR_BSD43_recvfrom (__NR_BSD43 + 180)
#define __NR_BSD43_sendmsg (__NR_BSD43 + 181)
#define __NR_BSD43_getpeername (__NR_BSD43 + 182)
#define __NR_BSD43_getsockname (__NR_BSD43 + 183)
#define __NR_BSD43_aread (__NR_BSD43 + 184)
#define __NR_BSD43_awrite (__NR_BSD43 + 185)
#define __NR_BSD43_listio (__NR_BSD43 + 186)
#define __NR_BSD43_acancel (__NR_BSD43 + 187)
#define __NR_BSD43_astatus (__NR_BSD43 + 188)
#define __NR_BSD43_await (__NR_BSD43 + 189)
#define __NR_BSD43_areadv (__NR_BSD43 + 190)
#define __NR_BSD43_awritev (__NR_BSD43 + 191)
/*
* POSIX syscalls are in the range from 3000 to 3999
*/
#define __NR_POSIX 3000
#define __NR_POSIX_syscall (__NR_POSIX + 0)
#define __NR_POSIX_exit (__NR_POSIX + 1)
#define __NR_POSIX_fork (__NR_POSIX + 2)
#define __NR_POSIX_read (__NR_POSIX + 3)
#define __NR_POSIX_write (__NR_POSIX + 4)
#define __NR_POSIX_open (__NR_POSIX + 5)
#define __NR_POSIX_close (__NR_POSIX + 6)
#define __NR_POSIX_wait (__NR_POSIX + 7)
#define __NR_POSIX_creat (__NR_POSIX + 8)
#define __NR_POSIX_link (__NR_POSIX + 9)
#define __NR_POSIX_unlink (__NR_POSIX + 10)
#define __NR_POSIX_exec (__NR_POSIX + 11)
#define __NR_POSIX_chdir (__NR_POSIX + 12)
#define __NR_POSIX_gtime (__NR_POSIX + 13)
#define __NR_POSIX_mknod (__NR_POSIX + 14)
#define __NR_POSIX_chmod (__NR_POSIX + 15)
#define __NR_POSIX_chown (__NR_POSIX + 16)
#define __NR_POSIX_sbreak (__NR_POSIX + 17)
#define __NR_POSIX_stat (__NR_POSIX + 18)
#define __NR_POSIX_lseek (__NR_POSIX + 19)
#define __NR_POSIX_getpid (__NR_POSIX + 20)
#define __NR_POSIX_mount (__NR_POSIX + 21)
#define __NR_POSIX_umount (__NR_POSIX + 22)
#define __NR_POSIX_setuid (__NR_POSIX + 23)
#define __NR_POSIX_getuid (__NR_POSIX + 24)
#define __NR_POSIX_stime (__NR_POSIX + 25)
#define __NR_POSIX_ptrace (__NR_POSIX + 26)
#define __NR_POSIX_alarm (__NR_POSIX + 27)
#define __NR_POSIX_fstat (__NR_POSIX + 28)
#define __NR_POSIX_pause (__NR_POSIX + 29)
#define __NR_POSIX_utime (__NR_POSIX + 30)
#define __NR_POSIX_stty (__NR_POSIX + 31)
#define __NR_POSIX_gtty (__NR_POSIX + 32)
#define __NR_POSIX_access (__NR_POSIX + 33)
#define __NR_POSIX_nice (__NR_POSIX + 34)
#define __NR_POSIX_statfs (__NR_POSIX + 35)
#define __NR_POSIX_sync (__NR_POSIX + 36)
#define __NR_POSIX_kill (__NR_POSIX + 37)
#define __NR_POSIX_fstatfs (__NR_POSIX + 38)
#define __NR_POSIX_getpgrp (__NR_POSIX + 39)
#define __NR_POSIX_syssgi (__NR_POSIX + 40)
#define __NR_POSIX_dup (__NR_POSIX + 41)
#define __NR_POSIX_pipe (__NR_POSIX + 42)
#define __NR_POSIX_times (__NR_POSIX + 43)
#define __NR_POSIX_profil (__NR_POSIX + 44)
#define __NR_POSIX_lock (__NR_POSIX + 45)
#define __NR_POSIX_setgid (__NR_POSIX + 46)
#define __NR_POSIX_getgid (__NR_POSIX + 47)
#define __NR_POSIX_sig (__NR_POSIX + 48)
#define __NR_POSIX_msgsys (__NR_POSIX + 49)
#define __NR_POSIX_sysmips (__NR_POSIX + 50)
#define __NR_POSIX_sysacct (__NR_POSIX + 51)
#define __NR_POSIX_shmsys (__NR_POSIX + 52)
#define __NR_POSIX_semsys (__NR_POSIX + 53)
#define __NR_POSIX_ioctl (__NR_POSIX + 54)
#define __NR_POSIX_uadmin (__NR_POSIX + 55)
#define __NR_POSIX_exch (__NR_POSIX + 56)
#define __NR_POSIX_utssys (__NR_POSIX + 57)
#define __NR_POSIX_USG_reserved1 (__NR_POSIX + 58)
#define __NR_POSIX_exece (__NR_POSIX + 59)
#define __NR_POSIX_umask (__NR_POSIX + 60)
#define __NR_POSIX_chroot (__NR_POSIX + 61)
#define __NR_POSIX_fcntl (__NR_POSIX + 62)
#define __NR_POSIX_ulimit (__NR_POSIX + 63)
#define __NR_POSIX_SAFARI4_reserved1 (__NR_POSIX + 64)
#define __NR_POSIX_SAFARI4_reserved2 (__NR_POSIX + 65)
#define __NR_POSIX_SAFARI4_reserved3 (__NR_POSIX + 66)
#define __NR_POSIX_SAFARI4_reserved4 (__NR_POSIX + 67)
#define __NR_POSIX_SAFARI4_reserved5 (__NR_POSIX + 68)
#define __NR_POSIX_SAFARI4_reserved6 (__NR_POSIX + 69)
#define __NR_POSIX_advfs (__NR_POSIX + 70)
#define __NR_POSIX_unadvfs (__NR_POSIX + 71)
#define __NR_POSIX_rmount (__NR_POSIX + 72)
#define __NR_POSIX_rumount (__NR_POSIX + 73)
#define __NR_POSIX_rfstart (__NR_POSIX + 74)
#define __NR_POSIX_reserved1 (__NR_POSIX + 75)
#define __NR_POSIX_rdebug (__NR_POSIX + 76)
#define __NR_POSIX_rfstop (__NR_POSIX + 77)
#define __NR_POSIX_rfsys (__NR_POSIX + 78)
#define __NR_POSIX_rmdir (__NR_POSIX + 79)
#define __NR_POSIX_mkdir (__NR_POSIX + 80)
#define __NR_POSIX_getdents (__NR_POSIX + 81)
#define __NR_POSIX_sginap (__NR_POSIX + 82)
#define __NR_POSIX_sgikopt (__NR_POSIX + 83)
#define __NR_POSIX_sysfs (__NR_POSIX + 84)
#define __NR_POSIX_getmsg (__NR_POSIX + 85)
#define __NR_POSIX_putmsg (__NR_POSIX + 86)
#define __NR_POSIX_poll (__NR_POSIX + 87)
#define __NR_POSIX_sigreturn (__NR_POSIX + 88)
#define __NR_POSIX_accept (__NR_POSIX + 89)
#define __NR_POSIX_bind (__NR_POSIX + 90)
#define __NR_POSIX_connect (__NR_POSIX + 91)
#define __NR_POSIX_gethostid (__NR_POSIX + 92)
#define __NR_POSIX_getpeername (__NR_POSIX + 93)
#define __NR_POSIX_getsockname (__NR_POSIX + 94)
#define __NR_POSIX_getsockopt (__NR_POSIX + 95)
#define __NR_POSIX_listen (__NR_POSIX + 96)
#define __NR_POSIX_recv (__NR_POSIX + 97)
#define __NR_POSIX_recvfrom (__NR_POSIX + 98)
#define __NR_POSIX_recvmsg (__NR_POSIX + 99)
#define __NR_POSIX_select (__NR_POSIX + 100)
#define __NR_POSIX_send (__NR_POSIX + 101)
#define __NR_POSIX_sendmsg (__NR_POSIX + 102)
#define __NR_POSIX_sendto (__NR_POSIX + 103)
#define __NR_POSIX_sethostid (__NR_POSIX + 104)
#define __NR_POSIX_setsockopt (__NR_POSIX + 105)
#define __NR_POSIX_shutdown (__NR_POSIX + 106)
#define __NR_POSIX_socket (__NR_POSIX + 107)
#define __NR_POSIX_gethostname (__NR_POSIX + 108)
#define __NR_POSIX_sethostname (__NR_POSIX + 109)
#define __NR_POSIX_getdomainname (__NR_POSIX + 110)
#define __NR_POSIX_setdomainname (__NR_POSIX + 111)
#define __NR_POSIX_truncate (__NR_POSIX + 112)
#define __NR_POSIX_ftruncate (__NR_POSIX + 113)
#define __NR_POSIX_rename (__NR_POSIX + 114)
#define __NR_POSIX_symlink (__NR_POSIX + 115)
#define __NR_POSIX_readlink (__NR_POSIX + 116)
#define __NR_POSIX_lstat (__NR_POSIX + 117)
#define __NR_POSIX_nfs_mount (__NR_POSIX + 118)
#define __NR_POSIX_nfs_svc (__NR_POSIX + 119)
#define __NR_POSIX_nfs_getfh (__NR_POSIX + 120)
#define __NR_POSIX_async_daemon (__NR_POSIX + 121)
#define __NR_POSIX_exportfs (__NR_POSIX + 122)
#define __NR_POSIX_SGI_setregid (__NR_POSIX + 123)
#define __NR_POSIX_SGI_setreuid (__NR_POSIX + 124)
#define __NR_POSIX_getitimer (__NR_POSIX + 125)
#define __NR_POSIX_setitimer (__NR_POSIX + 126)
#define __NR_POSIX_adjtime (__NR_POSIX + 127)
#define __NR_POSIX_SGI_bsdgettime (__NR_POSIX + 128)
#define __NR_POSIX_SGI_sproc (__NR_POSIX + 129)
#define __NR_POSIX_SGI_prctl (__NR_POSIX + 130)
#define __NR_POSIX_SGI_blkproc (__NR_POSIX + 131)
#define __NR_POSIX_SGI_reserved1 (__NR_POSIX + 132)
#define __NR_POSIX_SGI_sgigsc (__NR_POSIX + 133)
#define __NR_POSIX_SGI_mmap (__NR_POSIX + 134)
#define __NR_POSIX_SGI_munmap (__NR_POSIX + 135)
#define __NR_POSIX_SGI_mprotect (__NR_POSIX + 136)
#define __NR_POSIX_SGI_msync (__NR_POSIX + 137)
#define __NR_POSIX_SGI_madvise (__NR_POSIX + 138)
#define __NR_POSIX_SGI_mpin (__NR_POSIX + 139)
#define __NR_POSIX_SGI_getpagesize (__NR_POSIX + 140)
#define __NR_POSIX_SGI_libattach (__NR_POSIX + 141)
#define __NR_POSIX_SGI_libdetach (__NR_POSIX + 142)
#define __NR_POSIX_SGI_getpgrp (__NR_POSIX + 143)
#define __NR_POSIX_SGI_setpgrp (__NR_POSIX + 144)
#define __NR_POSIX_SGI_reserved2 (__NR_POSIX + 145)
#define __NR_POSIX_SGI_reserved3 (__NR_POSIX + 146)
#define __NR_POSIX_SGI_reserved4 (__NR_POSIX + 147)
#define __NR_POSIX_SGI_reserved5 (__NR_POSIX + 148)
#define __NR_POSIX_SGI_reserved6 (__NR_POSIX + 149)
#define __NR_POSIX_cacheflush (__NR_POSIX + 150)
#define __NR_POSIX_cachectl (__NR_POSIX + 151)
#define __NR_POSIX_fchown (__NR_POSIX + 152)
#define __NR_POSIX_fchmod (__NR_POSIX + 153)
#define __NR_POSIX_wait3 (__NR_POSIX + 154)
#define __NR_POSIX_mmap (__NR_POSIX + 155)
#define __NR_POSIX_munmap (__NR_POSIX + 156)
#define __NR_POSIX_madvise (__NR_POSIX + 157)
#define __NR_POSIX_BSD_getpagesize (__NR_POSIX + 158)
#define __NR_POSIX_setreuid (__NR_POSIX + 159)
#define __NR_POSIX_setregid (__NR_POSIX + 160)
#define __NR_POSIX_setpgid (__NR_POSIX + 161)
#define __NR_POSIX_getgroups (__NR_POSIX + 162)
#define __NR_POSIX_setgroups (__NR_POSIX + 163)
#define __NR_POSIX_gettimeofday (__NR_POSIX + 164)
#define __NR_POSIX_getrusage (__NR_POSIX + 165)
#define __NR_POSIX_getrlimit (__NR_POSIX + 166)
#define __NR_POSIX_setrlimit (__NR_POSIX + 167)
#define __NR_POSIX_waitpid (__NR_POSIX + 168)
#define __NR_POSIX_dup2 (__NR_POSIX + 169)
#define __NR_POSIX_reserved2 (__NR_POSIX + 170)
#define __NR_POSIX_reserved3 (__NR_POSIX + 171)
#define __NR_POSIX_reserved4 (__NR_POSIX + 172)
#define __NR_POSIX_reserved5 (__NR_POSIX + 173)
#define __NR_POSIX_reserved6 (__NR_POSIX + 174)
#define __NR_POSIX_reserved7 (__NR_POSIX + 175)
#define __NR_POSIX_reserved8 (__NR_POSIX + 176)
#define __NR_POSIX_reserved9 (__NR_POSIX + 177)
#define __NR_POSIX_reserved10 (__NR_POSIX + 178)
#define __NR_POSIX_reserved11 (__NR_POSIX + 179)
#define __NR_POSIX_reserved12 (__NR_POSIX + 180)
#define __NR_POSIX_reserved13 (__NR_POSIX + 181)
#define __NR_POSIX_reserved14 (__NR_POSIX + 182)
#define __NR_POSIX_reserved15 (__NR_POSIX + 183)
#define __NR_POSIX_reserved16 (__NR_POSIX + 184)
#define __NR_POSIX_reserved17 (__NR_POSIX + 185)
#define __NR_POSIX_reserved18 (__NR_POSIX + 186)
#define __NR_POSIX_reserved19 (__NR_POSIX + 187)
#define __NR_POSIX_reserved20 (__NR_POSIX + 188)
#define __NR_POSIX_reserved21 (__NR_POSIX + 189)
#define __NR_POSIX_reserved22 (__NR_POSIX + 190)
#define __NR_POSIX_reserved23 (__NR_POSIX + 191)
#define __NR_POSIX_reserved24 (__NR_POSIX + 192)
#define __NR_POSIX_reserved25 (__NR_POSIX + 193)
#define __NR_POSIX_reserved26 (__NR_POSIX + 194)
#define __NR_POSIX_reserved27 (__NR_POSIX + 195)
#define __NR_POSIX_reserved28 (__NR_POSIX + 196)
#define __NR_POSIX_reserved29 (__NR_POSIX + 197)
#define __NR_POSIX_reserved30 (__NR_POSIX + 198)
#define __NR_POSIX_reserved31 (__NR_POSIX + 199)
#define __NR_POSIX_reserved32 (__NR_POSIX + 200)
#define __NR_POSIX_reserved33 (__NR_POSIX + 201)
#define __NR_POSIX_reserved34 (__NR_POSIX + 202)
#define __NR_POSIX_reserved35 (__NR_POSIX + 203)
#define __NR_POSIX_reserved36 (__NR_POSIX + 204)
#define __NR_POSIX_reserved37 (__NR_POSIX + 205)
#define __NR_POSIX_reserved38 (__NR_POSIX + 206)
#define __NR_POSIX_reserved39 (__NR_POSIX + 207)
#define __NR_POSIX_reserved40 (__NR_POSIX + 208)
#define __NR_POSIX_reserved41 (__NR_POSIX + 209)
#define __NR_POSIX_reserved42 (__NR_POSIX + 210)
#define __NR_POSIX_reserved43 (__NR_POSIX + 211)
#define __NR_POSIX_reserved44 (__NR_POSIX + 212)
#define __NR_POSIX_reserved45 (__NR_POSIX + 213)
#define __NR_POSIX_reserved46 (__NR_POSIX + 214)
#define __NR_POSIX_reserved47 (__NR_POSIX + 215)
#define __NR_POSIX_reserved48 (__NR_POSIX + 216)
#define __NR_POSIX_reserved49 (__NR_POSIX + 217)
#define __NR_POSIX_reserved50 (__NR_POSIX + 218)
#define __NR_POSIX_reserved51 (__NR_POSIX + 219)
#define __NR_POSIX_reserved52 (__NR_POSIX + 220)
#define __NR_POSIX_reserved53 (__NR_POSIX + 221)
#define __NR_POSIX_reserved54 (__NR_POSIX + 222)
#define __NR_POSIX_reserved55 (__NR_POSIX + 223)
#define __NR_POSIX_reserved56 (__NR_POSIX + 224)
#define __NR_POSIX_reserved57 (__NR_POSIX + 225)
#define __NR_POSIX_reserved58 (__NR_POSIX + 226)
#define __NR_POSIX_reserved59 (__NR_POSIX + 227)
#define __NR_POSIX_reserved60 (__NR_POSIX + 228)
#define __NR_POSIX_reserved61 (__NR_POSIX + 229)
#define __NR_POSIX_reserved62 (__NR_POSIX + 230)
#define __NR_POSIX_reserved63 (__NR_POSIX + 231)
#define __NR_POSIX_reserved64 (__NR_POSIX + 232)
#define __NR_POSIX_reserved65 (__NR_POSIX + 233)
#define __NR_POSIX_reserved66 (__NR_POSIX + 234)
#define __NR_POSIX_reserved67 (__NR_POSIX + 235)
#define __NR_POSIX_reserved68 (__NR_POSIX + 236)
#define __NR_POSIX_reserved69 (__NR_POSIX + 237)
#define __NR_POSIX_reserved70 (__NR_POSIX + 238)
#define __NR_POSIX_reserved71 (__NR_POSIX + 239)
#define __NR_POSIX_reserved72 (__NR_POSIX + 240)
#define __NR_POSIX_reserved73 (__NR_POSIX + 241)
#define __NR_POSIX_reserved74 (__NR_POSIX + 242)
#define __NR_POSIX_reserved75 (__NR_POSIX + 243)
#define __NR_POSIX_reserved76 (__NR_POSIX + 244)
#define __NR_POSIX_reserved77 (__NR_POSIX + 245)
#define __NR_POSIX_reserved78 (__NR_POSIX + 246)
#define __NR_POSIX_reserved79 (__NR_POSIX + 247)
#define __NR_POSIX_reserved80 (__NR_POSIX + 248)
#define __NR_POSIX_reserved81 (__NR_POSIX + 249)
#define __NR_POSIX_reserved82 (__NR_POSIX + 250)
#define __NR_POSIX_reserved83 (__NR_POSIX + 251)
#define __NR_POSIX_reserved84 (__NR_POSIX + 252)
#define __NR_POSIX_reserved85 (__NR_POSIX + 253)
#define __NR_POSIX_reserved86 (__NR_POSIX + 254)
#define __NR_POSIX_reserved87 (__NR_POSIX + 255)
#define __NR_POSIX_reserved88 (__NR_POSIX + 256)
#define __NR_POSIX_reserved89 (__NR_POSIX + 257)
#define __NR_POSIX_reserved90 (__NR_POSIX + 258)
#define __NR_POSIX_reserved91 (__NR_POSIX + 259)
#define __NR_POSIX_netboot (__NR_POSIX + 260)
#define __NR_POSIX_netunboot (__NR_POSIX + 261)
#define __NR_POSIX_rdump (__NR_POSIX + 262)
#define __NR_POSIX_setsid (__NR_POSIX + 263)
#define __NR_POSIX_getmaxsig (__NR_POSIX + 264)
#define __NR_POSIX_sigpending (__NR_POSIX + 265)
#define __NR_POSIX_sigprocmask (__NR_POSIX + 266)
#define __NR_POSIX_sigsuspend (__NR_POSIX + 267)
#define __NR_POSIX_sigaction (__NR_POSIX + 268)
#define __NR_POSIX_MIPS_reserved1 (__NR_POSIX + 269)
#define __NR_POSIX_MIPS_reserved2 (__NR_POSIX + 270)
#define __NR_POSIX_MIPS_reserved3 (__NR_POSIX + 271)
#define __NR_POSIX_MIPS_reserved4 (__NR_POSIX + 272)
#define __NR_POSIX_MIPS_reserved5 (__NR_POSIX + 273)
#define __NR_POSIX_MIPS_reserved6 (__NR_POSIX + 274)
#define __NR_POSIX_MIPS_reserved7 (__NR_POSIX + 275)
#define __NR_POSIX_MIPS_reserved8 (__NR_POSIX + 276)
#define __NR_POSIX_MIPS_reserved9 (__NR_POSIX + 277)
#define __NR_POSIX_MIPS_reserved10 (__NR_POSIX + 278)
#define __NR_POSIX_MIPS_reserved11 (__NR_POSIX + 279)
#define __NR_POSIX_TANDEM_reserved1 (__NR_POSIX + 280)
#define __NR_POSIX_TANDEM_reserved2 (__NR_POSIX + 281)
#define __NR_POSIX_TANDEM_reserved3 (__NR_POSIX + 282)
#define __NR_POSIX_TANDEM_reserved4 (__NR_POSIX + 283)
#define __NR_POSIX_TANDEM_reserved5 (__NR_POSIX + 284)
#define __NR_POSIX_TANDEM_reserved6 (__NR_POSIX + 285)
#define __NR_POSIX_TANDEM_reserved7 (__NR_POSIX + 286)
#define __NR_POSIX_TANDEM_reserved8 (__NR_POSIX + 287)
#define __NR_POSIX_TANDEM_reserved9 (__NR_POSIX + 288)
#define __NR_POSIX_TANDEM_reserved10 (__NR_POSIX + 289)
#define __NR_POSIX_TANDEM_reserved11 (__NR_POSIX + 290)
#define __NR_POSIX_TANDEM_reserved12 (__NR_POSIX + 291)
#define __NR_POSIX_TANDEM_reserved13 (__NR_POSIX + 292)
#define __NR_POSIX_TANDEM_reserved14 (__NR_POSIX + 293)
#define __NR_POSIX_TANDEM_reserved15 (__NR_POSIX + 294)
#define __NR_POSIX_TANDEM_reserved16 (__NR_POSIX + 295)
#define __NR_POSIX_TANDEM_reserved17 (__NR_POSIX + 296)
#define __NR_POSIX_TANDEM_reserved18 (__NR_POSIX + 297)
#define __NR_POSIX_TANDEM_reserved19 (__NR_POSIX + 298)
#define __NR_POSIX_TANDEM_reserved20 (__NR_POSIX + 299)
#define __NR_POSIX_SGI_reserved7 (__NR_POSIX + 300)
#define __NR_POSIX_SGI_reserved8 (__NR_POSIX + 301)
#define __NR_POSIX_SGI_reserved9 (__NR_POSIX + 302)
#define __NR_POSIX_SGI_reserved10 (__NR_POSIX + 303)
#define __NR_POSIX_SGI_reserved11 (__NR_POSIX + 304)
#define __NR_POSIX_SGI_reserved12 (__NR_POSIX + 305)
#define __NR_POSIX_SGI_reserved13 (__NR_POSIX + 306)
#define __NR_POSIX_SGI_reserved14 (__NR_POSIX + 307)
#define __NR_POSIX_SGI_reserved15 (__NR_POSIX + 308)
#define __NR_POSIX_SGI_reserved16 (__NR_POSIX + 309)
#define __NR_POSIX_SGI_reserved17 (__NR_POSIX + 310)
#define __NR_POSIX_SGI_reserved18 (__NR_POSIX + 311)
#define __NR_POSIX_SGI_reserved19 (__NR_POSIX + 312)
#define __NR_POSIX_SGI_reserved20 (__NR_POSIX + 313)
#define __NR_POSIX_SGI_reserved21 (__NR_POSIX + 314)
#define __NR_POSIX_SGI_reserved22 (__NR_POSIX + 315)
#define __NR_POSIX_SGI_reserved23 (__NR_POSIX + 316)
#define __NR_POSIX_SGI_reserved24 (__NR_POSIX + 317)
#define __NR_POSIX_SGI_reserved25 (__NR_POSIX + 318)
#define __NR_POSIX_SGI_reserved26 (__NR_POSIX + 319)
#endif /* _ASM_RISCOS_SYSCALL_H */

View file

@ -216,4 +216,5 @@ static __inline__ int atomic_read(const atomic_t *v)
#define smp_mb__before_atomic_inc() smp_mb()
#define smp_mb__after_atomic_inc() smp_mb()
#include <asm-generic/atomic.h>
#endif

View file

@ -263,6 +263,7 @@ static __inline__ int fls(int x)
return ret;
}
#define fls64(x) generic_fls64(x)
/*
* hweightN: returns the hamming weight (i.e. the number

View file

@ -38,6 +38,7 @@
#define MADV_SPACEAVAIL 5 /* insure that resources are reserved */
#define MADV_VPS_PURGE 6 /* Purge pages from VM page cache */
#define MADV_VPS_INHERIT 7 /* Inherit parents page size */
#define MADV_REMOVE 8 /* remove these pages & resources */
/* The range 12-64 is reserved for page size specification. */
#define MADV_4K_PAGES 12 /* Use 4K pages */

View file

@ -402,5 +402,6 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
#endif /* __powerpc64__ */
#include <asm-generic/atomic.h>
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_ATOMIC_H_ */

View file

@ -310,6 +310,7 @@ static __inline__ int fls(unsigned int x)
asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
return 32 - lz;
}
#define fls64(x) generic_fls64(x)
/*
* hweightN: returns the hamming weight (i.e. the number

View file

@ -44,6 +44,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -63,7 +63,6 @@ struct ocp_func_emac_data {
int wol_irq; /* WOL interrupt */
int mdio_idx; /* EMAC idx of MDIO master or -1 */
int tah_idx; /* TAH device index or -1 */
int jumbo; /* Jumbo frames capable flag */
int phy_mode; /* PHY type or configurable mode */
u8 mac_addr[6]; /* EMAC mac address */
u32 phy_map; /* EMAC phy map */

View file

@ -27,6 +27,8 @@
#if defined(CONFIG_4xx)
#include <asm/ibm4xx.h>
#elif defined(CONFIG_PPC_MPC52xx)
#include <asm/mpc52xx.h>
#elif defined(CONFIG_8xx)
#include <asm/mpc8xx.h>
#elif defined(CONFIG_8260)

View file

@ -29,6 +29,17 @@ struct pt_regs;
#endif /* __ASSEMBLY__ */
#ifdef CONFIG_PCI
#define _IO_BASE isa_io_base
#define _ISA_MEM_BASE isa_mem_base
#define PCI_DRAM_OFFSET pci_dram_offset
#else
#define _IO_BASE 0
#define _ISA_MEM_BASE 0
#define PCI_DRAM_OFFSET 0
#endif
/* ======================================================================== */
/* PPC Sys devices definition */
/* ======================================================================== */
@ -107,7 +118,7 @@ enum ppc_sys_devices {
#define MPC52xx_SDMA_IRQ_NUM 17
#define MPC52xx_PERP_IRQ_NUM 23
#define MPC52xx_CRIT_IRQ_BASE 0
#define MPC52xx_CRIT_IRQ_BASE 1
#define MPC52xx_MAIN_IRQ_BASE (MPC52xx_CRIT_IRQ_BASE + MPC52xx_CRIT_IRQ_NUM)
#define MPC52xx_SDMA_IRQ_BASE (MPC52xx_MAIN_IRQ_BASE + MPC52xx_MAIN_IRQ_NUM)
#define MPC52xx_PERP_IRQ_BASE (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)

View file

@ -5,7 +5,7 @@
* include/asm-s390/atomic.h
*
* S390 version
* Copyright (C) 1999-2003 IBM Deutschland Entwicklung GmbH, IBM Corporation
* Copyright (C) 1999-2005 IBM Deutschland Entwicklung GmbH, IBM Corporation
* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
* Denis Joseph Barrow,
* Arnd Bergmann (arndb@de.ibm.com)
@ -45,59 +45,57 @@ typedef struct {
#define atomic_read(v) ((v)->counter)
#define atomic_set(v,i) (((v)->counter) = (i))
static __inline__ void atomic_add(int i, atomic_t * v)
{
__CS_LOOP(v, i, "ar");
}
static __inline__ int atomic_add_return(int i, atomic_t * v)
{
return __CS_LOOP(v, i, "ar");
}
static __inline__ int atomic_add_negative(int i, atomic_t * v)
{
return __CS_LOOP(v, i, "ar") < 0;
}
static __inline__ void atomic_sub(int i, atomic_t * v)
{
__CS_LOOP(v, i, "sr");
}
#define atomic_add(_i, _v) atomic_add_return(_i, _v)
#define atomic_add_negative(_i, _v) (atomic_add_return(_i, _v) < 0)
#define atomic_inc(_v) atomic_add_return(1, _v)
#define atomic_inc_return(_v) atomic_add_return(1, _v)
#define atomic_inc_and_test(_v) (atomic_add_return(1, _v) == 0)
static __inline__ int atomic_sub_return(int i, atomic_t * v)
{
return __CS_LOOP(v, i, "sr");
}
static __inline__ void atomic_inc(volatile atomic_t * v)
{
__CS_LOOP(v, 1, "ar");
}
static __inline__ int atomic_inc_return(volatile atomic_t * v)
{
return __CS_LOOP(v, 1, "ar");
}
#define atomic_sub(_i, _v) atomic_sub_return(_i, _v)
#define atomic_sub_and_test(_i, _v) (atomic_sub_return(_i, _v) == 0)
#define atomic_dec(_v) atomic_sub_return(1, _v)
#define atomic_dec_return(_v) atomic_sub_return(1, _v)
#define atomic_dec_and_test(_v) (atomic_sub_return(1, _v) == 0)
static __inline__ int atomic_inc_and_test(volatile atomic_t * v)
{
return __CS_LOOP(v, 1, "ar") == 0;
}
static __inline__ void atomic_dec(volatile atomic_t * v)
{
__CS_LOOP(v, 1, "sr");
}
static __inline__ int atomic_dec_return(volatile atomic_t * v)
{
return __CS_LOOP(v, 1, "sr");
}
static __inline__ int atomic_dec_and_test(volatile atomic_t * v)
{
return __CS_LOOP(v, 1, "sr") == 0;
}
static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t * v)
{
__CS_LOOP(v, ~mask, "nr");
}
static __inline__ void atomic_set_mask(unsigned long mask, atomic_t * v)
{
__CS_LOOP(v, mask, "or");
}
static __inline__ int atomic_cmpxchg(atomic_t *v, int old, int new)
{
__asm__ __volatile__(" cs %0,%3,0(%2)\n"
: "+d" (old), "=m" (v->counter)
: "a" (v), "d" (new), "m" (v->counter)
: "cc", "memory" );
return old;
}
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
{
int c, old;
c = atomic_read(v);
while (c != u && (old = atomic_cmpxchg(v, c, c + a)) != c)
c = old;
return c != u;
}
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
#undef __CS_LOOP
#ifdef __s390x__
@ -123,97 +121,67 @@ typedef struct {
#define atomic64_read(v) ((v)->counter)
#define atomic64_set(v,i) (((v)->counter) = (i))
static __inline__ void atomic64_add(long long i, atomic64_t * v)
{
__CSG_LOOP(v, i, "agr");
}
static __inline__ long long atomic64_add_return(long long i, atomic64_t * v)
{
return __CSG_LOOP(v, i, "agr");
}
static __inline__ long long atomic64_add_negative(long long i, atomic64_t * v)
#define atomic64_add(_i, _v) atomic64_add_return(_i, _v)
#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0)
#define atomic64_inc(_v) atomic64_add_return(1, _v)
#define atomic64_inc_return(_v) atomic64_add_return(1, _v)
#define atomic64_inc_and_test(_v) (atomic64_add_return(1, _v) == 0)
static __inline__ long long atomic64_sub_return(long long i, atomic64_t * v)
{
return __CSG_LOOP(v, i, "agr") < 0;
}
static __inline__ void atomic64_sub(long long i, atomic64_t * v)
{
__CSG_LOOP(v, i, "sgr");
}
static __inline__ void atomic64_inc(volatile atomic64_t * v)
{
__CSG_LOOP(v, 1, "agr");
}
static __inline__ long long atomic64_inc_return(volatile atomic64_t * v)
{
return __CSG_LOOP(v, 1, "agr");
}
static __inline__ long long atomic64_inc_and_test(volatile atomic64_t * v)
{
return __CSG_LOOP(v, 1, "agr") == 0;
}
static __inline__ void atomic64_dec(volatile atomic64_t * v)
{
__CSG_LOOP(v, 1, "sgr");
}
static __inline__ long long atomic64_dec_return(volatile atomic64_t * v)
{
return __CSG_LOOP(v, 1, "sgr");
}
static __inline__ long long atomic64_dec_and_test(volatile atomic64_t * v)
{
return __CSG_LOOP(v, 1, "sgr") == 0;
return __CSG_LOOP(v, i, "sgr");
}
#define atomic64_sub(_i, _v) atomic64_sub_return(_i, _v)
#define atomic64_sub_and_test(_i, _v) (atomic64_sub_return(_i, _v) == 0)
#define atomic64_dec(_v) atomic64_sub_return(1, _v)
#define atomic64_dec_return(_v) atomic64_sub_return(1, _v)
#define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0)
static __inline__ void atomic64_clear_mask(unsigned long mask, atomic64_t * v)
{
__CSG_LOOP(v, ~mask, "ngr");
}
static __inline__ void atomic64_set_mask(unsigned long mask, atomic64_t * v)
{
__CSG_LOOP(v, mask, "ogr");
}
#undef __CSG_LOOP
#endif
/*
returns 0 if expected_oldval==value in *v ( swap was successful )
returns 1 if unsuccessful.
This is non-portable, use bitops or spinlocks instead!
*/
static __inline__ int
atomic_compare_and_swap(int expected_oldval,int new_val,atomic_t *v)
static __inline__ long long atomic64_cmpxchg(atomic64_t *v,
long long old, long long new)
{
int retval;
__asm__ __volatile__(
" lr %0,%3\n"
" cs %0,%4,0(%2)\n"
" ipm %0\n"
" srl %0,28\n"
"0:"
: "=&d" (retval), "=m" (v->counter)
: "a" (v), "d" (expected_oldval) , "d" (new_val),
"m" (v->counter) : "cc", "memory" );
return retval;
__asm__ __volatile__(" csg %0,%3,0(%2)\n"
: "+d" (old), "=m" (v->counter)
: "a" (v), "d" (new), "m" (v->counter)
: "cc", "memory" );
return old;
}
#define atomic_cmpxchg(v, o, n) (atomic_compare_and_swap((o), (n), &((v)->counter)))
static __inline__ int atomic64_add_unless(atomic64_t *v,
long long a, long long u)
{
long long c, old;
#define atomic_add_unless(v, a, u) \
({ \
int c, old; \
c = atomic_read(v); \
while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
c = old; \
c != (u); \
})
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
c = atomic64_read(v);
while (c != u && (old = atomic64_cmpxchg(v, c, c + a)) != c)
c = old;
return c != u;
}
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
#undef __CSG_LOOP
#endif
#define smp_mb__before_atomic_dec() smp_mb()
#define smp_mb__after_atomic_dec() smp_mb()
#define smp_mb__before_atomic_inc() smp_mb()
#define smp_mb__after_atomic_inc() smp_mb()
#include <asm-generic/atomic.h>
#endif /* __KERNEL__ */
#endif /* __ARCH_S390_ATOMIC__ */

View file

@ -839,6 +839,7 @@ static inline int sched_find_first_bit(unsigned long *b)
* fls: find last bit set.
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
/*
* hweightN: returns the hamming weight (i.e. the number

View file

@ -185,8 +185,5 @@ extern struct ccw_device *ccw_device_probe_console(void);
extern int _ccw_device_get_device_number(struct ccw_device *);
extern int _ccw_device_get_subchannel_number(struct ccw_device *);
extern struct device *s390_root_dev_register(const char *);
extern void s390_root_dev_unregister(struct device *);
extern void *ccw_device_get_chp_desc(struct ccw_device *, int);
#endif /* _S390_CCWDEV_H_ */

View file

@ -43,6 +43,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -195,12 +195,14 @@ struct qdr {
/*
* queue information block (QIB)
*/
#define QIB_AC_INBOUND_PCI_SUPPORTED 0x80
#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
#define QIB_AC_INBOUND_PCI_SUPPORTED 0x80
#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
#define QIB_RFLAGS_ENABLE_QEBSM 0x80
struct qib {
unsigned int qfmt : 8; /* queue format */
unsigned int pfmt : 8; /* impl. dep. parameter format */
unsigned int res1 : 8; /* reserved */
unsigned int rflags : 8; /* QEBSM */
unsigned int ac : 8; /* adapter characteristics */
unsigned int res2; /* reserved */
#ifdef QDIO_32_BIT

View file

@ -0,0 +1,15 @@
/*
* include/asm-s390/ccwdev.h
*
* Copyright (C) 2002,2005 IBM Deutschland Entwicklung GmbH, IBM Corporation
* Author(s): Cornelia Huck <cohuck@de.ibm.com>
* Carsten Otte <cotte@de.ibm.com>
*
* Interface for s390 root device
*/
#ifndef _S390_RDEV_H_
#define _S390_RDEV_H_
extern struct device *s390_root_dev_register(const char *);
extern void s390_root_dev_unregister(struct device *);
#endif /* _S390_RDEV_H_ */

View file

@ -61,8 +61,10 @@
#define segment_eq(a,b) ((a).ar4 == (b).ar4)
#define __access_ok(addr,size) (1)
static inline int __access_ok(const void *addr, unsigned long size)
{
return 1;
}
#define access_ok(type,addr,size) __access_ok(addr,size)
/*
@ -206,25 +208,25 @@ extern int __put_user_bad(void) __attribute__((noreturn));
case 1: { \
unsigned char __x; \
__get_user_asm(__x, ptr, __gu_err); \
(x) = (__typeof__(*(ptr))) __x; \
(x) = *(__typeof__(*(ptr)) *) &__x; \
break; \
}; \
case 2: { \
unsigned short __x; \
__get_user_asm(__x, ptr, __gu_err); \
(x) = (__typeof__(*(ptr))) __x; \
(x) = *(__typeof__(*(ptr)) *) &__x; \
break; \
}; \
case 4: { \
unsigned int __x; \
__get_user_asm(__x, ptr, __gu_err); \
(x) = (__typeof__(*(ptr))) __x; \
(x) = *(__typeof__(*(ptr)) *) &__x; \
break; \
}; \
case 8: { \
unsigned long long __x; \
__get_user_asm(__x, ptr, __gu_err); \
(x) = (__typeof__(*(ptr))) __x; \
(x) = *(__typeof__(*(ptr)) *) &__x; \
break; \
}; \
default: \

View file

@ -539,7 +539,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
# ifdef CONFIG_ARCH_S390_31
# ifndef CONFIG_64BIT
# define __ARCH_WANT_STAT64
# define __ARCH_WANT_SYS_TIME
# endif

View file

@ -176,4 +176,28 @@ struct vtoc_format7_label
struct vtoc_cchhb DS7PTRDS; /* pointer to next FMT7 DSCB */
} __attribute__ ((packed));
struct vtoc_cms_label {
u8 label_id[4]; /* Label identifier */
u8 vol_id[6]; /* Volid */
u16 version_id; /* Version identifier */
u32 block_size; /* Disk block size */
u32 origin_ptr; /* Disk origin pointer */
u32 usable_count; /* Number of usable cylinders/blocks */
u32 formatted_count; /* Maximum number of formatted cylinders/
* blocks */
u32 block_count; /* Disk size in CMS blocks */
u32 used_count; /* Number of CMS blocks in use */
u32 fst_size; /* File Status Table (FST) size */
u32 fst_count; /* Number of FSTs per CMS block */
u8 format_date[6]; /* Disk FORMAT date */
u8 reserved1[2];
u32 disk_offset; /* Disk offset when reserved*/
u32 map_block; /* Allocation Map Block with next hole */
u32 hblk_disp; /* Displacement into HBLK data of next hole */
u32 user_disp; /* Displacement into user part of Allocation
* map */
u8 reserved2[4];
u8 segment_name[8]; /* Name of shared segment */
} __attribute__ ((packed));
#endif /* _ASM_S390_VTOC_H */

View file

@ -140,4 +140,5 @@ static __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* __ASM_SH_ATOMIC_H */

View file

@ -470,6 +470,7 @@ found_middle:
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#endif /* __KERNEL__ */

View file

@ -35,6 +35,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -152,4 +152,5 @@ static __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* __ASM_SH64_ATOMIC_H */

View file

@ -510,6 +510,7 @@ found_middle:
#define ffs(x) generic_ffs(x)
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#endif /* __KERNEL__ */

View file

@ -159,4 +159,5 @@ static inline int __atomic24_sub(int i, atomic24_t *v)
#endif /* !(__KERNEL__) */
#include <asm-generic/atomic.h>
#endif /* !(__ARCH_SPARC_ATOMIC__) */

View file

@ -298,6 +298,7 @@ static inline int ffs(int x)
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
/*
* hweightN: returns the hamming weight (i.e. the number

View file

@ -54,6 +54,7 @@
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_FREE 0x5 /* (Solaris) contents can be freed */
#define MADV_REMOVE 0x6 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -96,4 +96,5 @@ extern int atomic64_sub_ret(int, atomic64_t *);
#define smp_mb__after_atomic_inc() barrier()
#endif
#include <asm-generic/atomic.h>
#endif /* !(__ARCH_SPARC64_ATOMIC__) */

View file

@ -119,6 +119,7 @@ static inline unsigned long __ffs(unsigned long word)
*/
#define fls(x) generic_fls(x)
#define fls64(x) generic_fls64(x)
#ifdef __KERNEL__

View file

@ -54,6 +54,7 @@
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_FREE 0x5 /* (Solaris) contents can be freed */
#define MADV_REMOVE 0x6 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

View file

@ -126,4 +126,5 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#include <asm-generic/atomic.h>
#endif /* __V850_ATOMIC_H__ */

View file

@ -276,6 +276,7 @@ found_middle:
#define ffs(x) generic_ffs (x)
#define fls(x) generic_fls (x)
#define fls64(x) generic_fls64(x)
#define __ffs(x) ffs(x)

View file

@ -32,6 +32,7 @@
#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
#define MADV_WILLNEED 0x3 /* pre-fault pages */
#define MADV_DONTNEED 0x4 /* discard these pages */
#define MADV_REMOVE 0x5 /* remove these pages & resources */
/* compatibility flags */
#define MAP_ANON MAP_ANONYMOUS

Some files were not shown because too many files have changed in this diff Show more