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clk: divider: fix incorrect usage of container_of
divider_recalc_rate() is an helper function used by clock divider of
different types, so the structure containing the 'hw' pointer is not
always a 'struct clk_divider'
At the following line:
> div = _get_div(table, val, flags, divider->width);
in several cases, the value of 'divider->width' is garbage as the actual
structure behind this memory is not a 'struct clk_divider'
Fortunately, this width value is used by _get_val() only when
CLK_DIVIDER_MAX_AT_ZERO flag is set. This has never been the case so
far when the structure is not a 'struct clk_divider'. This is probably
why we did not notice this bug before
Fixes: afe76c8fd0 ("clk: allow a clk divider with max divisor when zero")
Signed-off-by: Jerome Brunet <[email protected]>
Acked-by: Alexandre Belloni <[email protected]>
Acked-by: Sylvain Lemieux <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
This commit is contained in:
parent
4fbd8d194f
commit
12a26c298d
8 changed files with 13 additions and 12 deletions
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@ -137,13 +137,15 @@ static unsigned long ac100_clkout_recalc_rate(struct clk_hw *hw,
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div = (reg >> AC100_CLKOUT_PRE_DIV_SHIFT) &
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((1 << AC100_CLKOUT_PRE_DIV_WIDTH) - 1);
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prate = divider_recalc_rate(hw, prate, div,
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ac100_clkout_prediv, 0);
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ac100_clkout_prediv, 0,
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AC100_CLKOUT_PRE_DIV_WIDTH);
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}
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div = (reg >> AC100_CLKOUT_DIV_SHIFT) &
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(BIT(AC100_CLKOUT_DIV_WIDTH) - 1);
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return divider_recalc_rate(hw, prate, div, NULL,
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CLK_DIVIDER_POWER_OF_TWO);
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CLK_DIVIDER_POWER_OF_TWO,
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AC100_CLKOUT_DIV_WIDTH);
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}
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static long ac100_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
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