qcacld-3.0: Send high 32bit addr for no smmu platform which fw need

Host send HTT_H2T_MSG_TYPE_WDI_IPA_CFG cmd to fw, need update
high 32bit addr for non-smmu platform which alloc physical
address more than 4G, like addr 0x1 5000 0000.It will cut
off bit32~bit63, fw get memory is 0x5000 0000, it's maybe
use for peripheral memory.when fw write addr 0x5000 0000,
it will meet some error.

32bit platform compile error,for right shift must less
than system width.

Change-Id: If1e84cfdcd15494be3f7327986ff0e91ec7b2b3f
CRs-Fixed: 3097240
This commit is contained in:
chunquan 2021-12-20 14:51:30 +08:00 • committed by Madan Koyyalamudi
commit 13dbf23219

View file

@ -1061,7 +1061,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
msg_word++;
*msg_word = 0;
mem_info_t = &pdev->ipa_uc_tx_rsc.tx_comp_ring->mem_info;
addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32);
addr = (uint64_t)qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32;
HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1075,7 +1075,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
(unsigned int)pdev->ipa_uc_tx_rsc.tx_comp_idx_paddr);
msg_word++;
*msg_word = 0;
addr = (uint32_t)(pdev->ipa_uc_tx_rsc.tx_comp_idx_paddr >> 32);
addr = (uint64_t)pdev->ipa_uc_tx_rsc.tx_comp_idx_paddr >> 32;
HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1086,7 +1086,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
msg_word++;
*msg_word = 0;
mem_info_t = &pdev->ipa_uc_tx_rsc.tx_ce_idx->mem_info;
addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32);
addr = (uint64_t)qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32;
HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1097,7 +1097,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
msg_word++;
*msg_word = 0;
mem_info_t = &pdev->ipa_uc_rx_rsc.rx_ind_ring->mem_info;
addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32);
addr = (uint64_t)qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32;
HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1113,7 +1113,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
msg_word++;
*msg_word = 0;
mem_info_t = &pdev->ipa_uc_rx_rsc.rx_ipa_prc_done_idx->mem_info;
addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32);
addr = (uint64_t)qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32;
HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1122,7 +1122,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
(unsigned int)pdev->ipa_uc_rx_rsc.rx_rdy_idx_paddr);
msg_word++;
*msg_word = 0;
addr = (uint32_t)(pdev->ipa_uc_rx_rsc.rx_rdy_idx_paddr >> 32);
addr = (uint64_t)pdev->ipa_uc_rx_rsc.rx_rdy_idx_paddr >> 32;
HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1133,7 +1133,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
msg_word++;
*msg_word = 0;
mem_info_t = &pdev->ipa_uc_rx_rsc.rx2_ind_ring->mem_info;
addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32);
addr = (uint64_t)qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32;
HTT_WDI_IPA_CFG_RX_RING2_BASE_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1149,7 +1149,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
msg_word++;
*msg_word = 0;
mem_info_t = &pdev->ipa_uc_rx_rsc.rx2_ipa_prc_done_idx->mem_info;
addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32);
addr = (uint64_t)qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32;
HTT_WDI_IPA_CFG_RX_RING2_RD_IDX_ADDR_HI_SET(*msg_word, addr);
msg_word++;
@ -1160,7 +1160,7 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
msg_word++;
*msg_word = 0;
mem_info_t = &pdev->ipa_uc_rx_rsc.rx2_ipa_prc_done_idx->mem_info;
addr = (uint32_t)(qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32);
addr = (uint64_t)qdf_mem_get_dma_addr(pdev->osdev, mem_info_t) >> 32;
HTT_WDI_IPA_CFG_RX_RING2_WR_IDX_ADDR_HI_SET(*msg_word, addr);
SET_HTC_PACKET_INFO_TX(&pkt->htc_pkt,