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ARM: dts: msm: Update latfloor devices on Lahaina

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Create a cpu7 latfloor device to allow for custom
voting by cpu7 independent of cpu4 latfloor device.
Also add cpu4 llcc latfloor device to allow for an
llcc latfloor in certain scenarios.

Change-Id: I8f63abb0f81235f56c165630eb1d0eea00325140
This commit is contained in:
Amir Vajid 2020-04-30 11:08:21 -07:00
commit 13fefdbb33
1 changed files with 45 additions and 3 deletions
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48
qcom/lahaina.dtsi
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@ -3762,6 +3762,22 @@
operating-points-v2 = <&ddr_bw_opp_table>;
};
cpu4_cpu_llcc_latfloor: qcom,cpu4-cpu-llcc-latfloor {
compatible = "qcom,devfreq-icc";
governor = "performance";
interconnects = <&gem_noc MASTER_APPSS_PROC &gem_noc SLAVE_LLCC>;
qcom,active-only;
operating-points-v2 = <&llcc_bw_opp_table>;
};
cpu7_cpu_ddr_latfloor: qcom,cpu7-cpu-ddr-latfloor {
compatible = "qcom,devfreq-icc-ddr";
governor = "performance";
interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;
qcom,active-only;
operating-points-v2 = <&ddr_bw_opp_table>;
};
cpu4_cpu_ddr_qoslat: qcom,cpu4-cpu-ddr-qoslat {
compatible = "qcom,devfreq-qoslat";
governor = "powersave";
@ -3961,15 +3977,41 @@
qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
qcom,core-dev-table =
< 1804800 MHZ_TO_MBPS( 200, 4) >,
< 2304000 MHZ_TO_MBPS(1017, 4) >,
< 2400000 MHZ_TO_MBPS(2133, 4) >;
< 2400000 MHZ_TO_MBPS(1017, 4) >;
};
ddr5-map {
qcom,ddr-type = <DDR_TYPE_LPDDR5>;
qcom,core-dev-table =
< 1804800 MHZ_TO_MBPS( 200, 4) >,
< 2303000 MHZ_TO_MBPS(1555, 4) >,
< 2400000 MHZ_TO_MBPS(1555, 4) >;
};
};
cpu4_llcc_computemon: qcom,cpu4-llcc-computemon {
compatible = "qcom,arm-compute-mon";
qcom,target-dev = <&cpu4_cpu_llcc_latfloor>;
qcom,core-dev-table =
< 1804800 MHZ_TO_MBPS( 150, 16) >,
< 2400000 MHZ_TO_MBPS( 600, 16) >;
};
cpu7_llcc_ddr_latmon: qcom,cpu7-llcc-ddr-latmon {
compatible = "qcom,arm-memlat-mon";
qcom,cpulist = <&CPU7>;
qcom,target-dev = <&cpu7_cpu_ddr_latfloor>;
qcom,cachemiss-ev = <0x1000>;
ddr4-map {
qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
qcom,core-dev-table =
< 2304000 MHZ_TO_MBPS( 200, 4) >,
< 2400000 MHZ_TO_MBPS(2133, 4) >;
};
ddr5-map {
qcom,ddr-type = <DDR_TYPE_LPDDR5>;
qcom,core-dev-table =
< 2304000 MHZ_TO_MBPS( 200, 4) >,
< 2400000 MHZ_TO_MBPS(3196, 4) >;
};
};