From 147465cd66709c50c41b8dbc4dbb3966816c7c57 Mon Sep 17 00:00:00 2001 From: Xiaojun Sang Date: Thu, 23 Jul 2020 19:27:41 +0800 Subject: [PATCH] pinctrl: set gpio 4 and 5 for qup14 Make GPIO 4 and 5 support qup14 functionality. Change-Id: I2111e0c19eacfc1d200d69069b76a12fbc99e145 Signed-off-by: Xiaojun Sang --- drivers/pinctrl/qcom/pinctrl-holi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-holi.c b/drivers/pinctrl/qcom/pinctrl-holi.c index 6af7aaf02193..9674850d4b3e 100644 --- a/drivers/pinctrl/qcom/pinctrl-holi.c +++ b/drivers/pinctrl/qcom/pinctrl-holi.c @@ -1017,7 +1017,7 @@ static const char * const qup00_groups[] = { "gpio0", "gpio1", "gpio2", "gpio3", }; static const char * const qup01_groups[] = { - "gpio61", "gpio62", "gpio63", "gpio64", + "gpio4", "gpio5", "gpio61", "gpio62", "gpio63", "gpio64", }; static const char * const qup02_groups[] = { "gpio45", "gpio46", "gpio48", "gpio56", "gpio57", @@ -1285,9 +1285,9 @@ static const struct msm_pingroup holi_groups[] = { NA, 0, -1), [3] = PINGROUP(3, qup00, CCI_I2C, sp_cmu, dbg_out, qdss_cti, NA, NA, NA, NA, 0x9C018, 1), - [4] = PINGROUP(4, qup14, qup14, sdc1_tb, NA, NA, NA, NA, NA, NA, + [4] = PINGROUP(4, qup01, qup01, sdc1_tb, NA, NA, NA, NA, NA, NA, 0x9C00C, 3), - [5] = PINGROUP(5, qup14, qup14, sdc2_tb, NA, NA, NA, NA, NA, NA, 0, -1), + [5] = PINGROUP(5, qup01, qup01, sdc2_tb, NA, NA, NA, NA, NA, NA, 0, -1), [6] = PINGROUP(6, MDP_VSYNC, qdss_cti, NA, NA, NA, NA, NA, NA, NA, 0, -1), [7] = PINGROUP(7, qdss_cti, NA, NA, NA, NA, NA, NA, NA, NA, 0x9C018, 2),