mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-07 20:33:58 -04:00
Merge "msm: ep-pcie: Update load factor for 1.2V rail on sdxlemur"
This commit is contained in:
commit
1476d39e6f
7 changed files with 68 additions and 9 deletions
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@ -176,7 +176,7 @@
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#define MAX_IATU_ENTRY_NUM 2
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#define EP_PCIE_LOG_PAGES 50
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#define EP_PCIE_MAX_VREG 3
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#define EP_PCIE_MAX_VREG 4
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#define EP_PCIE_MAX_CLK 10
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#define EP_PCIE_MAX_PIPE_CLK 1
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#define EP_PCIE_MAX_RESET 2
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@ -5,6 +5,7 @@
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* MSM PCIe endpoint core driver.
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*/
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#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
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#include <linux/module.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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@ -52,9 +53,10 @@ static u32 clkreq_irq;
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struct ep_pcie_dev_t ep_pcie_dev = {0};
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static struct ep_pcie_vreg_info_t ep_pcie_vreg_info[EP_PCIE_MAX_VREG] = {
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{NULL, "vreg-1p8", 1200000, 1200000, 3000, true},
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{NULL, "vreg-1p8", 1200000, 1200000, 30000, true},
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{NULL, "vreg-0p9", 912000, 912000, 132000, true},
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{NULL, "vreg-cx", 0, 0, 0, false}
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{NULL, "vreg-cx", 0, 0, 0, false},
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{NULL, "vreg-mx", 0, 0, 0, false}
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};
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static struct ep_pcie_gpio_info_t ep_pcie_gpio_info[EP_PCIE_MAX_GPIO] = {
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@ -311,8 +313,15 @@ static int ep_pcie_vreg_init(struct ep_pcie_dev_t *dev)
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while (i--) {
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struct regulator *hdl = dev->vreg[i].hdl;
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if (hdl)
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if (hdl) {
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regulator_disable(hdl);
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if (!strcmp(dev->vreg[i].name, "vreg-mx")) {
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EP_PCIE_DBG(dev, "PCIe V%d: Removing vote for %s.\n",
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dev->rev, dev->vreg[i].name);
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regulator_set_voltage(hdl, RPMH_REGULATOR_LEVEL_RETENTION,
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RPMH_REGULATOR_LEVEL_MAX);
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}
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}
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}
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return rc;
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@ -329,6 +338,12 @@ static void ep_pcie_vreg_deinit(struct ep_pcie_dev_t *dev)
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EP_PCIE_DBG(dev, "Vreg %s is being disabled\n",
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dev->vreg[i].name);
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regulator_disable(dev->vreg[i].hdl);
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if (!strcmp(dev->vreg[i].name, "vreg-mx")) {
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EP_PCIE_DBG(dev, "PCIe V%d: Removing vote for %s.\n",
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dev->rev, dev->vreg[i].name);
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regulator_set_voltage(dev->vreg[i].hdl,
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RPMH_REGULATOR_LEVEL_RETENTION, RPMH_REGULATOR_LEVEL_MAX);
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}
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}
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}
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}
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@ -1803,8 +1803,10 @@ static void mhi_dev_process_cmd_ring(struct mhi_dev *mhi,
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return;
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}
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}
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mutex_lock(&mhi->ch[ch_id].ch_lock);
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mhi_dev_alloc_evt_buf_evt_req(mhi, &mhi->ch[ch_id],
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evt_ring);
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mutex_unlock(&mhi->ch[ch_id].ch_lock);
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}
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if (MHI_USE_DMA(mhi))
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@ -3429,8 +3431,14 @@ static void mhi_dev_enable(struct work_struct *work)
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pr_err("%s: get mhi state failed\n", __func__);
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return;
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}
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if (mhi_reset) {
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mhi_dev_mmio_clear_reset(mhi);
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mhi_log(MHI_MSG_VERBOSE,
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"Cleared reset before waiting for M0\n");
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}
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while (state != MHI_DEV_M0_STATE && max_cnt < MHI_SUSPEND_TIMEOUT) {
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while (state != MHI_DEV_M0_STATE &&
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((max_cnt < MHI_SUSPEND_TIMEOUT) || mhi->no_m0_timeout)) {
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/* Wait for Host to set the M0 state */
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msleep(MHI_SUSPEND_MIN);
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rc = mhi_dev_mmio_get_mhi_state(mhi, &state, &mhi_reset);
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@ -3438,6 +3446,11 @@ static void mhi_dev_enable(struct work_struct *work)
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pr_err("%s: get mhi state failed\n", __func__);
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return;
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}
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if (mhi_reset) {
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mhi_dev_mmio_clear_reset(mhi);
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mhi_log(MHI_MSG_VERBOSE,
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"Cleared reset while waiting for M0\n");
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}
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max_cnt++;
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}
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@ -3694,6 +3707,9 @@ static int get_device_tree_data(struct platform_device *pdev)
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mhi->enable_m2 = of_property_read_bool((&pdev->dev)->of_node,
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"qcom,enable-m2");
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mhi->no_m0_timeout = of_property_read_bool((&pdev->dev)->of_node,
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"qcom,no-m0-timeout");
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mhi_log(MHI_MSG_VERBOSE, "acquiring wakelock\n");
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return 0;
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@ -610,9 +610,13 @@ struct mhi_dev {
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/*Register for interrupt*/
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bool mhi_int;
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bool mhi_int_en;
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/* Enable M2 autonomous mode from MHI */
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bool enable_m2;
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/* Dont timeout waiting for M0 */
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bool no_m0_timeout;
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/* Registered client callback list */
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struct list_head client_cb_list;
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/* Tx, Rx DMA channels */
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@ -981,6 +985,12 @@ int mhi_dev_mmio_get_cmd_db(struct mhi_dev_ring *ring, uint64_t *wr_offset);
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*/
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int mhi_dev_mmio_set_env(struct mhi_dev *dev, uint32_t value);
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/**
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* mhi_dev_mmio_clear_reset() - Clear the reset bit
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* @dev: MHI device structure.
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*/
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int mhi_dev_mmio_clear_reset(struct mhi_dev *dev);
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/**
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* mhi_dev_mmio_reset() - Reset the MMIO done as part of initialization.
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* @dev: MHI device structure.
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (c) 2015,2017-2020, The Linux Foundation. All rights reserved.*/
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/* Copyright (c) 2015,2017-2021, The Linux Foundation. All rights reserved.*/
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#include <linux/kernel.h>
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#include <linux/of.h>
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@ -574,6 +574,18 @@ int mhi_dev_mmio_set_env(struct mhi_dev *dev, uint32_t value)
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}
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EXPORT_SYMBOL(mhi_dev_mmio_set_env);
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int mhi_dev_mmio_clear_reset(struct mhi_dev *dev)
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{
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if (WARN_ON(!dev))
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return -EINVAL;
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mhi_dev_mmio_masked_write(dev, MHICTRL,
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MHICTRL_RESET_MASK, MHICTRL_RESET_SHIFT, 0);
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return 0;
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}
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EXPORT_SYMBOL(mhi_dev_mmio_clear_reset);
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int mhi_dev_mmio_reset(struct mhi_dev *dev)
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{
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if (WARN_ON(!dev))
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.*/
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/* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.*/
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#include <linux/kernel.h>
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#include <linux/export.h>
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@ -1429,7 +1429,7 @@ void mhi_dev_sm_pcie_handler(struct ep_pcie_notify *notify)
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dstate_change_evt->event = event;
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INIT_WORK(&dstate_change_evt->work, mhi_sm_pcie_event_manager);
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queue_work(mhi_sm_ctx->mhi_sm_wq, &dstate_change_evt->work);
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queue_work(system_highpri_wq, &dstate_change_evt->work);
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atomic_inc(&mhi_sm_ctx->pending_pcie_events);
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exit:
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@ -1941,7 +1941,7 @@ static void mhi_uci_at_ctrl_tre_cb(struct mhi_dev_client_cb_reason *reason)
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static void mhi_uci_at_ctrl_client_cb(struct mhi_dev_client_cb_data *cb_data)
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{
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struct uci_client *client = cb_data->user_data;
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int rc;
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int rc, i;
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struct mhi_req *ureq;
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uci_log(UCI_DBG_VERBOSE, " Rcvd MHI cb for channel %d, state %d\n",
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@ -1980,6 +1980,12 @@ static void mhi_uci_at_ctrl_client_cb(struct mhi_dev_client_cb_data *cb_data)
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/* Add to in-use list */
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list_add_tail(&ureq->list, &client->req_list);
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}
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for (i = 0; i < (client->in_chan_attr->nr_trbs); i++) {
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kfree(client->in_buf_list[i].addr);
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client->in_buf_list[i].addr = NULL;
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client->in_buf_list[i].buf_size = 0;
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}
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}
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}
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