mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (407 commits) [ARM] pxafb: add support for overlay1 and overlay2 as framebuffer devices [ARM] pxafb: cleanup of the timing checking code [ARM] pxafb: cleanup of the color format manipulation code [ARM] pxafb: add palette format support for LCCR4_PAL_FOR_3 [ARM] pxafb: add support for FBIOPAN_DISPLAY by dma braching [ARM] pxafb: allow pxafb_set_par() to start from arbitrary yoffset [ARM] pxafb: allow video memory size to be configurable [ARM] pxa: add document on the MFP design and how to use it [ARM] sa1100_wdt: don't assume CLOCK_TICK_RATE to be a constant [ARM] rtc-sa1100: don't assume CLOCK_TICK_RATE to be a constant [ARM] pxa/tavorevb: update board support (smartpanel LCD + keypad) [ARM] pxa: Update eseries defconfig [ARM] 5352/1: add w90p910-plat config file [ARM] s3c: S3C options should depend on PLAT_S3C [ARM] mv78xx0: implement GPIO and GPIO interrupt support [ARM] Kirkwood: implement GPIO and GPIO interrupt support [ARM] Orion: share GPIO IRQ handling code [ARM] Orion: share GPIO handling code [ARM] s3c: define __io using the typesafe version [ARM] S3C64XX: Ensure CPU_V6 is selected ...
This commit is contained in:
Linus Torvalds
commit
14a3c4ab0e
819 changed files with 34925 additions and 10317 deletions
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@ -362,7 +362,7 @@ endchoice
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config FB_ACORN
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bool "Acorn VIDC support"
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depends on (FB = y) && ARM && (ARCH_ACORN || ARCH_CLPS7500)
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depends on (FB = y) && ARM && ARCH_ACORN
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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@ -1817,6 +1817,11 @@ config FB_PXA
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If unsure, say N.
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config FB_PXA_OVERLAY
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bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"
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default n
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depends on FB_PXA && (PXA27x || PXA3xx)
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config FB_PXA_SMARTPANEL
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bool "PXA Smartpanel LCD support"
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default n
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@ -343,14 +343,14 @@ static int clcdfb_register(struct clcd_fb *fb)
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{
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int ret;
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fb->clk = clk_get(&fb->dev->dev, "CLCDCLK");
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fb->clk = clk_get(&fb->dev->dev, NULL);
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if (IS_ERR(fb->clk)) {
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ret = PTR_ERR(fb->clk);
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goto out;
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}
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fb->fb.fix.mmio_start = fb->dev->res.start;
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fb->fb.fix.mmio_len = SZ_4K;
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fb->fb.fix.mmio_len = 4096;
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fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
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if (!fb->regs) {
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@ -1,6 +1,4 @@
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/*
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* linux/drivers/video/imxfb.c
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*
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* Freescale i.MX Frame Buffer device driver
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*
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* Copyright (C) 2004 Sascha Hauer, Pengutronix
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@ -16,7 +14,6 @@
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* linux-arm-kernel@lists.arm.linux.org.uk
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*/
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//#define DEBUG 1
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#include <linux/module.h>
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#include <linux/kernel.h>
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@ -32,9 +29,8 @@
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#include <linux/cpufreq.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/io.h>
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#include <mach/imxfb.h>
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/*
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@ -42,23 +38,150 @@
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*/
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#define DEBUG_VAR 1
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#include "imxfb.h"
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#define DRIVER_NAME "imx-fb"
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static struct imxfb_rgb def_rgb_16 = {
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.red = { .offset = 8, .length = 4, },
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.green = { .offset = 4, .length = 4, },
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.blue = { .offset = 0, .length = 4, },
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.transp = { .offset = 0, .length = 0, },
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#define LCDC_SSA 0x00
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#define LCDC_SIZE 0x04
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#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
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#define SIZE_YMAX(y) ((y) & 0x1ff)
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#define LCDC_VPW 0x08
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#define VPW_VPW(x) ((x) & 0x3ff)
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#define LCDC_CPOS 0x0C
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#define CPOS_CC1 (1<<31)
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#define CPOS_CC0 (1<<30)
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#define CPOS_OP (1<<28)
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#define CPOS_CXP(x) (((x) & 3ff) << 16)
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#define CPOS_CYP(y) ((y) & 0x1ff)
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#define LCDC_LCWHB 0x10
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#define LCWHB_BK_EN (1<<31)
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#define LCWHB_CW(w) (((w) & 0x1f) << 24)
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#define LCWHB_CH(h) (((h) & 0x1f) << 16)
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#define LCWHB_BD(x) ((x) & 0xff)
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#define LCDC_LCHCC 0x14
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#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11)
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#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5)
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#define LCHCC_CUR_COL_B(b) ((b) & 0x1f)
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#define LCDC_PCR 0x18
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#define LCDC_HCR 0x1C
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#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
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#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
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#define HCR_H_WAIT_2(x) ((x) & 0xff)
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#define LCDC_VCR 0x20
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#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
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#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
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#define VCR_V_WAIT_2(x) ((x) & 0xff)
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#define LCDC_POS 0x24
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#define POS_POS(x) ((x) & 1f)
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#define LCDC_LSCR1 0x28
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/* bit fields in imxfb.h */
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#define LCDC_PWMR 0x2C
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/* bit fields in imxfb.h */
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#define LCDC_DMACR 0x30
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/* bit fields in imxfb.h */
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#define LCDC_RMCR 0x34
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#define RMCR_LCDC_EN (1<<1)
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#define RMCR_SELF_REF (1<<0)
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#define LCDC_LCDICR 0x38
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#define LCDICR_INT_SYN (1<<2)
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#define LCDICR_INT_CON (1)
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#define LCDC_LCDISR 0x40
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#define LCDISR_UDR_ERR (1<<3)
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#define LCDISR_ERR_RES (1<<2)
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#define LCDISR_EOF (1<<1)
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#define LCDISR_BOF (1<<0)
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/*
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* These are the bitfields for each
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* display depth that we support.
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*/
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struct imxfb_rgb {
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struct fb_bitfield red;
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struct fb_bitfield green;
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struct fb_bitfield blue;
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struct fb_bitfield transp;
|
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};
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|
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struct imxfb_info {
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struct platform_device *pdev;
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void __iomem *regs;
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u_int max_bpp;
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u_int max_xres;
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u_int max_yres;
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/*
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* These are the addresses we mapped
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* the framebuffer memory region to.
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*/
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dma_addr_t map_dma;
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u_char *map_cpu;
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u_int map_size;
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u_char *screen_cpu;
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dma_addr_t screen_dma;
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u_int palette_size;
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dma_addr_t dbar1;
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dma_addr_t dbar2;
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u_int pcr;
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u_int pwmr;
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u_int lscr1;
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u_int dmacr;
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u_int cmap_inverse:1,
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cmap_static:1,
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unused:30;
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|
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void (*lcd_power)(int);
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void (*backlight_power)(int);
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};
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#define IMX_NAME "IMX"
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/*
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* Minimum X and Y resolutions
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*/
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#define MIN_XRES 64
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#define MIN_YRES 64
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static struct imxfb_rgb def_rgb_16_tft = {
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.red = {.offset = 11, .length = 5,},
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.green = {.offset = 5, .length = 6,},
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.blue = {.offset = 0, .length = 5,},
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.transp = {.offset = 0, .length = 0,},
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};
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static struct imxfb_rgb def_rgb_16_stn = {
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.red = {.offset = 8, .length = 4,},
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.green = {.offset = 4, .length = 4,},
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.blue = {.offset = 0, .length = 4,},
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.transp = {.offset = 0, .length = 0,},
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};
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static struct imxfb_rgb def_rgb_8 = {
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.red = { .offset = 0, .length = 8, },
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.green = { .offset = 0, .length = 8, },
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.blue = { .offset = 0, .length = 8, },
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.transp = { .offset = 0, .length = 0, },
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.red = {.offset = 0, .length = 8,},
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.green = {.offset = 0, .length = 8,},
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.blue = {.offset = 0, .length = 8,},
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.transp = {.offset = 0, .length = 0,},
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};
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static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info);
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static int imxfb_activate_var(struct fb_var_screeninfo *var,
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struct fb_info *info);
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static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
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{
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|
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@ -67,10 +190,8 @@ static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
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return chan << bf->offset;
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}
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#define LCDC_PALETTE(x) __REG2(IMX_LCDC_BASE+0x800, (x)<<2)
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static int
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imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
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u_int trans, struct fb_info *info)
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static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
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u_int trans, struct fb_info *info)
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{
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struct imxfb_info *fbi = info->par;
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u_int val, ret = 1;
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@ -81,14 +202,13 @@ imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
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(CNVT_TOHW(green,4) << 4) |
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CNVT_TOHW(blue, 4);
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LCDC_PALETTE(regno) = val;
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writel(val, fbi->regs + 0x800 + (regno << 2));
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ret = 0;
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}
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return ret;
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}
|
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|
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static int
|
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imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int trans, struct fb_info *info)
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{
|
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struct imxfb_info *fbi = info->par;
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|
|
@ -148,11 +268,10 @@ imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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* yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
|
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* bitfields, horizontal timing, vertical timing.
|
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*/
|
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static int
|
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imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
|
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static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
|
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{
|
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struct imxfb_info *fbi = info->par;
|
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int rgbidx;
|
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struct imxfb_rgb *rgb;
|
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|
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if (var->xres < MIN_XRES)
|
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var->xres = MIN_XRES;
|
||||
|
|
@ -168,23 +287,25 @@ imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
|
|||
pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
|
||||
switch (var->bits_per_pixel) {
|
||||
case 16:
|
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rgbidx = RGB_16;
|
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default:
|
||||
if (readl(fbi->regs + LCDC_PCR) & PCR_TFT)
|
||||
rgb = &def_rgb_16_tft;
|
||||
else
|
||||
rgb = &def_rgb_16_stn;
|
||||
break;
|
||||
case 8:
|
||||
rgbidx = RGB_8;
|
||||
rgb = &def_rgb_8;
|
||||
break;
|
||||
default:
|
||||
rgbidx = RGB_16;
|
||||
}
|
||||
|
||||
/*
|
||||
* Copy the RGB parameters for this display
|
||||
* from the machine specific parameters.
|
||||
*/
|
||||
var->red = fbi->rgb[rgbidx]->red;
|
||||
var->green = fbi->rgb[rgbidx]->green;
|
||||
var->blue = fbi->rgb[rgbidx]->blue;
|
||||
var->transp = fbi->rgb[rgbidx]->transp;
|
||||
var->red = rgb->red;
|
||||
var->green = rgb->green;
|
||||
var->blue = rgb->blue;
|
||||
var->transp = rgb->transp;
|
||||
|
||||
pr_debug("RGBT length = %d:%d:%d:%d\n",
|
||||
var->red.length, var->green.length, var->blue.length,
|
||||
|
|
@ -221,8 +342,7 @@ static int imxfb_set_par(struct fb_info *info)
|
|||
info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
|
||||
}
|
||||
|
||||
info->fix.line_length = var->xres_virtual *
|
||||
var->bits_per_pixel / 8;
|
||||
info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
|
||||
fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
|
||||
|
||||
imxfb_activate_var(var, info);
|
||||
|
|
@ -235,22 +355,27 @@ static void imxfb_enable_controller(struct imxfb_info *fbi)
|
|||
pr_debug("Enabling LCD controller\n");
|
||||
|
||||
/* initialize LCDC */
|
||||
LCDC_RMCR &= ~RMCR_LCDC_EN; /* just to be safe... */
|
||||
writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN,
|
||||
fbi->regs + LCDC_RMCR); /* just to be safe... */
|
||||
|
||||
writel(fbi->screen_dma, fbi->regs + LCDC_SSA);
|
||||
|
||||
LCDC_SSA = fbi->screen_dma;
|
||||
/* physical screen start address */
|
||||
LCDC_VPW = VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4);
|
||||
writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4),
|
||||
fbi->regs + LCDC_VPW);
|
||||
|
||||
LCDC_POS = 0x00000000; /* panning offset 0 (0 pixel offset) */
|
||||
/* panning offset 0 (0 pixel offset) */
|
||||
writel(0x00000000, fbi->regs + LCDC_POS);
|
||||
|
||||
/* disable hardware cursor */
|
||||
LCDC_CPOS &= ~(CPOS_CC0 | CPOS_CC1);
|
||||
writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
|
||||
fbi->regs + LCDC_CPOS);
|
||||
|
||||
LCDC_RMCR = RMCR_LCDC_EN;
|
||||
writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
|
||||
|
||||
if(fbi->backlight_power)
|
||||
if (fbi->backlight_power)
|
||||
fbi->backlight_power(1);
|
||||
if(fbi->lcd_power)
|
||||
if (fbi->lcd_power)
|
||||
fbi->lcd_power(1);
|
||||
}
|
||||
|
||||
|
|
@ -258,12 +383,12 @@ static void imxfb_disable_controller(struct imxfb_info *fbi)
|
|||
{
|
||||
pr_debug("Disabling LCD controller\n");
|
||||
|
||||
if(fbi->backlight_power)
|
||||
if (fbi->backlight_power)
|
||||
fbi->backlight_power(0);
|
||||
if(fbi->lcd_power)
|
||||
if (fbi->lcd_power)
|
||||
fbi->lcd_power(0);
|
||||
|
||||
LCDC_RMCR = 0;
|
||||
writel(0, fbi->regs + LCDC_RMCR);
|
||||
}
|
||||
|
||||
static int imxfb_blank(int blank, struct fb_info *info)
|
||||
|
|
@ -340,74 +465,26 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
|
|||
info->fix.id, var->lower_margin);
|
||||
#endif
|
||||
|
||||
LCDC_HCR = HCR_H_WIDTH(var->hsync_len) |
|
||||
HCR_H_WAIT_1(var->left_margin) |
|
||||
HCR_H_WAIT_2(var->right_margin);
|
||||
writel(HCR_H_WIDTH(var->hsync_len) |
|
||||
HCR_H_WAIT_1(var->right_margin) |
|
||||
HCR_H_WAIT_2(var->left_margin),
|
||||
fbi->regs + LCDC_HCR);
|
||||
|
||||
LCDC_VCR = VCR_V_WIDTH(var->vsync_len) |
|
||||
VCR_V_WAIT_1(var->upper_margin) |
|
||||
VCR_V_WAIT_2(var->lower_margin);
|
||||
writel(VCR_V_WIDTH(var->vsync_len) |
|
||||
VCR_V_WAIT_1(var->lower_margin) |
|
||||
VCR_V_WAIT_2(var->upper_margin),
|
||||
fbi->regs + LCDC_VCR);
|
||||
|
||||
LCDC_SIZE = SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres);
|
||||
LCDC_PCR = fbi->pcr;
|
||||
LCDC_PWMR = fbi->pwmr;
|
||||
LCDC_LSCR1 = fbi->lscr1;
|
||||
LCDC_DMACR = fbi->dmacr;
|
||||
writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres),
|
||||
fbi->regs + LCDC_SIZE);
|
||||
writel(fbi->pcr, fbi->regs + LCDC_PCR);
|
||||
writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
|
||||
writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
|
||||
writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void imxfb_setup_gpio(struct imxfb_info *fbi)
|
||||
{
|
||||
int width;
|
||||
|
||||
LCDC_RMCR &= ~(RMCR_LCDC_EN | RMCR_SELF_REF);
|
||||
|
||||
if( fbi->pcr & PCR_TFT )
|
||||
width = 16;
|
||||
else
|
||||
width = 1 << ((fbi->pcr >> 28) & 0x3);
|
||||
|
||||
switch(width) {
|
||||
case 16:
|
||||
imx_gpio_mode(PD30_PF_LD15);
|
||||
imx_gpio_mode(PD29_PF_LD14);
|
||||
imx_gpio_mode(PD28_PF_LD13);
|
||||
imx_gpio_mode(PD27_PF_LD12);
|
||||
imx_gpio_mode(PD26_PF_LD11);
|
||||
imx_gpio_mode(PD25_PF_LD10);
|
||||
imx_gpio_mode(PD24_PF_LD9);
|
||||
imx_gpio_mode(PD23_PF_LD8);
|
||||
case 8:
|
||||
imx_gpio_mode(PD22_PF_LD7);
|
||||
imx_gpio_mode(PD21_PF_LD6);
|
||||
imx_gpio_mode(PD20_PF_LD5);
|
||||
imx_gpio_mode(PD19_PF_LD4);
|
||||
case 4:
|
||||
imx_gpio_mode(PD18_PF_LD3);
|
||||
imx_gpio_mode(PD17_PF_LD2);
|
||||
case 2:
|
||||
imx_gpio_mode(PD16_PF_LD1);
|
||||
case 1:
|
||||
imx_gpio_mode(PD15_PF_LD0);
|
||||
}
|
||||
|
||||
/* initialize GPIOs */
|
||||
imx_gpio_mode(PD6_PF_LSCLK);
|
||||
imx_gpio_mode(PD11_PF_CONTRAST);
|
||||
imx_gpio_mode(PD14_PF_FLM_VSYNC);
|
||||
imx_gpio_mode(PD13_PF_LP_HSYNC);
|
||||
imx_gpio_mode(PD12_PF_ACD_OE);
|
||||
|
||||
/* These are only needed for Sharp HR TFT displays */
|
||||
if (fbi->pcr & PCR_SHARP) {
|
||||
imx_gpio_mode(PD7_PF_REV);
|
||||
imx_gpio_mode(PD8_PF_CLS);
|
||||
imx_gpio_mode(PD9_PF_PS);
|
||||
imx_gpio_mode(PD10_PF_SPL_SPR);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
/*
|
||||
* Power management hooks. Note that we won't be called from IRQ context,
|
||||
|
|
@ -416,7 +493,8 @@ static void imxfb_setup_gpio(struct imxfb_info *fbi)
|
|||
static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
|
||||
{
|
||||
struct imxfb_info *fbi = platform_get_drvdata(dev);
|
||||
pr_debug("%s\n",__func__);
|
||||
|
||||
pr_debug("%s\n", __func__);
|
||||
|
||||
imxfb_disable_controller(fbi);
|
||||
return 0;
|
||||
|
|
@ -425,7 +503,8 @@ static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
|
|||
static int imxfb_resume(struct platform_device *dev)
|
||||
{
|
||||
struct imxfb_info *fbi = platform_get_drvdata(dev);
|
||||
pr_debug("%s\n",__func__);
|
||||
|
||||
pr_debug("%s\n", __func__);
|
||||
|
||||
imxfb_enable_controller(fbi);
|
||||
return 0;
|
||||
|
|
@ -435,149 +514,136 @@ static int imxfb_resume(struct platform_device *dev)
|
|||
#define imxfb_resume NULL
|
||||
#endif
|
||||
|
||||
static int __init imxfb_init_fbinfo(struct device *dev)
|
||||
static int __init imxfb_init_fbinfo(struct platform_device *pdev)
|
||||
{
|
||||
struct imxfb_mach_info *inf = dev->platform_data;
|
||||
struct fb_info *info = dev_get_drvdata(dev);
|
||||
struct imx_fb_platform_data *pdata = pdev->dev.platform_data;
|
||||
struct fb_info *info = dev_get_drvdata(&pdev->dev);
|
||||
struct imxfb_info *fbi = info->par;
|
||||
|
||||
pr_debug("%s\n",__func__);
|
||||
|
||||
info->pseudo_palette = kmalloc( sizeof(u32) * 16, GFP_KERNEL);
|
||||
info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
|
||||
if (!info->pseudo_palette)
|
||||
return -ENOMEM;
|
||||
|
||||
memset(fbi, 0, sizeof(struct imxfb_info));
|
||||
fbi->dev = dev;
|
||||
|
||||
strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
|
||||
|
||||
info->fix.type = FB_TYPE_PACKED_PIXELS;
|
||||
info->fix.type = FB_TYPE_PACKED_PIXELS;
|
||||
info->fix.type_aux = 0;
|
||||
info->fix.xpanstep = 0;
|
||||
info->fix.ypanstep = 0;
|
||||
info->fix.ywrapstep = 0;
|
||||
info->fix.accel = FB_ACCEL_NONE;
|
||||
info->fix.accel = FB_ACCEL_NONE;
|
||||
|
||||
info->var.nonstd = 0;
|
||||
info->var.activate = FB_ACTIVATE_NOW;
|
||||
info->var.height = -1;
|
||||
info->var.width = -1;
|
||||
info->var.accel_flags = 0;
|
||||
info->var.vmode = FB_VMODE_NONINTERLACED;
|
||||
info->var.vmode = FB_VMODE_NONINTERLACED;
|
||||
|
||||
info->fbops = &imxfb_ops;
|
||||
info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST;
|
||||
info->flags = FBINFO_FLAG_DEFAULT |
|
||||
FBINFO_READS_FAST;
|
||||
|
||||
fbi->rgb[RGB_16] = &def_rgb_16;
|
||||
fbi->rgb[RGB_8] = &def_rgb_8;
|
||||
|
||||
fbi->max_xres = inf->xres;
|
||||
info->var.xres = inf->xres;
|
||||
info->var.xres_virtual = inf->xres;
|
||||
fbi->max_yres = inf->yres;
|
||||
info->var.yres = inf->yres;
|
||||
info->var.yres_virtual = inf->yres;
|
||||
fbi->max_bpp = inf->bpp;
|
||||
info->var.bits_per_pixel = inf->bpp;
|
||||
info->var.nonstd = inf->nonstd;
|
||||
info->var.pixclock = inf->pixclock;
|
||||
info->var.hsync_len = inf->hsync_len;
|
||||
info->var.left_margin = inf->left_margin;
|
||||
info->var.right_margin = inf->right_margin;
|
||||
info->var.vsync_len = inf->vsync_len;
|
||||
info->var.upper_margin = inf->upper_margin;
|
||||
info->var.lower_margin = inf->lower_margin;
|
||||
info->var.sync = inf->sync;
|
||||
info->var.grayscale = inf->cmap_greyscale;
|
||||
fbi->cmap_inverse = inf->cmap_inverse;
|
||||
fbi->cmap_static = inf->cmap_static;
|
||||
fbi->pcr = inf->pcr;
|
||||
fbi->lscr1 = inf->lscr1;
|
||||
fbi->dmacr = inf->dmacr;
|
||||
fbi->pwmr = inf->pwmr;
|
||||
fbi->lcd_power = inf->lcd_power;
|
||||
fbi->backlight_power = inf->backlight_power;
|
||||
fbi->max_xres = pdata->xres;
|
||||
info->var.xres = pdata->xres;
|
||||
info->var.xres_virtual = pdata->xres;
|
||||
fbi->max_yres = pdata->yres;
|
||||
info->var.yres = pdata->yres;
|
||||
info->var.yres_virtual = pdata->yres;
|
||||
fbi->max_bpp = pdata->bpp;
|
||||
info->var.bits_per_pixel = pdata->bpp;
|
||||
info->var.nonstd = pdata->nonstd;
|
||||
info->var.pixclock = pdata->pixclock;
|
||||
info->var.hsync_len = pdata->hsync_len;
|
||||
info->var.left_margin = pdata->left_margin;
|
||||
info->var.right_margin = pdata->right_margin;
|
||||
info->var.vsync_len = pdata->vsync_len;
|
||||
info->var.upper_margin = pdata->upper_margin;
|
||||
info->var.lower_margin = pdata->lower_margin;
|
||||
info->var.sync = pdata->sync;
|
||||
info->var.grayscale = pdata->cmap_greyscale;
|
||||
fbi->cmap_inverse = pdata->cmap_inverse;
|
||||
fbi->cmap_static = pdata->cmap_static;
|
||||
fbi->pcr = pdata->pcr;
|
||||
fbi->lscr1 = pdata->lscr1;
|
||||
fbi->dmacr = pdata->dmacr;
|
||||
fbi->pwmr = pdata->pwmr;
|
||||
fbi->lcd_power = pdata->lcd_power;
|
||||
fbi->backlight_power = pdata->backlight_power;
|
||||
info->fix.smem_len = fbi->max_xres * fbi->max_yres *
|
||||
fbi->max_bpp / 8;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocates the DRAM memory for the frame buffer. This buffer is
|
||||
* remapped into a non-cached, non-buffered, memory region to
|
||||
* allow pixel writes to occur without flushing the cache.
|
||||
* Once this area is remapped, all virtual memory access to the
|
||||
* video memory should occur at the new region.
|
||||
*/
|
||||
static int __init imxfb_map_video_memory(struct fb_info *info)
|
||||
{
|
||||
struct imxfb_info *fbi = info->par;
|
||||
|
||||
fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
|
||||
fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size,
|
||||
&fbi->map_dma,GFP_KERNEL);
|
||||
|
||||
if (fbi->map_cpu) {
|
||||
info->screen_base = fbi->map_cpu;
|
||||
fbi->screen_cpu = fbi->map_cpu;
|
||||
fbi->screen_dma = fbi->map_dma;
|
||||
info->fix.smem_start = fbi->screen_dma;
|
||||
}
|
||||
|
||||
return fbi->map_cpu ? 0 : -ENOMEM;
|
||||
}
|
||||
|
||||
static int __init imxfb_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct imxfb_info *fbi;
|
||||
struct fb_info *info;
|
||||
struct imxfb_mach_info *inf;
|
||||
struct imx_fb_platform_data *pdata;
|
||||
struct resource *res;
|
||||
int ret;
|
||||
|
||||
printk("i.MX Framebuffer driver\n");
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if(!res)
|
||||
if (!res)
|
||||
return -ENODEV;
|
||||
|
||||
inf = pdev->dev.platform_data;
|
||||
if(!inf) {
|
||||
pdata = pdev->dev.platform_data;
|
||||
if (!pdata) {
|
||||
dev_err(&pdev->dev,"No platform_data available\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
|
||||
if(!info)
|
||||
if (!info)
|
||||
return -ENOMEM;
|
||||
|
||||
fbi = info->par;
|
||||
|
||||
platform_set_drvdata(pdev, info);
|
||||
|
||||
ret = imxfb_init_fbinfo(&pdev->dev);
|
||||
if( ret < 0 )
|
||||
ret = imxfb_init_fbinfo(pdev);
|
||||
if (ret < 0)
|
||||
goto failed_init;
|
||||
|
||||
res = request_mem_region(res->start, res->end - res->start + 1, "IMXFB");
|
||||
res = request_mem_region(res->start, resource_size(res),
|
||||
DRIVER_NAME);
|
||||
if (!res) {
|
||||
ret = -EBUSY;
|
||||
goto failed_regs;
|
||||
goto failed_req;
|
||||
}
|
||||
|
||||
if (!inf->fixed_screen_cpu) {
|
||||
ret = imxfb_map_video_memory(info);
|
||||
if (ret) {
|
||||
fbi->regs = ioremap(res->start, resource_size(res));
|
||||
if (fbi->regs == NULL) {
|
||||
printk(KERN_ERR"Cannot map frame buffer registers\n");
|
||||
goto failed_ioremap;
|
||||
}
|
||||
|
||||
if (!pdata->fixed_screen_cpu) {
|
||||
fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
|
||||
fbi->map_cpu = dma_alloc_writecombine(&pdev->dev,
|
||||
fbi->map_size, &fbi->map_dma, GFP_KERNEL);
|
||||
|
||||
if (!fbi->map_cpu) {
|
||||
dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret);
|
||||
ret = -ENOMEM;
|
||||
goto failed_map;
|
||||
}
|
||||
|
||||
info->screen_base = fbi->map_cpu;
|
||||
fbi->screen_cpu = fbi->map_cpu;
|
||||
fbi->screen_dma = fbi->map_dma;
|
||||
info->fix.smem_start = fbi->screen_dma;
|
||||
} else {
|
||||
/* Fixed framebuffer mapping enables location of the screen in eSRAM */
|
||||
fbi->map_cpu = inf->fixed_screen_cpu;
|
||||
fbi->map_dma = inf->fixed_screen_dma;
|
||||
fbi->map_cpu = pdata->fixed_screen_cpu;
|
||||
fbi->map_dma = pdata->fixed_screen_dma;
|
||||
info->screen_base = fbi->map_cpu;
|
||||
fbi->screen_cpu = fbi->map_cpu;
|
||||
fbi->screen_dma = fbi->map_dma;
|
||||
|
|
@ -590,12 +656,10 @@ static int __init imxfb_probe(struct platform_device *pdev)
|
|||
*/
|
||||
imxfb_check_var(&info->var, info);
|
||||
|
||||
ret = fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0);
|
||||
ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0);
|
||||
if (ret < 0)
|
||||
goto failed_cmap;
|
||||
|
||||
imxfb_setup_gpio(fbi);
|
||||
|
||||
imxfb_set_par(info);
|
||||
ret = register_framebuffer(info);
|
||||
if (ret < 0) {
|
||||
|
|
@ -610,20 +674,22 @@ static int __init imxfb_probe(struct platform_device *pdev)
|
|||
failed_register:
|
||||
fb_dealloc_cmap(&info->cmap);
|
||||
failed_cmap:
|
||||
if (!inf->fixed_screen_cpu)
|
||||
if (!pdata->fixed_screen_cpu)
|
||||
dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu,
|
||||
fbi->map_dma);
|
||||
fbi->map_dma);
|
||||
failed_map:
|
||||
kfree(info->pseudo_palette);
|
||||
failed_regs:
|
||||
iounmap(fbi->regs);
|
||||
failed_ioremap:
|
||||
release_mem_region(res->start, res->end - res->start);
|
||||
failed_req:
|
||||
kfree(info->pseudo_palette);
|
||||
failed_init:
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
framebuffer_release(info);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int imxfb_remove(struct platform_device *pdev)
|
||||
static int __devexit imxfb_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct fb_info *info = platform_get_drvdata(pdev);
|
||||
struct imxfb_info *fbi = info->par;
|
||||
|
|
@ -639,6 +705,7 @@ static int imxfb_remove(struct platform_device *pdev)
|
|||
kfree(info->pseudo_palette);
|
||||
framebuffer_release(info);
|
||||
|
||||
iounmap(fbi->regs);
|
||||
release_mem_region(res->start, res->end - res->start + 1);
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
|
|
@ -653,19 +720,18 @@ void imxfb_shutdown(struct platform_device * dev)
|
|||
}
|
||||
|
||||
static struct platform_driver imxfb_driver = {
|
||||
.probe = imxfb_probe,
|
||||
.suspend = imxfb_suspend,
|
||||
.resume = imxfb_resume,
|
||||
.remove = imxfb_remove,
|
||||
.remove = __devexit_p(imxfb_remove),
|
||||
.shutdown = imxfb_shutdown,
|
||||
.driver = {
|
||||
.name = "imx-fb",
|
||||
.name = DRIVER_NAME,
|
||||
},
|
||||
};
|
||||
|
||||
int __init imxfb_init(void)
|
||||
{
|
||||
return platform_driver_register(&imxfb_driver);
|
||||
return platform_driver_probe(&imxfb_driver, imxfb_probe);
|
||||
}
|
||||
|
||||
static void __exit imxfb_cleanup(void)
|
||||
|
|
|
|||
|
|
@ -1,73 +0,0 @@
|
|||
/*
|
||||
* linux/drivers/video/imxfb.h
|
||||
*
|
||||
* Freescale i.MX Frame Buffer device driver
|
||||
*
|
||||
* Copyright (C) 2004 S.Hauer, Pengutronix
|
||||
*
|
||||
* Copyright (C) 1999 Eric A. Thomas
|
||||
* Based on acornfb.c Copyright (C) Russell King.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file COPYING in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
/*
|
||||
* These are the bitfields for each
|
||||
* display depth that we support.
|
||||
*/
|
||||
struct imxfb_rgb {
|
||||
struct fb_bitfield red;
|
||||
struct fb_bitfield green;
|
||||
struct fb_bitfield blue;
|
||||
struct fb_bitfield transp;
|
||||
};
|
||||
|
||||
#define RGB_16 (0)
|
||||
#define RGB_8 (1)
|
||||
#define NR_RGB 2
|
||||
|
||||
struct imxfb_info {
|
||||
struct device *dev;
|
||||
struct imxfb_rgb *rgb[NR_RGB];
|
||||
|
||||
u_int max_bpp;
|
||||
u_int max_xres;
|
||||
u_int max_yres;
|
||||
|
||||
/*
|
||||
* These are the addresses we mapped
|
||||
* the framebuffer memory region to.
|
||||
*/
|
||||
dma_addr_t map_dma;
|
||||
u_char * map_cpu;
|
||||
u_int map_size;
|
||||
|
||||
u_char * screen_cpu;
|
||||
dma_addr_t screen_dma;
|
||||
u_int palette_size;
|
||||
|
||||
dma_addr_t dbar1;
|
||||
dma_addr_t dbar2;
|
||||
|
||||
u_int pcr;
|
||||
u_int pwmr;
|
||||
u_int lscr1;
|
||||
u_int dmacr;
|
||||
u_int cmap_inverse:1,
|
||||
cmap_static:1,
|
||||
unused:30;
|
||||
|
||||
void (*lcd_power)(int);
|
||||
void (*backlight_power)(int);
|
||||
};
|
||||
|
||||
#define IMX_NAME "IMX"
|
||||
|
||||
/*
|
||||
* Minimum X and Y resolutions
|
||||
*/
|
||||
#define MIN_XRES 64
|
||||
#define MIN_YRES 64
|
||||
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -54,11 +54,55 @@ enum {
|
|||
#define PALETTE_SIZE (256 * 4)
|
||||
#define CMD_BUFF_SIZE (1024 * 50)
|
||||
|
||||
/* NOTE: the palette and frame dma descriptors are doubled to allow
|
||||
* the 2nd set for branch settings (FBRx)
|
||||
*/
|
||||
struct pxafb_dma_buff {
|
||||
unsigned char palette[PAL_MAX * PALETTE_SIZE];
|
||||
uint16_t cmd_buff[CMD_BUFF_SIZE];
|
||||
struct pxafb_dma_descriptor pal_desc[PAL_MAX];
|
||||
struct pxafb_dma_descriptor dma_desc[DMA_MAX];
|
||||
struct pxafb_dma_descriptor pal_desc[PAL_MAX * 2];
|
||||
struct pxafb_dma_descriptor dma_desc[DMA_MAX * 2];
|
||||
};
|
||||
|
||||
enum {
|
||||
OVERLAY1,
|
||||
OVERLAY2,
|
||||
};
|
||||
|
||||
enum {
|
||||
OVERLAY_FORMAT_RGB = 0,
|
||||
OVERLAY_FORMAT_YUV444_PACKED,
|
||||
OVERLAY_FORMAT_YUV444_PLANAR,
|
||||
OVERLAY_FORMAT_YUV422_PLANAR,
|
||||
OVERLAY_FORMAT_YUV420_PLANAR,
|
||||
};
|
||||
|
||||
#define NONSTD_TO_XPOS(x) (((x) >> 0) & 0x3ff)
|
||||
#define NONSTD_TO_YPOS(x) (((x) >> 10) & 0x3ff)
|
||||
#define NONSTD_TO_PFOR(x) (((x) >> 20) & 0x7)
|
||||
|
||||
struct pxafb_layer;
|
||||
|
||||
struct pxafb_layer_ops {
|
||||
void (*enable)(struct pxafb_layer *);
|
||||
void (*disable)(struct pxafb_layer *);
|
||||
void (*setup)(struct pxafb_layer *);
|
||||
};
|
||||
|
||||
struct pxafb_layer {
|
||||
struct fb_info fb;
|
||||
int id;
|
||||
atomic_t usage;
|
||||
uint32_t control[2];
|
||||
|
||||
struct pxafb_layer_ops *ops;
|
||||
|
||||
void __iomem *video_mem;
|
||||
unsigned long video_mem_phys;
|
||||
size_t video_mem_size;
|
||||
struct completion branch_done;
|
||||
|
||||
struct pxafb_info *fbi;
|
||||
};
|
||||
|
||||
struct pxafb_info {
|
||||
|
|
@ -69,24 +113,15 @@ struct pxafb_info {
|
|||
void __iomem *mmio_base;
|
||||
|
||||
struct pxafb_dma_buff *dma_buff;
|
||||
size_t dma_buff_size;
|
||||
dma_addr_t dma_buff_phys;
|
||||
dma_addr_t fdadr[DMA_MAX];
|
||||
dma_addr_t fdadr[DMA_MAX * 2];
|
||||
|
||||
/*
|
||||
* These are the addresses we mapped
|
||||
* the framebuffer memory region to.
|
||||
*/
|
||||
/* raw memory addresses */
|
||||
dma_addr_t map_dma; /* physical */
|
||||
u_char * map_cpu; /* virtual */
|
||||
u_int map_size;
|
||||
|
||||
/* addresses of pieces placed in raw buffer */
|
||||
u_char * screen_cpu; /* virtual address of frame buffer */
|
||||
dma_addr_t screen_dma; /* physical address of frame buffer */
|
||||
void __iomem *video_mem; /* virtual address of frame buffer */
|
||||
unsigned long video_mem_phys; /* physical address of frame buffer */
|
||||
size_t video_mem_size; /* size of the frame buffer */
|
||||
u16 * palette_cpu; /* virtual address of palette memory */
|
||||
u_int palette_size;
|
||||
ssize_t video_offset;
|
||||
|
||||
u_int lccr0;
|
||||
u_int lccr3;
|
||||
|
|
@ -120,10 +155,17 @@ struct pxafb_info {
|
|||
struct task_struct *smart_thread;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FB_PXA_OVERLAY
|
||||
struct pxafb_layer overlay[2];
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
struct notifier_block freq_transition;
|
||||
struct notifier_block freq_policy;
|
||||
#endif
|
||||
|
||||
void (*lcd_power)(int, struct fb_var_screeninfo *);
|
||||
void (*backlight_power)(int);
|
||||
};
|
||||
|
||||
#define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member)
|
||||
|
|
@ -148,4 +190,10 @@ struct pxafb_info {
|
|||
#define MIN_XRES 64
|
||||
#define MIN_YRES 64
|
||||
|
||||
/* maximum X and Y resolutions - note these are limits from the register
|
||||
* bits length instead of the real ones
|
||||
*/
|
||||
#define MAX_XRES 1024
|
||||
#define MAX_YRES 1024
|
||||
|
||||
#endif /* __PXAFB_H__ */
|
||||
|
|
|
|||
|
|
@ -114,7 +114,7 @@
|
|||
* - convert dma address types to dma_addr_t
|
||||
* - remove unused 'montype' stuff
|
||||
* - remove redundant zero inits of init_var after the initial
|
||||
* memzero.
|
||||
* memset.
|
||||
* - remove allow_modeset (acornfb idea does not belong here)
|
||||
*
|
||||
* 2001/05/28: <rmk@arm.linux.org.uk>
|
||||
|
|
|
|||
Loading…
Reference in a new issue