A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Add support for USB secondary clocks for YUPIK IOT"

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This commit is contained in:
qctecmdr 2021-04-05 05:37:30 -07:00 • committed by Gerrit - the friendly Code Review server
commit 14b63aa96e
2 changed files with 9 additions and 7 deletions
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12
qcom/yupik-iot-qrd.dtsi
View file

@ -21,13 +21,7 @@
<GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>,
<GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
<GCC_PCIE_THROTTLE_CORE_CLK>, <GCC_THROTTLE_PCIE_AHB_CLK>,
<GCC_AGGRE_USB3_SEC_AXI_CLK>, <GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
<GCC_USB30_SEC_MASTER_CLK>, <GCC_USB30_SEC_MASTER_CLK_SRC>,
<GCC_USB30_SEC_MOCK_UTMI_CLK>, <GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>,
<GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>,
<GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>,
<GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>,
<GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
<GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
<GCC_AGGRE_NOC_PCIE_TBU_CLK>, <GCC_PCIE_CLKREF_EN>;
};
@ -38,3 +32,7 @@
&gcc_pcie_1_gdsc {
status = "disabled";
};
&gcc_usb30_sec_gdsc {
status = "ok"
};

4
qcom/yupik-iot.dtsi
View file

@ -24,3 +24,7 @@
&gcc_pcie_1_gdsc {
status = "ok"
};
&gcc_usb30_sec_gdsc {
status = "ok"
};