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fw-api: CL 13109979 - update fw common interface files
HTT stats: add PHY_RESET COUNTERS,STATS TLV defs Change-Id: Ifb0a2d3bfa33a58876c2a630dcc913dd6bf98bed CRs-Fixed: 2262693
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spuligil
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1 changed files with 157 additions and 0 deletions
157
fw/htt_stats.h
157
fw/htt_stats.h
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@ -540,6 +540,8 @@ typedef enum {
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HTT_STATS_DLPAGER_STATS_TAG = 120, /* htt_dlpager_stats_tlv */
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HTT_STATS_PHY_COUNTERS_TAG = 121, /* htt_phy_counters_tlv */
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HTT_STATS_PHY_STATS_TAG = 122, /* htt_phy_stats_tlv */
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HTT_STATS_PHY_RESET_COUNTERS_TAG = 123, /* htt_phy_reset_counters_tlv */
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HTT_STATS_PHY_RESET_STATS_TAG = 124, /* htt_phy_reset_stats_tlv */
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HTT_STATS_MAX_TAG,
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@ -5392,6 +5394,63 @@ typedef struct {
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#define HTT_MAX_PER_BLK_ERR_CNT 20
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#define HTT_MAX_RX_OTA_ERR_CNT 14
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typedef enum {
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HTT_STATS_CHANNEL_HALF_RATE = 0x0001, /* Half rate */
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HTT_STATS_CHANNEL_QUARTER_RATE = 0x0002, /* Quarter rate */
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HTT_STATS_CHANNEL_DFS = 0x0004, /* Enable radar event reporting */
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HTT_STATS_CHANNEL_HOME = 0x0008, /* Home channel */
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HTT_STATS_CHANNEL_PASSIVE_SCAN = 0x0010, /*Passive Scan */
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HTT_STATS_CHANNEL_DFS_SAP_NOT_UP = 0x0020, /* set when VDEV_START_REQUEST, clear when VDEV_UP */
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HTT_STATS_CHANNEL_PASSIVE_SCAN_CAL = 0x0040, /* need to do passive scan calibration to avoid "spikes" */
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HTT_STATS_CHANNEL_DFS_SAP_UP = 0x0080, /* DFS master */
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HTT_STATS_CHANNEL_DFS_CFREQ2 = 0x0100, /* Enable radar event reporting for sec80 in VHT80p80 */
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HTT_STATS_CHANNEL_DTIM_SYNTH = 0x0200, /* Enable DTIM */
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HTT_STATS_CHANNEL_FORCE_GAIN = 0x0400, /* Force gain mmode (only used for FTM) */
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HTT_STATS_CHANNEL_PERFORM_NF_CAL = 0x0800, /* Perform NF cal in channel change (only used for FTM) */
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HTT_STATS_CHANNEL_165_MODE_0 = 0x1000, /* 165 MHz mode 0 */
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HTT_STATS_CHANNEL_165_MODE_1 = 0x2000, /* 165 MHz mode 1 */
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HTT_STATS_CHANNEL_165_MODE_2 = 0x3000, /* 165 MHz mode 2 */
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HTT_STATS_CHANNEL_165_MODE_MASK = 0x3000, /* 165 MHz 2-bit mode mask */
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} HTT_STATS_CHANNEL_FLAGS;
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typedef enum {
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HTT_STATS_RF_MODE_MIN = 0,
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HTT_STATS_RF_MODE_PHYA_ONLY = 0, // only PHYA is active
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HTT_STATS_RF_MODE_DBS = 1, // PHYA/5G and PHYB/2G
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HTT_STATS_RF_MODE_SBS = 2, // PHYA/5G and PHYB/5G in HL/NPR; PHYA0/5G and PHYA1/5G in HK
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HTT_STATS_RF_MODE_PHYB_ONLY = 3, // only PHYB is active
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HTT_STATS_RF_MODE_DBS_SBS = 4, // PHYA0/5G, PHYA1/5G and PHYB/2G in HK (the 2 5G are in different channel)
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HTT_STATS_RF_MODE_DBS_OR_SBS = 5, // PHYA0/5G, PHYA1/5G and PHYB/5G or 2G in HK
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HTT_STATS_RF_MODE_INVALID = 0xff,
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} HTT_STATS_RF_MODE;
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typedef enum {
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HTT_STATS_RESET_CAUSE_FIRST_RESET = 0x00000001, /* First reset by application */
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HTT_STATS_RESET_CAUSE_ERROR = 0x00000002, /* Trigered due to error */
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HTT_STATS_RESET_CAUSE_DEEP_SLEEP = 0x00000004, /* Reset after deep sleep */
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HTT_STATS_RESET_CAUSE_FULL_RESET = 0x00000008, /* Full reset without any optimizations */
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HTT_STATS_RESET_CAUSE_CHANNEL_CHANGE = 0x00000010, /* For normal channel change */
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HTT_STATS_RESET_CAUSE_BAND_CHANGE = 0x00000020, /* Trigered due to band change */
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HTT_STATS_RESET_CAUSE_DO_CAL = 0x00000040, /* Trigered due to calibrations */
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HTT_STATS_RESET_CAUSE_MCI_ERROR = 0x00000080, /* Triggered due to MCI ERROR */
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HTT_STATS_RESET_CAUSE_CHWIDTH_CHANGE = 0x00000100, /* Trigered due to channel width change */
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HTT_STATS_RESET_CAUSE_WARM_RESTORE_CAL = 0x00000200, /* Trigered due to warm reset we want to just restore calibrations */
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HTT_STATS_RESET_CAUSE_COLD_RESTORE_CAL = 0x00000400, /* Trigered due to cold reset we want to just restore calibrations */
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HTT_STATS_RESET_CAUSE_PHY_WARM_RESET = 0x00000800, /* Trigered due to phy warm reset we want to just restore calibrations */
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HTT_STATS_RESET_CAUSE_M3_SSR = 0x00001000, /* Trigered due to SSR Restart */
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HTT_STATS_RESET_CAUSE_FORCE_CAL = 0x00002000, /* Reset to force the calibration */
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/* 0x00004000, 0x00008000 reserved */
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HTT_STATS_NO_RESET_CHANNEL_CHANGE = 0x00010000, /* No reset, normal channel change */
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HTT_STATS_NO_RESET_BAND_CHANGE = 0x00020000, /* No reset, channel change across band */
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HTT_STATS_NO_RESET_CHWIDTH_CHANGE = 0x00040000, /* No reset, channel change across channel width */
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HTT_STATS_NO_RESET_CHAINMASK_CHANGE = 0x00080000, /* No reset, chainmask change */
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HTT_STATS_RESET_CAUSE_PHY_WARM_RESET_UCODE_TRIG = 0x00100000, /* Trigered due to phy warm reset we want to just restore calibrations */
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HTT_STATS_RESET_CAUSE_PHY_OFF_TIMEOUT_RESET = 0x00200000, /* Reset ucode because phy off ack timeout*/
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HTT_STATS_RESET_CAUSE_LMAC_RESET_UMAC_NOC_ERR = 0x00400000, /* LMAC reset trigered due to NOC Address/Slave error originating at LMAC */
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HTT_STATS_NO_RESET_SCAN_BACK_TO_SAME_HOME_CHANNEL_CHANGE = 0x00800000, /* No reset, scan to home channel change */
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} HTT_STATS_RESET_CAUSE;
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typedef struct {
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htt_tlv_hdr_t tlv_hdr;
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/* number of RXTD OFDMA OTA error counts except power surge and drop */
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@ -5462,8 +5521,104 @@ typedef struct {
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A_INT32 ani_level;
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/* running time in minutes since FW boot */
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A_UINT32 fw_run_time;
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/* per chain runtime noise floor values in dBm */
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A_INT32 runTime_nf_chain[HTT_STATS_MAX_CHAINS];
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} htt_phy_stats_tlv;
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typedef struct {
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htt_tlv_hdr_t tlv_hdr;
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/* current pdev_id */
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A_UINT32 pdev_id;
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/* current channel information */
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A_UINT32 chan_mhz;
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/* center_freq1, center_freq2 in mhz */
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A_UINT32 chan_band_center_freq1;
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A_UINT32 chan_band_center_freq2;
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/* chan_phy_mode - WLAN_PHY_MODE enum type */
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A_UINT32 chan_phy_mode;
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/* chan_flags follows HTT_STATS_CHANNEL_FLAGS enum */
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A_UINT32 chan_flags;
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/* channel Num updated to virtual phybase */
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A_UINT32 chan_num;
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/* Cause for the phy reset - HTT_STATS_RESET_CAUSE */
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A_UINT32 reset_cause;
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/* Cause for the previous phy reset */
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A_UINT32 prev_reset_cause;
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/* source for the phywarm reset - HTT_STATS_RESET_CAUSE */
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A_UINT32 phy_warm_reset_src;
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/* rxGain Table selection mode - register settings
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* 0 - Auto, 1/2 - Forced with and without BT override respectively
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*/
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A_UINT32 rx_gain_tbl_mode;
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/* current xbar value - perchain analog to digital idx mapping */
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A_UINT32 xbar_val;
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/* Flag to indicate forced calibration */
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A_UINT32 force_calibration;
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/* current RF mode (e.g. SBS/DBS) - follows HTT_STATS_RF_MODE enum */
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A_UINT32 phyrf_mode;
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/* PDL phyInput stats */
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/* homechannel flag
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* 1- Homechan, 0 - scan channel
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*/
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A_UINT32 phy_homechan;
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/* Tx and Rx chainmask */
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A_UINT32 phy_tx_ch_mask;
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A_UINT32 phy_rx_ch_mask;
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/* INI masks - to decide the INI registers to be loaded on a reset */
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A_UINT32 phybb_ini_mask;
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A_UINT32 phyrf_ini_mask;
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/* DFS,ADFS/Spectral scan enable masks */
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A_UINT32 phy_dfs_en_mask;
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A_UINT32 phy_sscan_en_mask;
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A_UINT32 phy_synth_sel_mask;
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A_UINT32 phy_adfs_freq;
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/* CCK FIR settings
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* register settings - filter coefficients for Iqs conversion
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* [31:24] = FIR_COEFF_3_0
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* [23:16] = FIR_COEFF_2_0
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* [15:8] = FIR_COEFF_1_0
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* [7:0] = FIR_COEFF_0_0
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*/
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A_UINT32 cck_fir_settings;
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/* dynamic primary channel index
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* primary 20MHz channel index on the current channel BW
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*/
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A_UINT32 phy_dyn_pri_chan;
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/* Current CCA detection threshold
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* dB above noisefloor req for CCA
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* Register settings for all subbands
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*/
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A_UINT32 cca_thresh;
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/* status for dynamic CCA adjustment
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* 0-disabled, 1-enabled
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*/
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A_UINT32 dyn_cca_status;
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} htt_phy_reset_stats_tlv;
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typedef struct {
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htt_tlv_hdr_t tlv_hdr;
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/* current pdev_id */
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A_UINT32 pdev_id;
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/* ucode PHYOFF pass/failure count */
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A_UINT32 cf_active_low_fail_cnt;
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A_UINT32 cf_active_low_pass_cnt;
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/* PHYOFF count attempted through ucode VREG */
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A_UINT32 phy_off_through_vreg_cnt;
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/* Force calibration count */
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A_UINT32 force_calibration_cnt;
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/* phyoff count during rfmode switch */
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A_UINT32 rf_mode_switch_phy_off_cnt;
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} htt_phy_reset_counters_tlv;
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/* NOTE:
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* This structure is for documentation, and cannot be safely used directly.
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* Instead, use the constituent TLV structures to fill/parse.
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@ -5471,6 +5626,8 @@ typedef struct {
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typedef struct {
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htt_phy_counters_tlv phy_counters;
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htt_phy_stats_tlv phy_stats;
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htt_phy_reset_counters_tlv phy_reset_counters;
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htt_phy_reset_stats_tlv phy_reset_stats;
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} htt_phy_counters_and_phy_stats_t;
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#endif /* __HTT_STATS_H__ */
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