mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 11:11:45 -04:00
ARM: SoC platform updates for 4.17
This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaxibSAAoJEGCrR//JCVInPwcP/2ZdLMXXXaJBM+rCRPhT+vR1 FsKqcTCC5RHbVcKW+N54nmlsqofy2GadlmyfOdrFXtbf+Sm2dRNsDrHDOhvoPp37 fwBd0wGw0PLjNE8SEPp/ldtFe11Dbg0WGBzJ4PAPJgt1W4hvW8//VzVW1XsiRrVc 9SlZ66DwR95UQ5pwy+dfE8f9A/WW4XaMq0UHQ3/deQ/Te/64b/C6CJtT3W73WAlR 83UHgkwq3WvI+hhvg4QX9H0Q6dcK2JLUWsAB0xnZP8Q8t30NdDpl61uZL0A4Mh9Y 38lPhUjPUyUpsGrOttmMEQNzbAk4m/nzQxByYYmhkx3x+mlhjdA9KNavxDYVxXN2 1tzz62wst8pLePqVt2UsFqsaruJGMuTIooOdc5iCjG1c2N2kQGdBsuOvLjYu9kV6 XPTfvvAYkMo9rC0MbdPuobG+h/WrYHuc9SD2Mnt+kNaw1yJL08fWENjSuwP7kheb 2A5jdAFNrGqgcrWMsQOw8eYYC7z7WojkLq0kHrBbwIlVD7KIZurv2fm/iVo4+xPH Gig5HuehMUtVYAf+Q1KWFlqS01fXMErt2pDGI5f1mNumXCB5kdWoSKbU8lOg03f8 ZqBHlfly+QDMOx0qfkxFX+phHPWHTOC+45yHK2Xq+n9urXmQbzYZxTzq5zCu6jcm 4yH0jaykoHODGNLIt50f =HD9V -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits) arm: npcm: modify configuration for the NPCM7xx BMC. MAINTAINERS: update entry for ARM/berlin ARM: omap2: fix am43xx build without L2X0 ARM: davinci: da8xx: simplify CFGCHIP regmap_config ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data ARM: multi_v7_defconfig: add NXP FlexCAN IP support ARM: multi_v7_defconfig: enable thermal driver for i.MX devices ARM: multi_v7_defconfig: add RN5T618 PMIC family support ARM: multi_v7_defconfig: add NXP graphics drivers ARM: multi_v7_defconfig: add GPMI NAND controller support ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs ARM: multi_v7_defconfig: configure I2C driver built-in arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE ARM: imx: fix imx6sll-only build ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well ARM: mxs_defconfig: Re-sync defconfig ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver ARM: imx_v4_v5_defconfig: Re-sync defconfig arm64: defconfig: enable stmmac ethernet to defconfig ARM: EXYNOS: Simplify code in coupled CPU idle hot path ...
This commit is contained in:
Linus Torvalds
commit
167569343f
189 changed files with 4973 additions and 3960 deletions
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@ -3,8 +3,8 @@ config SOC_RENESAS
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default y if ARCH_RENESAS
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select SOC_BUS
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select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \
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ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77970 || \
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ARCH_R8A77995
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ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77965 || \
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ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77995
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select SYSC_R8A7743 if ARCH_R8A7743
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select SYSC_R8A7745 if ARCH_R8A7745
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select SYSC_R8A7779 if ARCH_R8A7779
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@ -14,7 +14,9 @@ config SOC_RENESAS
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select SYSC_R8A7794 if ARCH_R8A7794
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select SYSC_R8A7795 if ARCH_R8A7795
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select SYSC_R8A7796 if ARCH_R8A7796
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select SYSC_R8A77965 if ARCH_R8A77965
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select SYSC_R8A77970 if ARCH_R8A77970
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select SYSC_R8A77980 if ARCH_R8A77980
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select SYSC_R8A77995 if ARCH_R8A77995
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if SOC_RENESAS
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@ -56,10 +58,18 @@ config SYSC_R8A7796
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bool "R-Car M3-W System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A77965
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bool "R-Car M3-N System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A77970
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bool "R-Car V3M System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A77980
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bool "R-Car V3H System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A77995
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bool "R-Car D3 System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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@ -12,7 +12,9 @@ obj-$(CONFIG_SYSC_R8A7792) += r8a7792-sysc.o
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obj-$(CONFIG_SYSC_R8A7794) += r8a7794-sysc.o
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obj-$(CONFIG_SYSC_R8A7795) += r8a7795-sysc.o
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obj-$(CONFIG_SYSC_R8A7796) += r8a7796-sysc.o
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obj-$(CONFIG_SYSC_R8A77965) += r8a77965-sysc.o
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obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o
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obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o
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obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
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# Family
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37
drivers/soc/renesas/r8a77965-sysc.c
Normal file
37
drivers/soc/renesas/r8a77965-sysc.c
Normal file
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@ -0,0 +1,37 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R-Car M3-N System Controller
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* Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
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*
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* Based on Renesas R-Car M3-W System Controller
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* Copyright (C) 2016 Glider bvba
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*/
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <dt-bindings/power/r8a77965-sysc.h>
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#include "rcar-sysc.h"
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static const struct rcar_sysc_area r8a77965_areas[] __initconst = {
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{ "always-on", 0, 0, R8A77965_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca57-scu", 0x1c0, 0, R8A77965_PD_CA57_SCU, R8A77965_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca57-cpu0", 0x80, 0, R8A77965_PD_CA57_CPU0, R8A77965_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca57-cpu1", 0x80, 1, R8A77965_PD_CA57_CPU1, R8A77965_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "cr7", 0x240, 0, R8A77965_PD_CR7, R8A77965_PD_ALWAYS_ON },
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{ "a3vc", 0x380, 0, R8A77965_PD_A3VC, R8A77965_PD_ALWAYS_ON },
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{ "a3vp", 0x340, 0, R8A77965_PD_A3VP, R8A77965_PD_ALWAYS_ON },
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{ "a2vc1", 0x3c0, 1, R8A77965_PD_A2VC1, R8A77965_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A77965_PD_3DG_A, R8A77965_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A77965_PD_3DG_B, R8A77965_PD_3DG_A },
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{ "a3ir", 0x180, 0, R8A77965_PD_A3IR, R8A77965_PD_ALWAYS_ON },
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};
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const struct rcar_sysc_info r8a77965_sysc_info __initconst = {
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.areas = r8a77965_areas,
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.num_areas = ARRAY_SIZE(r8a77965_areas),
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};
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@ -25,12 +25,12 @@ static const struct rcar_sysc_area r8a77970_areas[] __initconst = {
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PD_CPU_NOCR },
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{ "cr7", 0x240, 0, R8A77970_PD_CR7, R8A77970_PD_ALWAYS_ON },
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{ "a3ir", 0x180, 0, R8A77970_PD_A3IR, R8A77970_PD_ALWAYS_ON },
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{ "a2ir0", 0x400, 0, R8A77970_PD_A2IR0, R8A77970_PD_ALWAYS_ON },
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{ "a2ir1", 0x400, 1, R8A77970_PD_A2IR1, R8A77970_PD_A2IR0 },
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{ "a2ir2", 0x400, 2, R8A77970_PD_A2IR2, R8A77970_PD_A2IR0 },
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{ "a2ir3", 0x400, 3, R8A77970_PD_A2IR3, R8A77970_PD_A2IR0 },
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{ "a2sc0", 0x400, 4, R8A77970_PD_A2SC0, R8A77970_PD_ALWAYS_ON },
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{ "a2sc1", 0x400, 5, R8A77970_PD_A2SC1, R8A77970_PD_A2SC0 },
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{ "a2ir0", 0x400, 0, R8A77970_PD_A2IR0, R8A77970_PD_A3IR },
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{ "a2ir1", 0x400, 1, R8A77970_PD_A2IR1, R8A77970_PD_A3IR },
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{ "a2ir2", 0x400, 2, R8A77970_PD_A2IR2, R8A77970_PD_A3IR },
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{ "a2ir3", 0x400, 3, R8A77970_PD_A2IR3, R8A77970_PD_A3IR },
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{ "a2sc0", 0x400, 4, R8A77970_PD_A2SC0, R8A77970_PD_A3IR },
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{ "a2sc1", 0x400, 5, R8A77970_PD_A2SC1, R8A77970_PD_A3IR },
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};
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const struct rcar_sysc_info r8a77970_sysc_info __initconst = {
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52
drivers/soc/renesas/r8a77980-sysc.c
Normal file
52
drivers/soc/renesas/r8a77980-sysc.c
Normal file
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@ -0,0 +1,52 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R-Car V3H System Controller
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*
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* Copyright (C) 2018 Renesas Electronics Corp.
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* Copyright (C) 2018 Cogent Embedded, Inc.
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*/
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <dt-bindings/power/r8a77980-sysc.h>
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#include "rcar-sysc.h"
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static const struct rcar_sysc_area r8a77980_areas[] __initconst = {
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{ "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu1", 0x200, 1, R8A77980_PD_CA53_CPU1, R8A77980_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu2", 0x200, 2, R8A77980_PD_CA53_CPU2, R8A77980_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu3", 0x200, 3, R8A77980_PD_CA53_CPU3, R8A77980_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "cr7", 0x240, 0, R8A77980_PD_CR7, R8A77980_PD_ALWAYS_ON },
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{ "a3ir", 0x180, 0, R8A77980_PD_A3IR, R8A77980_PD_ALWAYS_ON },
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{ "a2ir0", 0x400, 0, R8A77980_PD_A2IR0, R8A77980_PD_A3IR },
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{ "a2ir1", 0x400, 1, R8A77980_PD_A2IR1, R8A77980_PD_A3IR },
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{ "a2ir2", 0x400, 2, R8A77980_PD_A2IR2, R8A77980_PD_A3IR },
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{ "a2ir3", 0x400, 3, R8A77980_PD_A2IR3, R8A77980_PD_A3IR },
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{ "a2ir4", 0x400, 4, R8A77980_PD_A2IR4, R8A77980_PD_A3IR },
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{ "a2ir5", 0x400, 5, R8A77980_PD_A2IR5, R8A77980_PD_A3IR },
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{ "a2sc0", 0x400, 6, R8A77980_PD_A2SC0, R8A77980_PD_A3IR },
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{ "a2sc1", 0x400, 7, R8A77980_PD_A2SC1, R8A77980_PD_A3IR },
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{ "a2sc2", 0x400, 8, R8A77980_PD_A2SC2, R8A77980_PD_A3IR },
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{ "a2sc3", 0x400, 9, R8A77980_PD_A2SC3, R8A77980_PD_A3IR },
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{ "a2sc4", 0x400, 10, R8A77980_PD_A2SC4, R8A77980_PD_A3IR },
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{ "a2pd0", 0x400, 11, R8A77980_PD_A2PD0, R8A77980_PD_A3IR },
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{ "a2pd1", 0x400, 12, R8A77980_PD_A2PD1, R8A77980_PD_A3IR },
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{ "a2cn", 0x400, 13, R8A77980_PD_A2CN, R8A77980_PD_A3IR },
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{ "a3vip", 0x2c0, 0, R8A77980_PD_A3VIP, R8A77980_PD_ALWAYS_ON },
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{ "a3vip1", 0x300, 0, R8A77980_PD_A3VIP1, R8A77980_PD_A3VIP },
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{ "a3vip2", 0x280, 0, R8A77980_PD_A3VIP2, R8A77980_PD_A3VIP },
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};
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const struct rcar_sysc_info r8a77980_sysc_info __initconst = {
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.areas = r8a77980_areas,
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.num_areas = ARRAY_SIZE(r8a77980_areas),
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};
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@ -13,8 +13,18 @@
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#include <linux/of_address.h>
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#include <linux/soc/renesas/rcar-rst.h>
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#define WDTRSTCR_RESET 0xA55A0002
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#define WDTRSTCR 0x0054
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static int rcar_rst_enable_wdt_reset(void __iomem *base)
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{
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iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
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return 0;
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}
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struct rst_config {
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unsigned int modemr; /* Mode Monitoring Register Offset */
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unsigned int modemr; /* Mode Monitoring Register Offset */
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int (*configure)(void *base); /* Platform specific configuration */
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};
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static const struct rst_config rcar_rst_gen1 __initconst = {
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@ -23,6 +33,11 @@ static const struct rst_config rcar_rst_gen1 __initconst = {
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static const struct rst_config rcar_rst_gen2 __initconst = {
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.modemr = 0x60,
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.configure = rcar_rst_enable_wdt_reset,
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};
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static const struct rst_config rcar_rst_gen3 __initconst = {
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.modemr = 0x60,
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};
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static const struct of_device_id rcar_rst_matches[] __initconst = {
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@ -38,11 +53,13 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
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{ .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
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{ .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
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{ .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
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/* R-Car Gen3 is handled like R-Car Gen2 */
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{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen2 },
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{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen2 },
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{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen2 },
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{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen2 },
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/* R-Car Gen3 */
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{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
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{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
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{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
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{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
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{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
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{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
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{ /* sentinel */ }
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};
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@ -71,6 +88,14 @@ static int __init rcar_rst_init(void)
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rcar_rst_base = base;
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cfg = match->data;
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saved_mode = ioread32(base + cfg->modemr);
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if (cfg->configure) {
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error = cfg->configure(base);
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if (error) {
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pr_warn("%pOF: Cannot run SoC specific configuration\n",
|
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np);
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goto out_put;
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}
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}
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|
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pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
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|
|
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@ -254,7 +254,7 @@ finalize:
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pm_genpd_init(genpd, gov, false);
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}
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static const struct of_device_id rcar_sysc_matches[] = {
|
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static const struct of_device_id rcar_sysc_matches[] __initconst = {
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#ifdef CONFIG_SYSC_R8A7743
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{ .compatible = "renesas,r8a7743-sysc", .data = &r8a7743_sysc_info },
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#endif
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|
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@ -284,9 +284,15 @@ static const struct of_device_id rcar_sysc_matches[] = {
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#ifdef CONFIG_SYSC_R8A7796
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{ .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info },
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||||
#endif
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||||
#ifdef CONFIG_SYSC_R8A77965
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{ .compatible = "renesas,r8a77965-sysc", .data = &r8a77965_sysc_info },
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#endif
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||||
#ifdef CONFIG_SYSC_R8A77970
|
||||
{ .compatible = "renesas,r8a77970-sysc", .data = &r8a77970_sysc_info },
|
||||
#endif
|
||||
#ifdef CONFIG_SYSC_R8A77980
|
||||
{ .compatible = "renesas,r8a77980-sysc", .data = &r8a77980_sysc_info },
|
||||
#endif
|
||||
#ifdef CONFIG_SYSC_R8A77995
|
||||
{ .compatible = "renesas,r8a77995-sysc", .data = &r8a77995_sysc_info },
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -58,7 +58,9 @@ extern const struct rcar_sysc_info r8a7792_sysc_info;
|
|||
extern const struct rcar_sysc_info r8a7794_sysc_info;
|
||||
extern const struct rcar_sysc_info r8a7795_sysc_info;
|
||||
extern const struct rcar_sysc_info r8a7796_sysc_info;
|
||||
extern const struct rcar_sysc_info r8a77965_sysc_info;
|
||||
extern const struct rcar_sysc_info r8a77970_sysc_info;
|
||||
extern const struct rcar_sysc_info r8a77980_sysc_info;
|
||||
extern const struct rcar_sysc_info r8a77995_sysc_info;
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -144,11 +144,21 @@ static const struct renesas_soc soc_rcar_m3_w __initconst __maybe_unused = {
|
|||
.id = 0x52,
|
||||
};
|
||||
|
||||
static const struct renesas_soc soc_rcar_m3_n __initconst __maybe_unused = {
|
||||
.family = &fam_rcar_gen3,
|
||||
.id = 0x55,
|
||||
};
|
||||
|
||||
static const struct renesas_soc soc_rcar_v3m __initconst __maybe_unused = {
|
||||
.family = &fam_rcar_gen3,
|
||||
.id = 0x54,
|
||||
};
|
||||
|
||||
static const struct renesas_soc soc_rcar_v3h __initconst __maybe_unused = {
|
||||
.family = &fam_rcar_gen3,
|
||||
.id = 0x56,
|
||||
};
|
||||
|
||||
static const struct renesas_soc soc_rcar_d3 __initconst __maybe_unused = {
|
||||
.family = &fam_rcar_gen3,
|
||||
.id = 0x58,
|
||||
|
|
@ -209,9 +219,15 @@ static const struct of_device_id renesas_socs[] __initconst = {
|
|||
#ifdef CONFIG_ARCH_R8A7796
|
||||
{ .compatible = "renesas,r8a7796", .data = &soc_rcar_m3_w },
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_R8A77965
|
||||
{ .compatible = "renesas,r8a77965", .data = &soc_rcar_m3_n },
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_R8A77970
|
||||
{ .compatible = "renesas,r8a77970", .data = &soc_rcar_v3m },
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_R8A77980
|
||||
{ .compatible = "renesas,r8a77980", .data = &soc_rcar_v3h },
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_R8A77995
|
||||
{ .compatible = "renesas,r8a77995", .data = &soc_rcar_d3 },
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -28,6 +28,15 @@ config KEYSTONE_NAVIGATOR_DMA
|
|||
|
||||
If unsure, say N.
|
||||
|
||||
config AMX3_PM
|
||||
tristate "AMx3 Power Management"
|
||||
depends on SOC_AM33XX || SOC_AM43XX
|
||||
depends on WKUP_M3_IPC && TI_EMIF_SRAM && SRAM
|
||||
help
|
||||
Enable power management on AM335x and AM437x. Required for suspend to mem
|
||||
and standby states on both AM335x and AM437x platforms and for deeper cpuidle
|
||||
c-states on AM335x.
|
||||
|
||||
config WKUP_M3_IPC
|
||||
tristate "TI AMx3 Wkup-M3 IPC Driver"
|
||||
depends on WKUP_M3_RPROC
|
||||
|
|
|
|||
|
|
@ -5,5 +5,6 @@
|
|||
obj-$(CONFIG_KEYSTONE_NAVIGATOR_QMSS) += knav_qmss.o
|
||||
knav_qmss-y := knav_qmss_queue.o knav_qmss_acc.o
|
||||
obj-$(CONFIG_KEYSTONE_NAVIGATOR_DMA) += knav_dma.o
|
||||
obj-$(CONFIG_AMX3_PM) += pm33xx.o
|
||||
obj-$(CONFIG_WKUP_M3_IPC) += wkup_m3_ipc.o
|
||||
obj-$(CONFIG_TI_SCI_PM_DOMAINS) += ti_sci_pm_domains.o
|
||||
|
|
|
|||
349
drivers/soc/ti/pm33xx.c
Normal file
349
drivers/soc/ti/pm33xx.c
Normal file
|
|
@ -0,0 +1,349 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* AM33XX Power Management Routines
|
||||
*
|
||||
* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Vaibhav Bedia, Dave Gerlach
|
||||
*/
|
||||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/genalloc.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_data/pm33xx.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/sizes.h>
|
||||
#include <linux/sram.h>
|
||||
#include <linux/suspend.h>
|
||||
#include <linux/ti-emif-sram.h>
|
||||
#include <linux/wkup_m3_ipc.h>
|
||||
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/suspend.h>
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
#define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \
|
||||
(unsigned long)pm_sram->do_wfi)
|
||||
|
||||
static int (*am33xx_do_wfi_sram)(unsigned long unused);
|
||||
static phys_addr_t am33xx_do_wfi_sram_phys;
|
||||
|
||||
static struct gen_pool *sram_pool, *sram_pool_data;
|
||||
static unsigned long ocmcram_location, ocmcram_location_data;
|
||||
|
||||
static struct am33xx_pm_platform_data *pm_ops;
|
||||
static struct am33xx_pm_sram_addr *pm_sram;
|
||||
|
||||
static struct device *pm33xx_dev;
|
||||
static struct wkup_m3_ipc *m3_ipc;
|
||||
|
||||
static u32 sram_suspend_address(unsigned long addr)
|
||||
{
|
||||
return ((unsigned long)am33xx_do_wfi_sram +
|
||||
AMX3_PM_SRAM_SYMBOL_OFFSET(addr));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static int am33xx_pm_suspend(suspend_state_t suspend_state)
|
||||
{
|
||||
int i, ret = 0;
|
||||
|
||||
ret = pm_ops->soc_suspend((unsigned long)suspend_state,
|
||||
am33xx_do_wfi_sram);
|
||||
|
||||
if (ret) {
|
||||
dev_err(pm33xx_dev, "PM: Kernel suspend failure\n");
|
||||
} else {
|
||||
i = m3_ipc->ops->request_pm_status(m3_ipc);
|
||||
|
||||
switch (i) {
|
||||
case 0:
|
||||
dev_info(pm33xx_dev,
|
||||
"PM: Successfully put all powerdomains to target state\n");
|
||||
break;
|
||||
case 1:
|
||||
dev_err(pm33xx_dev,
|
||||
"PM: Could not transition all powerdomains to target state\n");
|
||||
ret = -1;
|
||||
break;
|
||||
default:
|
||||
dev_err(pm33xx_dev,
|
||||
"PM: CM3 returned unknown result = %d\n", i);
|
||||
ret = -1;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int am33xx_pm_enter(suspend_state_t suspend_state)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
switch (suspend_state) {
|
||||
case PM_SUSPEND_MEM:
|
||||
case PM_SUSPEND_STANDBY:
|
||||
ret = am33xx_pm_suspend(suspend_state);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int am33xx_pm_begin(suspend_state_t state)
|
||||
{
|
||||
int ret = -EINVAL;
|
||||
|
||||
switch (state) {
|
||||
case PM_SUSPEND_MEM:
|
||||
ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_DEEPSLEEP);
|
||||
break;
|
||||
case PM_SUSPEND_STANDBY:
|
||||
ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_STANDBY);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void am33xx_pm_end(void)
|
||||
{
|
||||
m3_ipc->ops->finish_low_power(m3_ipc);
|
||||
}
|
||||
|
||||
static int am33xx_pm_valid(suspend_state_t state)
|
||||
{
|
||||
switch (state) {
|
||||
case PM_SUSPEND_STANDBY:
|
||||
case PM_SUSPEND_MEM:
|
||||
return 1;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct platform_suspend_ops am33xx_pm_ops = {
|
||||
.begin = am33xx_pm_begin,
|
||||
.end = am33xx_pm_end,
|
||||
.enter = am33xx_pm_enter,
|
||||
.valid = am33xx_pm_valid,
|
||||
};
|
||||
#endif /* CONFIG_SUSPEND */
|
||||
|
||||
static void am33xx_pm_set_ipc_ops(void)
|
||||
{
|
||||
u32 resume_address;
|
||||
int temp;
|
||||
|
||||
temp = ti_emif_get_mem_type();
|
||||
if (temp < 0) {
|
||||
dev_err(pm33xx_dev, "PM: Cannot determine memory type, no PM available\n");
|
||||
return;
|
||||
}
|
||||
m3_ipc->ops->set_mem_type(m3_ipc, temp);
|
||||
|
||||
/* Physical resume address to be used by ROM code */
|
||||
resume_address = am33xx_do_wfi_sram_phys +
|
||||
*pm_sram->resume_offset + 0x4;
|
||||
|
||||
m3_ipc->ops->set_resume_address(m3_ipc, (void *)resume_address);
|
||||
}
|
||||
|
||||
static void am33xx_pm_free_sram(void)
|
||||
{
|
||||
gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz);
|
||||
gen_pool_free(sram_pool_data, ocmcram_location_data,
|
||||
sizeof(struct am33xx_pm_ro_sram_data));
|
||||
}
|
||||
|
||||
/*
|
||||
* Push the minimal suspend-resume code to SRAM
|
||||
*/
|
||||
static int am33xx_pm_alloc_sram(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
int ret = 0;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "ti,omap3-mpu");
|
||||
if (!np) {
|
||||
np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
|
||||
if (!np) {
|
||||
dev_err(pm33xx_dev, "PM: %s: Unable to find device node for mpu\n",
|
||||
__func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
sram_pool = of_gen_pool_get(np, "pm-sram", 0);
|
||||
if (!sram_pool) {
|
||||
dev_err(pm33xx_dev, "PM: %s: Unable to get sram pool for ocmcram\n",
|
||||
__func__);
|
||||
ret = -ENODEV;
|
||||
goto mpu_put_node;
|
||||
}
|
||||
|
||||
sram_pool_data = of_gen_pool_get(np, "pm-sram", 1);
|
||||
if (!sram_pool_data) {
|
||||
dev_err(pm33xx_dev, "PM: %s: Unable to get sram data pool for ocmcram\n",
|
||||
__func__);
|
||||
ret = -ENODEV;
|
||||
goto mpu_put_node;
|
||||
}
|
||||
|
||||
ocmcram_location = gen_pool_alloc(sram_pool, *pm_sram->do_wfi_sz);
|
||||
if (!ocmcram_location) {
|
||||
dev_err(pm33xx_dev, "PM: %s: Unable to allocate memory from ocmcram\n",
|
||||
__func__);
|
||||
ret = -ENOMEM;
|
||||
goto mpu_put_node;
|
||||
}
|
||||
|
||||
ocmcram_location_data = gen_pool_alloc(sram_pool_data,
|
||||
sizeof(struct emif_regs_amx3));
|
||||
if (!ocmcram_location_data) {
|
||||
dev_err(pm33xx_dev, "PM: Unable to allocate memory from ocmcram\n");
|
||||
gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz);
|
||||
ret = -ENOMEM;
|
||||
}
|
||||
|
||||
mpu_put_node:
|
||||
of_node_put(np);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int am33xx_push_sram_idle(void)
|
||||
{
|
||||
struct am33xx_pm_ro_sram_data ro_sram_data;
|
||||
int ret;
|
||||
u32 table_addr, ro_data_addr;
|
||||
void *copy_addr;
|
||||
|
||||
ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data;
|
||||
ro_sram_data.amx3_pm_sram_data_phys =
|
||||
gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data);
|
||||
|
||||
/* Save physical address to calculate resume offset during pm init */
|
||||
am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool,
|
||||
ocmcram_location);
|
||||
|
||||
am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location,
|
||||
pm_sram->do_wfi,
|
||||
*pm_sram->do_wfi_sz);
|
||||
if (!am33xx_do_wfi_sram) {
|
||||
dev_err(pm33xx_dev,
|
||||
"PM: %s: am33xx_do_wfi copy to sram failed\n",
|
||||
__func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
table_addr =
|
||||
sram_suspend_address((unsigned long)pm_sram->emif_sram_table);
|
||||
ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr);
|
||||
if (ret) {
|
||||
dev_dbg(pm33xx_dev,
|
||||
"PM: %s: EMIF function copy failed\n", __func__);
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
ro_data_addr =
|
||||
sram_suspend_address((unsigned long)pm_sram->ro_sram_data);
|
||||
copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr,
|
||||
&ro_sram_data,
|
||||
sizeof(ro_sram_data));
|
||||
if (!copy_addr) {
|
||||
dev_err(pm33xx_dev,
|
||||
"PM: %s: ro_sram_data copy to sram failed\n",
|
||||
__func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int am33xx_pm_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
int ret;
|
||||
|
||||
if (!of_machine_is_compatible("ti,am33xx") &&
|
||||
!of_machine_is_compatible("ti,am43"))
|
||||
return -ENODEV;
|
||||
|
||||
pm_ops = dev->platform_data;
|
||||
if (!pm_ops) {
|
||||
dev_err(dev, "PM: Cannot get core PM ops!\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pm_sram = pm_ops->get_sram_addrs();
|
||||
if (!pm_sram) {
|
||||
dev_err(dev, "PM: Cannot get PM asm function addresses!!\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pm33xx_dev = dev;
|
||||
|
||||
ret = am33xx_pm_alloc_sram();
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = am33xx_push_sram_idle();
|
||||
if (ret)
|
||||
goto err_free_sram;
|
||||
|
||||
m3_ipc = wkup_m3_ipc_get();
|
||||
if (!m3_ipc) {
|
||||
dev_dbg(dev, "PM: Cannot get wkup_m3_ipc handle\n");
|
||||
ret = -EPROBE_DEFER;
|
||||
goto err_free_sram;
|
||||
}
|
||||
|
||||
am33xx_pm_set_ipc_ops();
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
suspend_set_ops(&am33xx_pm_ops);
|
||||
#endif /* CONFIG_SUSPEND */
|
||||
|
||||
ret = pm_ops->init();
|
||||
if (ret) {
|
||||
dev_err(dev, "Unable to call core pm init!\n");
|
||||
ret = -ENODEV;
|
||||
goto err_put_wkup_m3_ipc;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_put_wkup_m3_ipc:
|
||||
wkup_m3_ipc_put(m3_ipc);
|
||||
err_free_sram:
|
||||
am33xx_pm_free_sram();
|
||||
pm33xx_dev = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int am33xx_pm_remove(struct platform_device *pdev)
|
||||
{
|
||||
suspend_set_ops(NULL);
|
||||
wkup_m3_ipc_put(m3_ipc);
|
||||
am33xx_pm_free_sram();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver am33xx_pm_driver = {
|
||||
.driver = {
|
||||
.name = "pm33xx",
|
||||
},
|
||||
.probe = am33xx_pm_probe,
|
||||
.remove = am33xx_pm_remove,
|
||||
};
|
||||
module_platform_driver(am33xx_pm_driver);
|
||||
|
||||
MODULE_ALIAS("platform:pm33xx");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("am33xx power management driver");
|
||||
Loading…
Reference in a new issue